Xiangliang Yu bf4305fe72 drm/amdgpu/vce4: impl vce & mmsch sriov start ...

For MM sriov, need use MMSCH to init engine and the init procedures
are all saved in mm table.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

2017-03-29 23:55:13 -04:00

..

drm

drm/amdgpu/vce4: impl vce & mmsch sriov start

2017-03-29 23:55:13 -04:00

host1x

gpu: host1x: Set OF node for new host1x devices

2017-01-30 11:47:44 +01:00

ipu-v3

gpu: ipu-v3: only set non-zero AXI ID for IC when PRG is absent

2017-03-16 10:14:49 +01:00

vga

Merge tag 'doc-4.11-images' of git://git.lwn.net/linux into drm-misc-next

2017-03-14 15:07:33 +01:00

Makefile

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