linux

Files

Andi Kleen 8c16dc047b x86/perf: Avoid warning for Arch LBR without XSAVE

Some hypervisors support Arch LBR, but without the LBR XSAVE support.
The current Arch LBR init code prints a warning when the xsave size (0) is
unexpected. Avoid printing the warning for the "no LBR XSAVE" case.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20211215204029.150686-1-ak@linux.intel.com

2022-01-18 12:09:49 +01:00

amd

x86/events/amd/iommu: Remove redundant assignment to variable shift

2021-12-28 21:30:05 +01:00

intel

x86/perf: Avoid warning for Arch LBR without XSAVE

2022-01-18 12:09:49 +01:00

zhaoxin

x86: Fix various typos in comments

2021-03-18 15:31:53 +01:00

core.c

Merge tag 'perf_core_for_v5.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip