Files
linux/drivers
Ville Syrjälä da4a1efab8 drm/i915: Make i9xx_crtc_clock_get() work for PCH DPLLs
Add the 120MHz refernce clock case for PCH DPLLs.

Also determine the reference clock frequency more accurately by
checking for the PLLB_REF_INPUT_SPREADSPECTRUMIN refclk input
mode. The gen2 code already checked it, but it stil assumed a
fixed 66MHz refclk. Instead we need to consult the VBT for the
real value.

v2: Fix refclk for SSC panel case

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-09-16 22:43:46 +02:00
..
2013-08-20 08:38:23 -04:00
2013-06-27 13:42:16 -04:00
2013-07-23 16:01:28 -07:00
2013-08-07 21:57:17 +02:00
2013-06-28 13:01:40 +02:00
2013-07-22 09:34:46 +08:00
2013-08-23 10:41:46 -07:00
2013-07-24 16:36:41 -06:00