MIPS CPU interrupt controller bindings used text format, so migrate them to YAML. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220921072405.610739-1-sergio.paracuellos@gmail.com Signed-off-by: Rob Herring <robh@kernel.org> |
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| .. | ||
| brcm | ||
| cavium | ||
| img | ||
| ingenic | ||
| lantiq | ||
| loongson | ||
| pic32 | ||
| ath79-soc.txt | ||
| mscc.txt | ||
| ni.txt | ||
| ralink.yaml | ||
| realtek-rtl.yaml | ||