Files
linux/drivers
Mark Zhang fc20eeff6c clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2
pll_m will be the parent of gr2d/gr3d if we don't do this.
And because pll_m runs at a high rate so gr2d/gr3d will be
unstable. So change the parent of them to pll_c2.

Signed-off-by: Mark Zhang <markz@nvidia.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-25 16:11:44 +02:00
..
2013-11-19 15:53:02 -05:00
2013-11-07 19:24:20 +01:00
2013-11-19 01:06:28 +01:00
2013-11-15 09:32:23 +09:00
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