Move libultra function declarations to libultra headers (#1196)

* Delete unused headers

* Move PR and io to ultra64

* move headers to ultra64

* more cleanups

* more reorganizing

* i think that should be all

* format

* ifdef guards cleanup

* Add IO_READ and IO_WRITE macros for future use

* warnings

* review

Co-authored-by: Tharo <17233964+Thar0@users.noreply.github.com>

* warnings again

* warn

* ifdef guards

* fix merge

* fix merge

* fix merge

* bss

* padutils.h

* bss

* bss

* bss

* fix merge

* bss

* bss

* bss

* fix merge

* fixes

* fixes

* bss

* bss

* fix merge

* fix

* fix

* fix includepaths

* fix paths

* bss

* fix

* ultra64/ -> PR/

* header guards

* fix ehader guards

* fix

* fix++

* format

* bss is borken

* prevent 2

* :despair:

* bss

* rename assert to dbg_hungup

* fix

* a

* fix

* bss

* fix

* bss

* bss

---------

Co-authored-by: Tharo <17233964+Thar0@users.noreply.github.com>
This commit is contained in:
Anghelo Carvajal
2023-09-02 15:34:29 -04:00
committed by GitHub
parent 9cceea48f3
commit 4fa13e4132
162 changed files with 1058 additions and 906 deletions
+2 -2
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@@ -1,5 +1,5 @@
#ifndef ULTRA64_ABI_H
#define ULTRA64_ABI_H
#ifndef PR_ABI_H
#define PR_ABI_H
/* Audio commands: */
/*
+208
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@@ -0,0 +1,208 @@
#ifndef PR_CONTROLLER_H
#define PR_CONTROLLER_H
#include "ultratypes.h"
#include "os_cont.h"
#include "os_pfs.h"
#define CHNL_ERR(format) (((format).rxsize & CHNL_ERR_MASK) >> 4)
#define SIAccessQueueSize 2
#define BLOCKSIZE 32
#define PFS_ONE_PAGE 8
#define PFS_PAGE_SIZE (BLOCKSIZE*PFS_ONE_PAGE)
#define CONT_CMD_REQUEST_STATUS 0
#define CONT_CMD_READ_BUTTON 1
#define CONT_CMD_READ_MEMPACK 2
#define CONT_CMD_WRITE_MEMPACK 3
#define CONT_CMD_READ_EEPROM 4
#define CONT_CMD_WRITE_EEPROM 5
#define CONT_CMD_RESET 0xFF
#define CONT_CMD_REQUEST_STATUS_TX 1
#define CONT_CMD_READ_BUTTON_TX 1
#define CONT_CMD_READ_MEMPACK_TX 3
#define CONT_CMD_WRITE_MEMPACK_TX 35
#define CONT_CMD_READ_EEPROM_TX 2
#define CONT_CMD_WRITE_EEPROM_TX 10
#define CONT_CMD_RESET_TX 1
#define CONT_CMD_REQUEST_STATUS_RX 3
#define CONT_CMD_READ_BUTTON_RX 4
#define CONT_CMD_READ_MEMPACK_RX 33
#define CONT_CMD_WRITE_MEMPACK_RX 1
#define CONT_CMD_READ_EEPROM_RX 8
#define CONT_CMD_WRITE_EEPROM_RX 1
#define CONT_CMD_RESET_RX 3
#define CONT_ERR_NO_CONTROLLER PFS_ERR_NOPACK /* 1 */
#define CONT_ERR_CONTRFAIL CONT_OVERRUN_ERROR /* 4 */
#define CONT_ERR_INVALID PFS_ERR_INVALID /* 5 */
#define CONT_ERR_DEVICE PFS_ERR_DEVICE /* 11 */
#define CONT_ERR_NOT_READY 12
#define CONT_ERR_VOICE_MEMORY 13
#define CONT_ERR_VOICE_WORD 14
#define CONT_ERR_VOICE_NO_RESPONSE 15
// Joybus commands
#define CONT_CMD_REQUEST_STATUS 0
#define CONT_CMD_READ_BUTTON 1
#define CONT_CMD_READ_PAK 2
#define CONT_CMD_WRITE_PAK 3
#define CONT_CMD_READ_EEPROM 4
#define CONT_CMD_WRITE_EEPROM 5
#define CONT_CMD_READ36_VOICE 9
#define CONT_CMD_WRITE20_VOICE 10
#define CONT_CMD_READ2_VOICE 11
#define CONT_CMD_WRITE4_VOICE 12
#define CONT_CMD_SWRITE_VOICE 13
#define CONT_CMD_CHANNEL_RESET 0xFD
#define CONT_CMD_RESET 0xFF
// Bytes transmitted for each joybus command
#define CONT_CMD_REQUEST_STATUS_TX 1
#define CONT_CMD_READ_BUTTON_TX 1
#define CONT_CMD_READ_PAK_TX 3
#define CONT_CMD_WRITE_PAK_TX 35
#define CONT_CMD_READ_EEPROM_TX 2
#define CONT_CMD_WRITE_EEPROM_TX 10
#define CONT_CMD_READ36_VOICE_TX 3
#define CONT_CMD_WRITE20_VOICE_TX 23
#define CONT_CMD_READ2_VOICE_TX 3
#define CONT_CMD_WRITE4_VOICE_TX 7
#define CONT_CMD_SWRITE_VOICE_TX 3
#define CONT_CMD_RESET_TX 1
// Bytes received for each joybus command
#define CONT_CMD_REQUEST_STATUS_RX 3
#define CONT_CMD_READ_BUTTON_RX 4
#define CONT_CMD_READ_PAK_RX 33
#define CONT_CMD_WRITE_PAK_RX 1
#define CONT_CMD_READ_EEPROM_RX 8
#define CONT_CMD_WRITE_EEPROM_RX 1
#define CONT_CMD_READ36_VOICE_RX 37
#define CONT_CMD_WRITE20_VOICE_RX 1
#define CONT_CMD_READ2_VOICE_RX 3
#define CONT_CMD_WRITE4_VOICE_RX 1
#define CONT_CMD_SWRITE_VOICE_RX 1
#define CONT_CMD_RESET_RX 3
#define CONT_CMD_NOP 0xFF
#define CONT_CMD_END 0xFE // Indicates end of a command
#define CONT_CMD_EXE 1 // Set pif ram status byte to this to do a command
#define DIR_STATUS_EMPTY 0
#define DIR_STATUS_UNKNOWN 1
#define DIR_STATUS_OCCUPIED 2
#define PFS_FORCE 1
#define PFS_DELETE 1
#define PFS_LABEL_AREA 7
#define PFS_ERR_NOPACK 1
// Accessory detection
#define CONT_ADDR_DETECT 0x8000
// Rumble
#define CONT_ADDR_RUMBLE 0xC000
// Controller Pak
// Transfer Pak
#define CONT_ADDR_GB_POWER 0x8000 // Same as the detection address, but semantically different
#define CONT_ADDR_GB_BANK 0xA000
#define CONT_ADDR_GB_STATUS 0xB000
// Addresses sent to controller accessories are in blocks, not bytes
#define CONT_BLOCKS(x) ((x) / BLOCKSIZE)
// Block addresses of the above
#define CONT_BLOCK_DETECT CONT_BLOCKS(CONT_ADDR_DETECT)
#define CONT_BLOCK_RUMBLE CONT_BLOCKS(CONT_ADDR_RUMBLE)
#define CONT_BLOCK_GB_POWER CONT_BLOCKS(CONT_ADDR_GB_POWER)
#define CONT_BLOCK_GB_BANK CONT_BLOCKS(CONT_ADDR_GB_BANK)
#define CONT_BLOCK_GB_STATUS CONT_BLOCKS(CONT_ADDR_GB_STATUS)
typedef struct {
/* 0x00 */ u32 ramarray[15];
/* 0x3C */ u32 status;
} OSPifRam; // size = 0x40
typedef struct {
/* 0x0 */ u8 dummy;
/* 0x1 */ u8 txsize;
/* 0x2 */ u8 rxsize;
/* 0x3 */ u8 cmd;
/* 0x4 */ u16 button;
/* 0x6 */ s8 stick_x;
/* 0x7 */ s8 stick_y;
} __OSContReadFormat;
// Original name: __OSContRequesFormat
typedef struct {
/* 0x00 */ u8 align;
/* 0x01 */ u8 txsize;
/* 0x02 */ u8 rxsize;
/* 0x03 */ u8 poll;
/* 0x04 */ u8 typeh;
/* 0x05 */ u8 typel;
/* 0x06 */ u8 status;
/* 0x07 */ u8 align1;
} __OSContRequestHeader; // size = 0x8
typedef struct {
/* 0x00 */ u8 txsize;
/* 0x01 */ u8 rxsize;
/* 0x02 */ u8 poll;
/* 0x03 */ u8 typeh;
/* 0x04 */ u8 typel;
/* 0x05 */ u8 status;
} __OSContRequestHeaderAligned; // size = 0x6
typedef struct {
/* 0x00 */ u8 dummy;
/* 0x01 */ u8 txsize;
/* 0x02 */ u8 rxsize;
/* 0x03 */ u8 cmd;
/* 0x04 */ u8 hi;
/* 0x05 */ u8 lo;
/* 0x06 */ u8 data[32];
/* 0x26 */ u8 datacrc;
} __OSContRamReadFormat;
#define READFORMAT(ptr) ((__OSContRamReadFormat*)(ptr))
s32 __osCheckPackId(OSPfs* pfs, __OSPackId* check);
s32 __osGetId(OSPfs* pfs);
u16 __osSumcalc(u8* ptr, s32 length);
s32 __osIdCheckSum(u16* ptr, u16* checkSum, u16* idSum);
s32 __osRepairPackId(OSPfs* pfs, __OSPackId* badid, __OSPackId* newid);
s32 __osCheckPackId(OSPfs *pfs, __OSPackId *check);
s32 __osCheckId(OSPfs* pfs);
s32 __osPfsRWInode(OSPfs* pfs, __OSInode* inode, u8 flag, u8 bank);
s32 __osPfsSelectBank(OSPfs* pfs, u8 bank);
s32 __osPfsDeclearPage(OSPfs* pfs, __OSInode* inode, s32 fileSizeInPages, s32* startPage, u8 bank, s32* decleared, s32* finalPage);
s32 __osPfsReleasePages(OSPfs *pfs, __OSInode *inode, u8 initialPage, u8 bank, __OSInodeUnit *finalPage);
s32 __osContRamRead(OSMesgQueue* ctrlrqueue, s32 channel, u16 addr, u8* buffer);
s32 __osContRamWrite(OSMesgQueue* mq, s32 channel, u16 address, u8* buffer, s32 force);
void __osContGetInitData(u8* pattern, OSContStatus* data);
void __osPackRequestData(u8 poll);
void __osPfsRequestData(u8 poll);
void __osPfsGetInitData(u8* pattern, OSContStatus* contData);
u8 __osContAddressCrc(u16 addr);
u8 __osContDataCrc(u8* data);
s32 __osPfsGetStatus(OSMesgQueue* queue, s32 channel);
s32 __osContChannelReset(OSMesgQueue* mq, s32 channel);
extern OSPifRam __osContPifRam;
// extern UNK_TYPE1 D_8009CF0C;
extern u8 __osContLastPoll;
extern u8 __osMaxControllers;
// extern OSMesgQueue D_8009CF38;
// extern OSMesg D_8009CF50;
#endif
+71
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@@ -0,0 +1,71 @@
#ifndef PR_CONTROLLER_VOICE_H
#define PR_CONTROLLER_VOICE_H
#include "ultratypes.h"
#include "os_voice.h"
#include "os_message.h"
#include "libc/stddef.h"
typedef struct {
/* 0x0 */ u8 dummy;
/* 0x1 */ u8 txsize;
/* 0x2 */ u8 rxsize;
/* 0x3 */ u8 cmd;
/* 0x4 */ u8 addrh;
/* 0x5 */ u8 addrl;
/* 0x6 */ u8 data[2];
/* 0x8 */ u8 datacrc;
} __OSVoiceRead2Format; // size = 0x9
typedef struct {
/* 0x00 */ u8 dummy;
/* 0x01 */ u8 txsize;
/* 0x02 */ u8 rxsize;
/* 0x03 */ u8 cmd;
/* 0x04 */ u8 addrh;
/* 0x05 */ u8 addrl;
/* 0x06 */ u8 data[36];
/* 0x2A */ u8 datacrc;
} __OSVoiceRead36Format; // size = 0x2B
typedef struct {
/* 0x0 */ u8 dummy;
/* 0x1 */ u8 txsize;
/* 0x2 */ u8 rxsize;
/* 0x3 */ u8 cmd;
/* 0x4 */ u8 addrh;
/* 0x5 */ u8 addrl;
/* 0x6 */ u8 data[4];
/* 0xA */ u8 datacrc;
} __OSVoiceWrite4Format; // size = 0xB
typedef struct {
/* 0x00 */ u8 dummy;
/* 0x01 */ u8 txsize;
/* 0x02 */ u8 rxsize;
/* 0x03 */ u8 cmd;
/* 0x04 */ u8 addrh;
/* 0x05 */ u8 addrl;
/* 0x06 */ u8 data[20];
/* 0x1A */ u8 datacrc;
} __OSVoiceWrite20Format; // size = 0x1B
typedef struct {
/* 0x0 */ u8 txsize;
/* 0x1 */ u8 rxsize;
/* 0x2 */ u8 cmd;
/* 0x3 */ u8 data;
/* 0x4 */ u8 scrc;
/* 0x5 */ u8 datacrc;
} __OSVoiceSWriteFormat; // size = 0x6
s32 __osVoiceContRead2(OSMesgQueue* mq, s32 channel, u16 address, u8 dst[2]);
s32 __osVoiceContRead36(OSMesgQueue* mq, s32 channel, u16 address, u8 dst[36]);
s32 __osVoiceContWrite4(OSMesgQueue* mq, s32 channel, u16 address, u8 dst[4]);
s32 __osVoiceContWrite20(OSMesgQueue* mq, s32 channel, u16 address, u8 dst[20]);
s32 __osVoiceCheckResult(OSVoiceHandle* hd, u8* status);
s32 __osVoiceGetStatus(OSMesgQueue* mq, s32 channel, u8* status);
s32 __osVoiceSetADConverter(OSMesgQueue* mq, s32 channel, u8 data);
u8 __osVoiceContDataCrc(u8* data, size_t numBytes);
#endif
+14 -2
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@@ -1,7 +1,9 @@
#include "mbi.h"
#ifndef _ULTRA64_GBI_H_
#define _ULTRA64_GBI_H_
#ifndef PR_GBI_H
#define PR_GBI_H
#include "ultratypes.h"
/* To enable Fast3DEX grucode support, define F3DEX_GBI. */
@@ -1054,6 +1056,16 @@ typedef struct {
unsigned char v[3];
} Tri;
typedef long int Mtx_t[4][4];
typedef union {
Mtx_t m;
struct {
u16 intPart[4][4];
u16 fracPart[4][4];
};
long long int force_structure_alignment;
} Mtx; // size = 0x40
/*
* Viewport
*/
+381
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@@ -0,0 +1,381 @@
#ifndef PR_GS2DEX_H
#define PR_GS2DEX_H
#include "ultratypes.h"
#ifdef _LANGUAGE_C_PLUS_PLUS
extern "C" {
#endif
/*===========================================================================*
* Macro
*===========================================================================*/
#define GS_CALC_DXT(line) (((1<< G_TX_DXT_FRAC)-1)/(line)+1)
#define GS_PIX2TMEM(pix, siz) ((pix)>>(4-(siz)))
#define GS_PIX2DXT(pix, siz) GS_CALC_DXT(GS_PIX2TMEM((pix), (siz)))
/*===========================================================================*
* Data structures for S2DEX microcode
*===========================================================================*/
/*---------------------------------------------------------------------------*
* Background
*---------------------------------------------------------------------------*/
#define G_BGLT_LOADBLOCK 0x0033
#define G_BGLT_LOADTILE 0xFFF4
#define G_BG_FLAG_FLIPS 0x01
#define G_BG_FLAG_FLIPT 0x10
/* Non scalable background plane */
typedef struct {
u16 imageX; /* x-coordinate of upper-left position of texture (u10.5) */
u16 imageW; /* width of the texture (u10.2) */
s16 frameX; /* upper-left position of transferred frame (s10.2) */
u16 frameW; /* width of transferred frame (u10.2) */
u16 imageY; /* y-coordinate of upper-left position of texture (u10.5) */
u16 imageH; /* height of the texture (u10.2) */
s16 frameY; /* upper-left position of transferred frame (s10.2) */
u16 frameH; /* height of transferred frame (u10.2) */
u64 *imagePtr; /* texture source address on DRAM */
u16 imageLoad; /* which to use, LoadBlock or LoadTile */
u8 imageFmt; /* format of texel - G_IM_FMT_* */
u8 imageSiz; /* size of texel - G_IM_SIZ_* */
u16 imagePal; /* pallet number */
u16 imageFlip; /* right & left image inversion (Inverted by G_BG_FLAG_FLIPS) */
/* The following is set in the initialization routine guS2DInitBg(). There is no need for the user to set it. */
u16 tmemW; /* TMEM width and Word size of frame 1 line.
At LoadBlock, GS_PIX2TMEM(imageW/4,imageSiz)
At LoadTile GS_PIX2TMEM(frameW/4,imageSiz)+1 */
u16 tmemH; /* height of TMEM loadable at a time (s13.2) 4 times value
When the normal texture, 512/tmemW*4
When the CI texture, 256/tmemW*4 */
u16 tmemLoadSH; /* SH value
At LoadBlock, tmemSize/2-1
At LoadTile, tmemW*16-1 */
u16 tmemLoadTH; /* TH value or Stride value
At LoadBlock, GS_CALC_DXT(tmemW)
At LoadTile, tmemH-1 */
u16 tmemSizeW; /* skip value of imagePtr for image 1-line
At LoadBlock, tmemW*2
At LoadTile, GS_PIX2TMEM(imageW/4,imageSiz)*2 */
u16 tmemSize; /* skip value of imagePtr for 1-loading
= tmemSizeW*tmemH */
} uObjBg_t; /* 40 bytes */
/* Scalable background plane */
typedef struct {
u16 imageX; /* x-coordinate of upper-left position of texture (u10.5) */
u16 imageW; /* width of texture (u10.2) */
s16 frameX; /* upper-left position of transferred frame (s10.2) */
u16 frameW; /* width of transferred frame (u10.2) */
u16 imageY; /* y-coordinate of upper-left position of texture (u10.5) */
u16 imageH; /* height of texture (u10.2) */
s16 frameY; /* upper-left position of transferred frame (s10.2) */
u16 frameH; /* height of transferred frame (u10.2) */
u64 *imagePtr; /* texture source address on DRAM */
u16 imageLoad; /* Which to use, LoadBlock or LoadTile? */
u8 imageFmt; /* format of texel - G_IM_FMT_* */
u8 imageSiz; /* size of texel - G_IM_SIZ_* */
u16 imagePal; /* pallet number */
u16 imageFlip; /* right & left image inversion (Inverted by G_BG_FLAG_FLIPS) */
u16 scaleW; /* scale value of X-direction (u5.10) */
u16 scaleH; /* scale value of Y-direction (u5.10) */
s32 imageYorig; /* start point of drawing on image (s20.5) */
u8 padding[4];
} uObjScaleBg_t; /* 40 bytes */
typedef union {
uObjBg_t b;
uObjScaleBg_t s;
long long int force_structure_alignment;
} uObjBg;
/*---------------------------------------------------------------------------*
* 2D Objects
*---------------------------------------------------------------------------*/
#define G_OBJ_FLAG_FLIPS 1<<0 /* inversion to S-direction */
#define G_OBJ_FLAG_FLIPT 1<<4 /* nversion to T-direction */
typedef struct {
s16 objX; /* s10.2 OBJ x-coordinate of upper-left end */
u16 scaleW; /* u5.10 Scaling of u5.10 width direction */
u16 imageW; /* u10.5 width of u10.5 texture (length of S-direction) */
u16 paddingX; /* Unused - Always 0 */
s16 objY; /* s10.2 OBJ y-coordinate of s10.2 OBJ upper-left end */
u16 scaleH; /* u5.10 Scaling of u5.10 height direction */
u16 imageH; /* u10.5 height of u10.5 texture (length of T-direction) */
u16 paddingY; /* Unused - Always 0 */
u16 imageStride; /* folding width of texel (In units of 64bit word) */
u16 imageAdrs; /* texture header position in TMEM (In units of 64bit word) */
u8 imageFmt; /* format of texel - G_IM_FMT_* */
u8 imageSiz; /* size of texel - G_IM_SIZ_* */
u8 imagePal; /* pallet number (0-7) */
u8 imageFlags; /* The display flag - G_OBJ_FLAG_FLIP* */
} uObjSprite_t; /* 24 bytes */
typedef union {
uObjSprite_t s;
long long int force_structure_alignment;
} uObjSprite;
/*---------------------------------------------------------------------------*
* 2D Matrix
*---------------------------------------------------------------------------*/
typedef struct {
s32 A, B, C, D; /* s15.16 */
s16 X, Y; /* s10.2 */
u16 BaseScaleX; /* u5.10 */
u16 BaseScaleY; /* u5.10 */
} uObjMtx_t; /* 24 bytes */
typedef union {
uObjMtx_t m;
long long int force_structure_alignment;
} uObjMtx;
typedef struct {
s16 X, Y; /* s10.2 */
u16 BaseScaleX; /* u5.10 */
u16 BaseScaleY; /* u5.10 */
} uObjSubMtx_t; /* 8 bytes */
typedef union {
uObjSubMtx_t m;
long long int force_structure_alignment;
} uObjSubMtx;
/*---------------------------------------------------------------------------*
* Loading into TMEM
*---------------------------------------------------------------------------*/
#define G_OBJLT_TXTRBLOCK 0x00001033
#define G_OBJLT_TXTRTILE 0x00FC1034
#define G_OBJLT_TLUT 0x00000030
#define GS_TB_TSIZE(pix,siz) (GS_PIX2TMEM((pix),(siz))-1)
#define GS_TB_TLINE(pix,siz) (GS_CALC_DXT(GS_PIX2TMEM((pix),(siz))))
typedef struct {
u32 type; /* G_OBJLT_TXTRBLOCK divided into types */
u64 *image; /* texture source address on DRAM */
u16 tmem; /* loaded TMEM word address (8byteWORD) */
u16 tsize; /* Texture size, Specified by macro GS_TB_TSIZE() */
u16 tline; /* width of Texture 1-line, Specified by macro GS_TB_TLINE() */
u16 sid; /* STATE ID Multipled by 4 (Either one of 0, 4, 8 and 12) */
u32 flag; /* STATE flag */
u32 mask; /* STATE mask */
} uObjTxtrBlock_t; /* 24 bytes */
#define GS_TT_TWIDTH(pix,siz) ((GS_PIX2TMEM((pix), (siz))<<2)-1)
#define GS_TT_THEIGHT(pix,siz) (((pix)<<2)-1)
typedef struct {
u32 type; /* G_OBJLT_TXTRTILE divided into types */
u64 *image; /* texture source address on DRAM */
u16 tmem; /* loaded TMEM word address (8byteWORD)*/
u16 twidth; /* width of Texture (Specified by macro GS_TT_TWIDTH()) */
u16 theight; /* height of Texture (Specified by macro GS_TT_THEIGHT()) */
u16 sid; /* STATE ID Multipled by 4 (Either one of 0, 4, 8 and 12) */
u32 flag; /* STATE flag */
u32 mask; /* STATE mask */
} uObjTxtrTile_t; /* 24 bytes */
#define GS_PAL_HEAD(head) ((head)+256)
#define GS_PAL_NUM(num) ((num)-1)
typedef struct {
u32 type; /* G_OBJLT_TLUT divided into types */
u64 *image; /* texture source address on DRAM */
u16 phead; /* pallet number of load header (Between 256 and 511) */
u16 pnum; /* loading pallet number -1 */
u16 zero; /* Assign 0 all the time */
u16 sid; /* STATE ID Multipled by 4 (Either one of 0, 4, 8 and 12)*/
u32 flag; /* STATE flag */
u32 mask; /* STATE mask */
} uObjTxtrTLUT_t; /* 24 bytes */
typedef union {
uObjTxtrBlock_t block;
uObjTxtrTile_t tile;
uObjTxtrTLUT_t tlut;
long long int force_structure_alignment;
} uObjTxtr;
/*---------------------------------------------------------------------------*
* Loading into TMEM & 2D Objects
*---------------------------------------------------------------------------*/
typedef struct {
uObjTxtr txtr;
uObjSprite sprite;
} uObjTxSprite; /* 48 bytes */
/*===========================================================================*
* GBI Commands for S2DEX microcode
*===========================================================================*/
/* GBI Header */
#ifdef F3DEX_GBI_2
#define G_OBJ_RECTANGLE_R 0xDA
#define G_OBJ_MOVEMEM 0xDC
#define G_RDPHALF_0 0xE4
#define G_OBJ_RECTANGLE 0x01
#define G_OBJ_SPRITE 0x02
#define G_SELECT_DL 0x04
#define G_OBJ_LOADTXTR 0x05
#define G_OBJ_LDTX_SPRITE 0x06
#define G_OBJ_LDTX_RECT 0x07
#define G_OBJ_LDTX_RECT_R 0x08
#define G_BG_1CYC 0x09
#define G_BG_COPY 0x0A
#define G_OBJ_RENDERMODE 0x0B
#else
#define G_BG_1CYC 0x01
#define G_BG_COPY 0x02
#define G_OBJ_RECTANGLE 0x03
#define G_OBJ_SPRITE 0x04
#define G_OBJ_MOVEMEM 0x05
#define G_SELECT_DL 0xB0
#define G_OBJ_RENDERMODE 0xB1
#define G_OBJ_RECTANGLE_R 0xB2
#define G_OBJ_LOADTXTR 0xC1
#define G_OBJ_LDTX_SPRITE 0xC2
#define G_OBJ_LDTX_RECT 0xC3
#define G_OBJ_LDTX_RECT_R 0xC4
#define G_RDPHALF_0 0xE4
#endif
/*---------------------------------------------------------------------------*
* Background wrapped screen
*---------------------------------------------------------------------------*/
#define gSPBgRectangle(pkt, m, mptr) gDma0p((pkt),(m),(mptr),0)
#define gsSPBgRectangle(m, mptr) gsDma0p( (m),(mptr),0)
#define gSPBgRectCopy(pkt, mptr) gSPBgRectangle((pkt), G_BG_COPY, (mptr))
#define gsSPBgRectCopy(mptr) gsSPBgRectangle( G_BG_COPY, (mptr))
#define gSPBgRect1Cyc(pkt, mptr) gSPBgRectangle((pkt), G_BG_1CYC, (mptr))
#define gsSPBgRect1Cyc(mptr) gsSPBgRectangle( G_BG_1CYC, (mptr))
/*---------------------------------------------------------------------------*
* 2D Objects
*---------------------------------------------------------------------------*/
#define gSPObjSprite(pkt, mptr) gDma0p((pkt),G_OBJ_SPRITE, (mptr),0)
#define gsSPObjSprite(mptr) gsDma0p( G_OBJ_SPRITE, (mptr),0)
#define gSPObjRectangle(pkt, mptr) gDma0p((pkt),G_OBJ_RECTANGLE, (mptr),0)
#define gsSPObjRectangle(mptr) gsDma0p( G_OBJ_RECTANGLE, (mptr),0)
#define gSPObjRectangleR(pkt, mptr) gDma0p((pkt),G_OBJ_RECTANGLE_R,(mptr),0)
#define gsSPObjRectangleR(mptr) gsDma0p( G_OBJ_RECTANGLE_R,(mptr),0)
/*---------------------------------------------------------------------------*
* 2D Matrix
*---------------------------------------------------------------------------*/
#define gSPObjMatrix(pkt, mptr) gDma1p((pkt),G_OBJ_MOVEMEM,(mptr),0,23)
#define gsSPObjMatrix(mptr) gsDma1p( G_OBJ_MOVEMEM,(mptr),0,23)
#define gSPObjSubMatrix(pkt, mptr) gDma1p((pkt),G_OBJ_MOVEMEM,(mptr),2, 7)
#define gsSPObjSubMatrix(mptr) gsDma1p( G_OBJ_MOVEMEM,(mptr),2, 7)
/*---------------------------------------------------------------------------*
* Loading into TMEM
*---------------------------------------------------------------------------*/
#define gSPObjLoadTxtr(pkt, tptr) gDma0p((pkt),G_OBJ_LOADTXTR, (tptr),23)
#define gsSPObjLoadTxtr(tptr) gsDma0p( G_OBJ_LOADTXTR, (tptr),23)
#define gSPObjLoadTxSprite(pkt, tptr) gDma0p((pkt),G_OBJ_LDTX_SPRITE,(tptr),47)
#define gsSPObjLoadTxSprite(tptr) gsDma0p( G_OBJ_LDTX_SPRITE,(tptr),47)
#define gSPObjLoadTxRect(pkt, tptr) gDma0p((pkt),G_OBJ_LDTX_RECT, (tptr),47)
#define gsSPObjLoadTxRect(tptr) gsDma0p( G_OBJ_LDTX_RECT, (tptr),47)
#define gSPObjLoadTxRectR(pkt, tptr) gDma0p((pkt),G_OBJ_LDTX_RECT_R,(tptr),47)
#define gsSPObjLoadTxRectR(tptr) gsDma0p( G_OBJ_LDTX_RECT_R,(tptr),47)
/*---------------------------------------------------------------------------*
* Select Display List
*---------------------------------------------------------------------------*/
#define gSPSelectDL(pkt, mptr, sid, flag, mask) \
{ gDma1p((pkt), G_RDPHALF_0, (flag), (u32)(mptr) & 0xFFFF, (sid)); \
gDma1p((pkt), G_SELECT_DL, (mask), (u32)(mptr) >> 16, G_DL_PUSH); }
#define gsSPSelectDL(mptr, sid, flag, mask) \
{ gsDma1p(G_RDPHALF_0, (flag), (u32)(mptr) & 0xFFFF, (sid)); \
gsDma1p(G_SELECT_DL, (mask), (u32)(mptr) >> 16, G_DL_PUSH); }
#define gSPSelectBranchDL(pkt, mptr, sid, flag, mask) \
{ gDma1p((pkt), G_RDPHALF_0, (flag), (u32)(mptr) & 0xFFFF, (sid)); \
gDma1p((pkt), G_SELECT_DL, (mask), (u32)(mptr) >> 16, G_DL_NOPUSH); }
#define gsSPSelectBranchDL(mptr, sid, flag, mask) \
{ gsDma1p(G_RDPHALF_0, (flag), (u32)(mptr) & 0xFFFF, (sid)); \
gsDma1p(G_SELECT_DL, (mask), (u32)(mptr) >> 16, G_DL_NOPUSH); }
/*---------------------------------------------------------------------------*
* Set general status
*---------------------------------------------------------------------------*/
#define G_MW_GENSTAT 0x08 /* Note that it is the same value of G_MW_FOG */
#define gSPSetStatus(pkt, sid, val) \
gMoveWd((pkt), G_MW_GENSTAT, (sid), (val))
#define gsSPSetStatus(sid, val) \
gsMoveWd( G_MW_GENSTAT, (sid), (val))
/*---------------------------------------------------------------------------*
* Set Object Render Mode
*---------------------------------------------------------------------------*/
#define G_OBJRM_NOTXCLAMP 0x01
#define G_OBJRM_XLU 0x02 /* Ignored */
#define G_OBJRM_ANTIALIAS 0x04 /* Ignored */
#define G_OBJRM_BILERP 0x08
#define G_OBJRM_SHRINKSIZE_1 0x10
#define G_OBJRM_SHRINKSIZE_2 0x20
#define G_OBJRM_WIDEN 0x40
#define gSPObjRenderMode(pkt, mode) gImmp1((pkt),G_OBJ_RENDERMODE,(mode))
#define gsSPObjRenderMode(mode) gsImmp1( G_OBJ_RENDERMODE,(mode))
/*===========================================================================*
* Render Mode Macro
*===========================================================================*/
#define RM_RA_SPRITE(clk) \
AA_EN | CVG_DST_CLAMP | \
CVG_X_ALPHA | ALPHA_CVG_SEL | ZMODE_OPA | TEX_EDGE | \
GBL_c##clk(G_BL_CLR_IN, G_BL_A_IN, G_BL_CLR_MEM, G_BL_1MA)
#define G_RM_SPRITE G_RM_OPA_SURF
#define G_RM_SPRITE2 G_RM_OPA_SURF2
#define G_RM_RA_SPRITE RM_RA_SPRITE(1)
#define G_RM_RA_SPRITE2 RM_RA_SPRITE(2)
#define G_RM_AA_SPRITE G_RM_AA_TEX_TERR
#define G_RM_AA_SPRITE2 G_RM_AA_TEX_TERR2
#define G_RM_XLU_SPRITE G_RM_XLU_SURF
#define G_RM_XLU_SPRITE2 G_RM_XLU_SURF2
#define G_RM_AA_XLU_SPRITE G_RM_AA_XLU_SURF
#define G_RM_AA_XLU_SPRITE2 G_RM_AA_XLU_SURF2
/*===========================================================================*
* External functions
*===========================================================================*/
extern u64 gspS2DEX_fifoTextStart[], gspS2DEX_fifoTextEnd[];
extern u64 gspS2DEX_fifoDataStart[], gspS2DEX_fifoDataEnd[];
extern u64 gspS2DEX_fifo_dTextStart[], gspS2DEX_fifo_dTextEnd[];
extern u64 gspS2DEX_fifo_dDataStart[], gspS2DEX_fifo_dDataEnd[];
extern u64 gspS2DEX2_fifoTextStart[], gspS2DEX2_fifoTextEnd[];
extern u64 gspS2DEX2_fifoDataStart[], gspS2DEX2_fifoDataEnd[];
extern u64 gspS2DEX2_xbusTextStart[], gspS2DEX2_xbusTextEnd[];
extern u64 gspS2DEX2_xbusDataStart[], gspS2DEX2_xbusDataEnd[];
extern void guS2DInitBg(uObjBg *);
#ifdef F3DEX_GBI_2
# define guS2DEmuBgRect1Cyc guS2D2EmuBgRect1Cyc /*Wrapper*/
# define guS2DEmuSetScissor guS2D2EmuSetScissor /*Wrapper*/
extern void guS2D2EmuSetScissor(u32, u32, u32, u32, u8);
extern void guS2D2EmuBgRect1Cyc(Gfx **, uObjBg *);
#else
extern void guS2DEmuSetScissor(u32, u32, u32, u32, u8);
extern void guS2DEmuBgRect1Cyc(Gfx **, uObjBg *);
#endif
#ifdef _LANGUAGE_C_PLUS_PLUS
}
#endif
#endif /* GS2DEX_H */
/*======== End of gs2dex.h ========*/
+58 -21
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@@ -1,26 +1,63 @@
#ifndef _GU_H_
#define _GU_H_
#ifndef PR_GU_H
#define PR_GU_H
typedef struct {
/* 0x0 */ unsigned char* base;
/* 0x4 */ int fmt;
/* 0x8 */ int siz;
/* 0xC */ int xsize;
/* 0x10 */ int ysize;
/* 0x14 */ int lsize;
/* 0x18 */ int addr;
/* 0x1C */ int w;
/* 0x20 */ int h;
/* 0x24 */ int s;
/* 0x28 */ int t;
} Image;
#include "ultratypes.h"
#include "gbi.h"
typedef struct {
/* 0x0 */ float col[3];
/* 0xC */ float pos[3];
/* 0x18 */ float a1;
/* 0x1C */ float a2;
} PositionalLight;
#ifndef MAX
#define MAX(a,b) (((a)>(b))?(a):(b))
#endif
#ifndef MIN
#define MIN(a,b) (((a)<(b))?(a):(b))
#endif
#define M_DTOR (3.14159265358979323846/180.0)
#define FTOFIX32(x) (long)((x) * (float)0x00010000)
#define FIX32TOF(x) ((float)(x) * (1.0f / (float)0x00010000))
#define FTOFRAC8(x) ((int) MIN(((x) * (128.0f)), 127.0f) & 0xff)
void guMtxIdent(Mtx* mtx);
void guMtxIdentF(float mf[4][4]);
void guOrtho(Mtx* m, f32 l, f32 r, f32 b, f32 t, f32 n, f32 f, f32 scale);
void guOrthoF(float m[4][4], f32 l, f32 r, f32 b, f32 t, f32 n, f32 f, f32 scale);
void guPerspective(Mtx* m, u16* perspNorm, f32 fovy, f32 aspect, f32 near, f32 far, f32 scale);
void guPerspectiveF(float mf[4][4], u16* perspNorm, f32 fovy, f32 aspect, f32 near, f32 far, f32 scale);
void guLookAt(Mtx* m, f32 xEye, f32 yEye, f32 zEye, f32 xAt, f32 yAt, f32 zAt, f32 xUp, f32 yUp, f32 zUp);
void guLookAtF(float mf[4][4], f32 xEye, f32 yEye, f32 zEye, f32 xAt, f32 yAt, f32 zAt, f32 xUp, f32 yUp, f32 zUp);
void guLookAtHilite(Mtx* m, LookAt* l, Hilite* h, f32 xEye, f32 yEye, f32 zEye, f32 xAt, f32 yAt, f32 zAt, f32 xUp, f32 yUp, f32 zUp, f32 xl1, f32 yl1, f32 zl1, f32 xl2, f32 yl2, f32 zl2, s32 hiliteWidth, s32 hiliteHeight);
void guLookAtHiliteF(float mf[4][4], LookAt* l, Hilite* h, f32 xEye, f32 yEye, f32 zEye, f32 xAt, f32 yAt, f32 zAt, f32 xUp, f32 yUp, f32 zUp, f32 xl1, f32 yl1, f32 zl1, f32 xl2, f32 yl2, f32 zl2, s32 hiliteWidth, s32 hiliteHeight);
void guRotate(Mtx* m, f32 a, f32 x, f32 y, f32 z);
void guRotateF(float m[4][4], f32 a, f32 x, f32 y, f32 z);
void guScale(Mtx* mtx, f32 x, f32 y, f32 z);
void guTranslate(Mtx* mtx, f32 x, f32 y, f32 z);
void guPosition(Mtx* m, f32 rot, f32 pitch, f32 yaw, f32 scale, f32 x, f32 y, f32 z);
void guPositionF(float mf[4][4], f32 rot, f32 pitch, f32 yaw, f32 scale, f32 x, f32 y, f32 z);
void guMtxF2L(float mf[4][4], Mtx* m);
void guMtxL2F(float m1[4][4], Mtx* m2);
void guNormalize(float* x, float* y, float* z);
f32 sinf(f32 __x);
f32 cosf(f32 __x);
s16 sins(u16 x);
s16 coss(u16 x);
f32 sqrtf(f32 f);
#ifdef __sgi
#pragma intrinsic(sqrtf);
#endif
#endif
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#ifndef _ULTRA64_HARDWARE_H_
#define _ULTRA64_HARDWARE_H_
// TODO: not real libultra header. Refactor to R4300.h
// Segment Wrapper
// Uncached RDRAM
#define KSEG1 0xA0000000 // 0xA0000000 - 0xBFFFFFFF Physical memory, uncached, unmapped
#define RDRAM_UNCACHED KSEG1
// Cached RDRAM
#define KSEG0 0x80000000 // 0x80000000 - 0x9FFFFFFF Physical memory, cached, unmapped
#define RDRAM_CACHED KSEG0
// Volatile access wrapper, enforcing uncached memory
#define HW_REG(reg, type) *(volatile type*)((reg) | KSEG1)
#define AI_DRAM_ADDR_REG 0x04500000
#define AI_LEN_REG 0x04500004
#define AI_CONTROL_REG 0x04500008
#define AI_STATUS_REG 0x0450000C
#define AI_DACRATE_REG 0x04500010
#define AI_BITRATE_REG 0x04500014
#define AI_STATUS_AI_BUSY (1 << 30)
#define AI_STATUS_AI_FULL (1 << 31)
#define VI_STATUS_REG 0x04400000
#define VI_CONTROL_REG 0x04400000
#define VI_ORIGIN_REG 0x04400004
#define VI_DRAM_ADDR_REG 0x04400004
#define VI_WIDTH_REG 0x04400008
#define VI_H_WIDTH_REG 0x04400008
#define VI_INTR_REG 0x0440000C
#define VI_V_INTER_REG 0x0440000C
#define VI_CURRENT_REG 0x04400010
#define VI_V_CURRENT_LINE_REG 0x04400010
#define VI_BURST_REG 0x04400014
#define VI_TIMING_REG 0x04400014
#define VI_V_SYNC_REG 0x04400018 //VI vertical sync
#define VI_H_SYNC_REG 0x0440001C //VI horizontal sync
#define VI_LEAP_REG 0x04400020 //VI horizontal sync leap
#define VI_H_SYNC_LEAP_REG 0x04400020
#define VI_H_START_REG 0x04400024 //VI horizontal video
#define VI_H_VIDEO_REG 0x04400024
#define VI_V_START_REG 0x04400028 //VI vertical video
#define VI_V_VIDEO_REG 0x04400028
#define VI_V_BURST_REG 0x0440002C //VI vertical burst
#define VI_X_SCALE_REG 0x04400030 //VI x-scale
#define VI_Y_SCALE_REG 0x04400034 //VI y-scale
#define SP_IMEM_START 0x04001000
#define SP_IMEM_SIZE 0x1000
#define SP_DMEM_START 0x04000000
#define SP_DMEM_SIZE 0x1000
#define TMEM_SIZE 0x1000
#define SP_MEM_ADDR_REG 0x04040000
#define SP_DRAM_ADDR_REG 0x04040004
#define SP_RD_LEN_REG 0x04040008
#define SP_WR_LEN_REG 0x0404000C
#define SP_STATUS_REG 0x04040010
#define SP_DMA_FULL_REG 0x04040014
#define SP_DMA_BUSY_REG 0x04040018
#define SP_PC_REG 0x04080000
#define PI_DRAM_ADDR_REG 0x04600000 //PI DRAM address
#define PI_CART_ADDR_REG 0x04600004 //PI pbus (cartridge) address
#define PI_RD_LEN_REG 0x04600008 //PI read length
#define PI_WR_LEN_REG 0x0460000C //PI write length
#define PI_STATUS_REG 0x04600010 //PI status
#define PI_BSD_DOM1_LAT_REG 0x04600014 //PI dom1 latency
#define PI_DOMAIN1_REG 0x04600014
#define PI_BSD_DOM1_PWD_REG 0x04600018 //PI dom1 pulse width
#define PI_BSD_DOM1_PGS_REG 0x0460001C //PI dom1 page size
#define PI_BSD_DOM1_RLS_REG 0x04600020 //PI dom1 release
#define PI_BSD_DOM2_LAT_REG 0x04600024 //PI dom2 latency
#define PI_DOMAIN2_REG 0x04600024
#define PI_BSD_DOM2_PWD_REG 0x04600028 //PI dom2 pulse width
#define PI_BSD_DOM2_PGS_REG 0x0460002C //PI dom2 page size
#define PI_BSD_DOM2_RLS_REG 0x04600030 //PI dom2 release
#define PI_STATUS_BUSY (1 << 0)
#define PI_STATUS_IOBUSY (1 << 1)
#define PI_STATUS_ERROR (1 << 2)
#define PI_STATUS_RESET_CONTROLLER (1 << 0)
#define PI_STATUS_CLEAR_INTR (1 << 1)
#define SI_DRAM_ADDR_REG 0x04800000
#define SI_PIF_ADDR_RD64B_REG 0x04800004
#define SI_PIF_ADDR_WR64B_REG 0x04800010
#define SI_STATUS_REG 0x04800018
#define SI_STATUS_DMA_BUSY (1 << 0)
#define SI_STATUS_IO_READ_BUSY (1 << 1)
#define SI_STATUS_DMA_ERROR (1 << 3)
#define SI_STATUS_INTERRUPT (1 << 12)
#define PIF_RAM_START 0x1FC007C0
#define PIF_RAM_SIZE 0x40
#define MI_INIT_MODE_REG 0x04300000
#define MI_MODE_REG MI_INIT_MODE_REG
#define MI_VERSION_REG 0x04300004
#define MI_INTR_REG 0x04300008
#define MI_INTR_MASK_REG 0x0430000C
/* Interrupt pending bits */
#define CAUSE_IP8 0x00008000 /* External level 8 pending - COMPARE */
#define CAUSE_IP7 0x00004000 /* External level 7 pending - INT4 */
#define CAUSE_IP6 0x00002000 /* External level 6 pending - INT3 */
#define CAUSE_IP5 0x00001000 /* External level 5 pending - INT2 */
#define CAUSE_IP4 0x00000800 /* External level 4 pending - INT1 */
#define CAUSE_IP3 0x00000400 /* External level 3 pending - INT0 */
#define CAUSE_SW2 0x00000200 /* Software level 2 pending */
#define CAUSE_SW1 0x00000100 /* Software level 1 pending */
#endif
+2 -2
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@@ -1,5 +1,5 @@
#ifndef _MBI_H_
#define _MBI_H_
#ifndef PR_MBI_H
#define PR_MBI_H
/**************************************************************************
* *
+27
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#ifndef PR_OS_H
#define PR_OS_H
#include "os_ai.h"
#include "os_cache.h"
#include "os_cont.h"
#include "os_convert.h"
#include "os_exception.h"
#include "os_flash.h"
#include "os_host.h"
#include "os_internal_error.h"
#include "os_internal_reg.h"
#include "os_internal_si.h"
#include "os_internal.h"
#include "os_libc.h"
#include "os_message.h"
#include "os_pfs.h"
#include "os_pi.h"
#include "os_reg.h"
#include "os_system.h"
#include "os_thread.h"
#include "os_time.h"
#include "os_tlb.h"
#include "os_vi.h"
#include "os_voice.h"
#endif
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#ifndef PR_OS_AI_H
#define PR_OS_AI_H
#include "ultratypes.h"
u32 osAiGetLength(void);
s32 osAiSetFrequency(u32 frequency);
s32 osAiSetNextBuffer(void* buf, u32 size);
#endif
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#ifndef PR_OS_CACHE_H
#define PR_OS_CACHE_H
#include "ultratypes.h"
#include "libc/stddef.h"
void osInvalDCache(void* vaddr, size_t nbytes);
void osInvalICache(void* vaddr, size_t nbytes);
void osWritebackDCache(void* vaddr, s32 nbytes);
void osWritebackDCacheAll(void);
#endif
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#ifndef PR_OS_CONT_H
#define PR_OS_CONT_H
#include "ultratypes.h"
#include "os_message.h"
typedef struct {
/* 0x0 */ u16 type;
/* 0x2 */ u8 status;
/* 0x3 */ u8 errno;
} OSContStatus; // size = 0x4
typedef struct {
/* 0x0 */ u16 button;
/* 0x2 */ s8 stick_x;
/* 0x3 */ s8 stick_y;
/* 0x4 */ u8 errno;
} OSContPad; // size = 0x6
#define MAXCONTROLLERS 4
/* controller errors */
#define CONT_NO_RESPONSE_ERROR 0x8
#define CONT_OVERRUN_ERROR 0x4
/* Controller type */
#define CONT_ABSOLUTE 0x0001
#define CONT_RELATIVE 0x0002
#define CONT_JOYPORT 0x0004
#define CONT_EEPROM 0x8000
#define CONT_EEP16K 0x4000
#define CONT_TYPE_MASK 0x1F07
#define CONT_TYPE_NORMAL 0x0005
#define CONT_TYPE_MOUSE 0x0002
#define CONT_TYPE_VOICE 0x0100
/* Controller status */
#define CONT_CARD_ON 0x01
#define CONT_CARD_PULL 0x02
#define CONT_ADDR_CRC_ER 0x04
#define CONT_EEPROM_BUSY 0x80
// TODO: use real libultra button defines instead of this
/* Buttons */
#define BTN_CRIGHT 0x0001
#define BTN_CLEFT 0x0002
#define BTN_CDOWN 0x0004
#define BTN_CUP 0x0008
#define BTN_R 0x0010
#define BTN_L 0x0020
#define BTN_RESET 0x0080
#define BTN_DRIGHT 0x0100
#define BTN_DLEFT 0x0200
#define BTN_DDOWN 0x0400
#define BTN_DUP 0x0800
#define BTN_START 0x1000
#define BTN_Z 0x2000
#define BTN_B 0x4000
#define BTN_A 0x8000
#define CONT_ERR_NO_CONTROLLER PFS_ERR_NOPACK /* 1 */
#define CONT_ERR_CONTRFAIL CONT_OVERRUN_ERROR /* 4 */
#define CONT_ERR_INVALID PFS_ERR_INVALID /* 5 */
#define CONT_ERR_DEVICE PFS_ERR_DEVICE /* 11 */
#define CONT_ERR_NOT_READY 12
#define CONT_ERR_VOICE_MEMORY 13
#define CONT_ERR_VOICE_WORD 14
#define CONT_ERR_VOICE_NO_RESPONSE 15
s32 osContInit(OSMesgQueue* mq, u8* bitpattern, OSContStatus* data);
s32 osContStartQuery(OSMesgQueue* mq);
s32 osContStartReadData(OSMesgQueue* mq);
s32 osContSetCh(u8 ch);
void osContGetQuery(OSContStatus* data);
void osContGetReadData(OSContPad* data);
#endif
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#ifndef PR_CONVERT_H
#define PR_CONVERT_H
#include "libc/stdint.h"
#define OS_CLOCK_RATE 62500000LL
#define OS_CPU_COUNTER (OS_CLOCK_RATE*3/4)
/* Macros */
#define OS_NSEC_TO_CYCLES(n) (((u64)(n)*(OS_CPU_COUNTER/15625000LL))/(1000000000LL/15625000LL))
#define OS_USEC_TO_CYCLES(n) (((u64)(n)*(OS_CPU_COUNTER/15625LL))/(1000000LL/15625LL))
#define OS_CYCLES_TO_NSEC(c) (((u64)(c)*(1000000000LL/15625000LL))/(OS_CPU_COUNTER/15625000LL))
#define OS_CYCLES_TO_USEC(c) (((u64)(c)*(1000000LL/15625LL))/(OS_CPU_COUNTER/15625LL))
#define OS_K0_TO_PHYSICAL(x) (u32)(((char*)(x)-0x80000000))
#define OS_K1_TO_PHYSICAL(x) (u32)(((char*)(x)-0xA0000000))
#define OS_PHYSICAL_TO_K0(x) (void*)(((u32)(x)+0x80000000))
#define OS_PHYSICAL_TO_K1(x) (void*)(((u32)(x)+0xA0000000))
#define OS_MSEC_TO_CYCLES(n) OS_USEC_TO_CYCLES((n) * 1000)
#define OS_SEC_TO_CYCLES(n) OS_MSEC_TO_CYCLES((n) * 1000)
/* Functions */
extern uintptr_t osVirtualToPhysical(void*);
#endif
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#ifndef PR_OS_EXCEPTION_H
#define PR_OS_EXCEPTION_H
#include "ultratypes.h"
typedef u32 OSIntMask;
typedef u32 OSHWIntr;
OSIntMask osGetIntMask(void);
OSIntMask osSetIntMask(OSIntMask im);
// Internal
void __osSetHWIntrRoutine(OSHWIntr idx, OSMesgQueue* queue, OSMesg msg);
void __osGetHWIntrRoutine(OSHWIntr idx, OSMesgQueue** outQueue, OSMesg* outMsg);
void __osSetGlobalIntMask(OSHWIntr mask);
void __osResetGlobalIntMask(OSHWIntr mask);
#endif
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#ifndef PR_OS_FLASH_H
#define PR_OS_FLASH_H
#include "ultratypes.h"
#include "os_pi.h"
OSPiHandle* osFlashReInit(u8 latency, u8 pulse, u8 pageSize, u8 relDuration, u32 start);
OSPiHandle* osFlashInit(void);
void osFlashReadStatus(u8* flashStatus);
void osFlashReadId(u32* flashType, u32* flashVendor);
void osFlashClearStatus(void);
s32 osFlashAllErase(void);
s32 osFlashSectorErase(u32 pageNum);
s32 osFlashWriteBuffer(OSIoMesg* mb, s32 priority, void* dramAddr, OSMesgQueue* mq);
s32 osFlashWriteArray(u32 pageNum);
s32 osFlashReadArray(OSIoMesg* mb, s32 priority, u32 pageNum, void* dramAddr, u32 pageCount, OSMesgQueue* mq);
void osFlashChange(u32 flashNum);
void osFlashAllEraseThrough(void);
void osFlashSectorEraseThrough(u32 pageNum);
s32 osFlashCheckEraseEnd(void);
#endif
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#ifndef PR_OS_HOST_H
#define PR_OS_HOST_H
void __osInitialize_common(void);
void __osInitialize_autodetect(void);
#define osInitialize() __osInitialize_common()
#endif
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#ifndef PR_OS_INTERNAL_H
#define PR_OS_INTERNAL_H
#include "ultratypes.h"
#include "os_message.h"
#include "os_pi.h"
typedef struct {
/* 0x00 */ OSMesgQueue* queue;
/* 0x04 */ OSMesg msg;
} __osHwInt; // size = 0x08
typedef struct {
/* 0x00 */ u32 initialized;
/* 0x04 */ OSThread* mgrThread;
/* 0x08 */ OSMesgQueue* cmdQueue;
/* 0x0C */ OSMesgQueue* eventQueue;
/* 0x10 */ OSMesgQueue* accessQueue;
/* 0x14 */ s32 (*piDmaCallback)(s32, uintptr_t, void*, size_t);
/* 0x18 */ s32 (*epiDmaCallback)(OSPiHandle*, s32, uintptr_t, void*, size_t);
} OSMgrArgs; // size = 0x1C
#endif
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#ifndef PR_OS_INTERNAL_ERROR_H
#define PR_OS_INTERNAL_ERROR_H
#include "os_thread.h"
OSThread* __osGetCurrFaultedThread(void);
#endif
+24
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@@ -0,0 +1,24 @@
#ifndef PR_OS_INTERNAL_REG
#define PR_OS_INTERNAL_REG
#include "ultratypes.h"
#include "os_exception.h"
u32 __osGetCause(void);
void __osSetCause(u32);
u32 __osGetCompare(void);
void __osSetCompare(u32 value);
u32 __osGetConfig(void);
void __osSetConfig(u32);
u32 __osGetSR(void);
void __osSetSR(u32 value);
OSIntMask __osDisableInt(void);
void __osRestoreInt(OSIntMask im);
u32 __osGetWatchLo(void);
void __osSetWatchLo(u32 value);
u32 __osSetFpcCsr(u32 value);
u32 __osGetFpcCsr(void);
#endif
+13
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@@ -0,0 +1,13 @@
#ifndef PR_OS_INTERNAL_SI_H
#define PR_OS_INTERNAL_SI_H
#include "ultratypes.h"
#include "libc/stdint.h"
s32 __osSiRawWriteIo(uintptr_t devAddr, u32 data);
s32 __osSiRawReadIo(uintptr_t devAddr, u32* data);
s32 __osSiRawStartDma(s32 direction, void* dramAddr);
#endif
+15
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@@ -0,0 +1,15 @@
#ifndef PR_OS_LIBC_H
#define PR_OS_LIBC_H
#include "libc/stdarg.h"
void bcopy(void* __src, void* __dest, int __n);
int bcmp(void* __s1, void* __s2, int __n);
void bzero(void* begin, int length);
s32 vsprintf(char* dst, char* fmt, va_list args);
int sprintf(char* dst, const char* fmt, ...);
void osSyncPrintf(const char* fmt, ...);
#endif
+61
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@@ -0,0 +1,61 @@
#ifndef PR_OS_MESSAGE_H
#define PR_OS_MESSAGE_H
#include "os_thread.h"
typedef void* OSMesg;
typedef u32 OSEvent;
typedef struct OSMesgQueue {
/* 0x00 */ OSThread* mtQueue;
/* 0x04 */ OSThread* fullQueue;
/* 0x08 */ s32 validCount;
/* 0x0C */ s32 first;
/* 0x10 */ s32 msgCount;
/* 0x14 */ OSMesg* msg;
} OSMesgQueue; // size = 0x18
#define OS_NUM_EVENTS 15
#define OS_EVENT_SW1 0 /* CPU SW1 interrupt */
#define OS_EVENT_SW2 1 /* CPU SW2 interrupt */
#define OS_EVENT_CART 2 /* Cartridge interrupt: used by rmon */
#define OS_EVENT_COUNTER 3 /* Counter int: used by VI/Timer Mgr */
#define OS_EVENT_SP 4 /* SP task done interrupt */
#define OS_EVENT_SI 5 /* SI (controller) interrupt */
#define OS_EVENT_AI 6 /* AI interrupt */
#define OS_EVENT_VI 7 /* VI interrupt: used by VI/Timer Mgr */
#define OS_EVENT_PI 8 /* PI interrupt: used by PI Manager */
#define OS_EVENT_DP 9 /* DP full sync interrupt */
#define OS_EVENT_CPU_BREAK 10 /* CPU breakpoint: used by rmon */
#define OS_EVENT_SP_BREAK 11 /* SP breakpoint: used by rmon */
#define OS_EVENT_FAULT 12 /* CPU fault event: used by rmon */
#define OS_EVENT_THREADSTATUS 13 /* CPU thread status: used by rmon */
#define OS_EVENT_PRENMI 14 /* Pre NMI interrupt */
#define OS_EVENT_RDB_READ_DONE 15 /* RDB read ok event: used by rmon */
#define OS_EVENT_RDB_LOG_DONE 16 /* read of log data complete */
#define OS_EVENT_RDB_DATA_DONE 17 /* read of host io data complete */
#define OS_EVENT_RDB_REQ_RAMROM 18 /* host needs ramrom access */
#define OS_EVENT_RDB_FREE_RAMROM 19 /* host is done with ramrom access */
#define OS_EVENT_RDB_DBG_DONE 20
#define OS_EVENT_RDB_FLUSH_PROF 21
#define OS_EVENT_RDB_ACK_PROF 22
#define OS_MESG_NOBLOCK 0
#define OS_MESG_BLOCK 1
#define MQ_GET_COUNT(mq) ((mq)->validCount)
#define MQ_IS_EMPTY(mq) (MQ_GET_COUNT(mq) == 0)
#define MQ_IS_FULL(mq) (MQ_GET_COUNT(mq) >= (mq)->msgCount)
void osCreateMesgQueue(OSMesgQueue* mq, OSMesg* msq, s32 count);
s32 osSendMesg(OSMesgQueue* mq, OSMesg msg, s32 flags);
s32 osJamMesg(OSMesgQueue* mq, OSMesg msg, s32 flag);
s32 osRecvMesg(OSMesgQueue* mq, OSMesg* msg, s32 flags);
void osSetEventMesg(OSEvent e, OSMesgQueue* mq, OSMesg m);
#endif
+18
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@@ -0,0 +1,18 @@
#ifndef PR_OS_MOTOR_H
#define PR_OS_MOTOR_H
#include "ultratypes.h"
#include "os_pfs.h"
#include "os_message.h"
#define MOTOR_START 1
#define MOTOR_STOP 0
#define osMotorStart(x) __osMotorAccess((x), MOTOR_START)
#define osMotorStop(x) __osMotorAccess((x), MOTOR_STOP)
s32 __osMotorAccess(OSPfs* pfs, s32 flag);
s32 osMotorInit(OSMesgQueue* mq, OSPfs* pfs, s32 channel);
#endif
+12 -4
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@@ -1,5 +1,5 @@
#ifndef _ULTRA64_PFS_H_
#define _ULTRA64_PFS_H_
#ifndef PR_OS_PFS_H
#define PR_OS_PFS_H
#include "os.h"
@@ -134,8 +134,16 @@ typedef struct {
/* 0x101 */ u8 map[PFS_INODE_DIST_MAP];
} __OSInodeCache; // size = 0x202
s32 __osCheckPackId(OSPfs* pfs, __OSPackId* check);
s32 __osGetId(OSPfs* pfs);
s32 osPfsInitPak(OSMesgQueue* queue, OSPfs* pfs, s32 channel);
s32 osPfsChecker(OSPfs* pfs);
s32 osPfsAllocateFile(OSPfs* pfs, u16 companyCode, u32 gameCode, u8* gameName, u8* extName, s32 fileSize, s32* fileNo);
s32 osPfsFindFile(OSPfs* pfs, u16 companyCode, u32 gameCode, u8* gameName, u8* extName, s32* fileNo);
s32 osPfsDeleteFile(OSPfs* pfs, u16 companyCode, u32 gameCode, u8* gameName, u8* extName);
s32 osPfsReadWriteFile(OSPfs* pfs, s32 fileNo, u8 flag, s32 offset, s32 size, u8* data);
s32 osPfsFileState(OSPfs* pfs, s32 fileNo, OSPfsState* state);
s32 osPfsIsPlug(OSMesgQueue* mq, u8* pattern);
s32 osPfsFreeBlocks(OSPfs* pfs, s32* leftoverBytes);
#endif
+106
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@@ -0,0 +1,106 @@
#ifndef PR_OS_PI_H
#define PR_OS_PI_H
#include "ultratypes.h"
#include "os_message.h"
#include "libc/stddef.h"
#include "libc/stdint.h"
typedef struct {
/* 0x00 */ u32 errStatus;
/* 0x04 */ void* dramAddr;
/* 0x08 */ void* C2Addr;
/* 0x0C */ u32 sectorSize;
/* 0x10 */ u32 C1ErrNum;
/* 0x14 */ u32 C1ErrSector[4];
} __OSBlockInfo; // size = 0x24
typedef struct {
/* 0x00 */ u32 cmdType;
/* 0x04 */ u16 transferMode;
/* 0x06 */ u16 blockNum;
/* 0x08 */ s32 sectorNum;
/* 0x0C */ uintptr_t devAddr;
/* 0x10 */ u32 bmCtlShadow;
/* 0x14 */ u32 seqCtlShadow;
/* 0x18 */ __OSBlockInfo block[2];
} __OSTranxInfo; // size = 0x60
typedef struct OSPiHandle {
/* 0x00 */ struct OSPiHandle* next;
/* 0x04 */ u8 type;
/* 0x05 */ u8 latency;
/* 0x06 */ u8 pageSize;
/* 0x07 */ u8 relDuration;
/* 0x08 */ u8 pulse;
/* 0x09 */ u8 domain;
/* 0x0C */ uintptr_t baseAddress;
/* 0x10 */ u32 speed;
/* 0x14 */ __OSTranxInfo transferInfo;
} OSPiHandle; // size = 0x74
typedef struct {
/* 0x0 */ u8 type;
/* 0x4 */ uintptr_t address;
} OSPiInfo; // size = 0x8
typedef struct {
/* 0x0 */ u16 type;
/* 0x2 */ u8 pri;
/* 0x3 */ u8 status;
/* 0x4 */ OSMesgQueue* retQueue;
} OSIoMesgHdr; // size = 0x8
typedef struct {
/* 0x00 */ OSIoMesgHdr hdr;
/* 0x08 */ void* dramAddr;
/* 0x0C */ uintptr_t devAddr;
/* 0x10 */ size_t size;
/* 0x14 */ OSPiHandle* piHandle;
} OSIoMesg; // size = 0x88
typedef struct {
/* 0x00 */ s32 active; // u32 maybe? need to check
/* 0x04 */ OSThread* thread;
/* 0x08 */ OSMesgQueue* cmdQueue;
/* 0x0C */ OSMesgQueue* evtQueue;
/* 0x10 */ OSMesgQueue* acsQueue;
/* 0x14 */ s32 (*piDmaCallback)(s32, uintptr_t, void*, size_t);
/* 0x18 */ s32 (*epiDmaCallback)(OSPiHandle*, s32, uintptr_t, void*, size_t);
} OSDevMgr; // size = 0x1C
#define OS_READ 0
#define OS_WRITE 1
/*
* I/O message types
*/
#define OS_MESG_TYPE_BASE 10
#define OS_MESG_TYPE_LOOPBACK (OS_MESG_TYPE_BASE+0)
#define OS_MESG_TYPE_DMAREAD (OS_MESG_TYPE_BASE+1)
#define OS_MESG_TYPE_DMAWRITE (OS_MESG_TYPE_BASE+2)
#define OS_MESG_TYPE_VRETRACE (OS_MESG_TYPE_BASE+3)
#define OS_MESG_TYPE_COUNTER (OS_MESG_TYPE_BASE+4)
#define OS_MESG_TYPE_EDMAREAD (OS_MESG_TYPE_BASE+5)
#define OS_MESG_TYPE_EDMAWRITE (OS_MESG_TYPE_BASE+6)
/*
* I/O message priority
*/
#define OS_MESG_PRI_NORMAL 0
#define OS_MESG_PRI_HIGH 1
void osCreatePiManager(OSPri pri, OSMesgQueue* cmdQ, OSMesg* cmdBuf, s32 cmdMsgCnt);
OSPiHandle* osCartRomInit(void);
s32 osEPiWriteIo(OSPiHandle* handle, uintptr_t devAddr, u32 data);
s32 osEPiReadIo(OSPiHandle* handle, uintptr_t devAddr, u32* data);
s32 osEPiStartDma(OSPiHandle* pihandle, OSIoMesg* mb, s32 direction);
s32 osEPiLinkHandle(OSPiHandle* handle);
#endif
+9
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@@ -0,0 +1,9 @@
#ifndef PR_OS_REG_H
#define PR_OS_REG_H
#include "ultratypes.h"
u32 osGetCount(void);
#endif
+10
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@@ -0,0 +1,10 @@
#ifndef PR_OS_SYSTEM_H
#define PR_OS_SYSTEM_H
#include "ultratypes.h"
u32 osGetMemSize(void);
s32 osAfterPreNMI(void);
#endif
+88
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@@ -0,0 +1,88 @@
#ifndef PR_OS_THREAD_H
#define PR_OS_THREAD_H
#include "ultratypes.h"
#define OS_FLAG_CPU_BREAK 1
#define OS_FLAG_FAULT 2
typedef s32 OSPri;
typedef s32 OSId;
typedef union {
struct {
/* 0x00 */ f32 f_odd;
/* 0x04 */ f32 f_even;
} f;
} __OSfp; // size = 0x08
typedef struct {
/* 0x000 */ u64 at, v0, v1, a0, a1, a2, a3;
/* 0x038 */ u64 t0, t1, t2, t3, t4, t5, t6, t7;
/* 0x078 */ u64 s0, s1, s2, s3, s4, s5, s6, s7;
/* 0x0B8 */ u64 t8, t9, gp, sp, s8, ra;
/* 0x0E8 */ u64 lo, hi;
/* 0x0F8 */ u32 sr, pc, cause, badvaddr, rcp;
/* 0x10C */ u32 fpcsr;
/* 0x110 */ __OSfp fp0, fp2, fp4, fp6, fp8, fp10, fp12, fp14;
/* 0x150 */ __OSfp fp16, fp18, fp20, fp22, fp24, fp26, fp28, fp30;
} __OSThreadContext; // size = 0x190
typedef struct {
/* 0x00 */ u32 flag;
/* 0x04 */ u32 count;
/* 0x08 */ u64 time;
} __OSThreadprofile; // size = 0x10
typedef struct OSThread {
/* 0x00 */ struct OSThread* next;
/* 0x04 */ OSPri priority;
/* 0x08 */ struct OSThread** queue;
/* 0x0C */ struct OSThread* tlnext;
/* 0x10 */ u16 state;
/* 0x12 */ u16 flags;
/* 0x14 */ OSId id;
/* 0x18 */ s32 fp;
/* 0x1C */ __OSThreadprofile* thprof;
/* 0x20 */ __OSThreadContext context;
} OSThread; // size = 0x1B0
#define OS_STATE_STOPPED (1 << 0)
#define OS_STATE_RUNNABLE (1 << 1)
#define OS_STATE_RUNNING (1 << 2)
#define OS_STATE_WAITING (1 << 3)
#define OS_PRIORITY_IDLE 0
#define OS_PRIORITY_MAIN 10
#define OS_PRIORITY_GRAPH 11
#define OS_PRIORITY_AUDIOMGR 12
#define OS_PRIORITY_PADMGR 14
#define OS_PRIORITY_SCHED 15
#define OS_PRIORITY_DMAMGR 16
#define OS_PRIORITY_IRQMGR 17
#define OS_PRIORITY_PIMGR 150
#define OS_PRIORITY_FAULTCLIENT 126
#define OS_PRIORITY_FAULT 127
#define OS_PRIORITY_APPMAX 127
#define OS_PRIORITY_RMONSPIN 200
#define OS_PRIORITY_RMON 250
#define OS_PRIORITY_VIMGR 254
#define OS_PRIORITY_MAX 255
#define OS_PRIORITY_THREADTAIL -1
void osCreateThread(OSThread* thread, OSId id, void* entry, void* arg, void* sp, OSPri p);
void osDestroyThread(OSThread* t);
void osYieldThread(void);
void osStartThread(OSThread* t);
void osStopThread(OSThread* t);
OSId osGetThreadId(OSThread* t);
void osSetThreadPri(OSThread* thread, OSPri p);
OSPri osGetThreadPri(OSThread* t);
// internal
OSThread* __osGetActiveQueue(void);
#endif
+25
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@@ -0,0 +1,25 @@
#ifndef PR_OS_TIME_H
#define PR_OS_TIME_H
#include "ultratypes.h"
#include "os_message.h"
typedef u64 OSTime;
typedef struct OSTimer_s {
/* 0x00 */ struct OSTimer_s* next;
/* 0x04 */ struct OSTimer_s* prev;
/* 0x08 */ OSTime interval;
/* 0x10 */ OSTime value;
/* 0x18 */ OSMesgQueue* mq;
/* 0x1C */ OSMesg msg;
} OSTimer; // size = 0x20
OSTime osGetTime(void);
void osSetTime(OSTime ticks);
s32 osSetTimer(OSTimer* t, OSTime value, OSTime interval, OSMesgQueue* mq, OSMesg msg);
s32 osStopTimer(OSTimer* t);
#endif
+9
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@@ -0,0 +1,9 @@
#ifndef PR_OS_TLB_H
#define PR_OS_TLB_H
#include "ultratypes.h"
void osMapTLBRdb(void);
void osUnmapTLBAll(void);
#endif
+135
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@@ -0,0 +1,135 @@
#ifndef PR_OS_VI_H
#define PR_OS_VI_H
#include "PR/ultratypes.h"
#include "PR/os_message.h"
/* Special Features */
#define OS_VI_GAMMA_ON (1 << 0)
#define OS_VI_GAMMA_OFF (1 << 1)
#define OS_VI_GAMMA_DITHER_ON (1 << 2)
#define OS_VI_GAMMA_DITHER_OFF (1 << 3)
#define OS_VI_DIVOT_ON (1 << 4)
#define OS_VI_DIVOT_OFF (1 << 5)
#define OS_VI_DITHER_FILTER_ON (1 << 6)
#define OS_VI_DITHER_FILTER_OFF (1 << 7)
#define OS_VI_GAMMA 0x08
#define OS_VI_GAMMA_DITHER 0x04
#define OS_VI_DIVOT 0x10
#define OS_VI_DITHER_FILTER 0x10000
#define OS_VI_UNK1 0x1
#define OS_VI_UNK2 0x2
#define OS_VI_UNK40 0x40
#define OS_VI_UNK100 0x100
#define OS_VI_UNK200 0x200
#define OS_VI_UNK1000 0x1000
#define OS_VI_UNK2000 0x2000
typedef struct {
/* 0x00 */ u32 ctrl;
/* 0x04 */ u32 width;
/* 0x08 */ u32 burst;
/* 0x0C */ u32 vSync;
/* 0x10 */ u32 hSync;
/* 0x14 */ u32 leap;
/* 0x18 */ u32 hStart;
/* 0x1C */ u32 xScale;
/* 0x20 */ u32 vCurrent;
} OSViCommonRegs; // size = 0x20
typedef struct {
/* 0x00 */ u32 origin;
/* 0x04 */ u32 yScale;
/* 0x08 */ u32 vStart;
/* 0x0C */ u32 vBurst;
/* 0x10 */ u32 vIntr;
} OSViFieldRegs; // size = 0x14
typedef struct {
/* 0x00 */ u8 type;
/* 0x04 */ OSViCommonRegs comRegs;
/* 0x24 */ OSViFieldRegs fldRegs[2];
} OSViMode; // size = 0x4C
#define OS_VI_NTSC_LPN1 0 /* NTSC */
#define OS_VI_NTSC_LPF1 1
#define OS_VI_NTSC_LAN1 2
#define OS_VI_NTSC_LAF1 3
#define OS_VI_NTSC_LPN2 4
#define OS_VI_NTSC_LPF2 5
#define OS_VI_NTSC_LAN2 6
#define OS_VI_NTSC_LAF2 7
#define OS_VI_NTSC_HPN1 8
#define OS_VI_NTSC_HPF1 9
#define OS_VI_NTSC_HAN1 10
#define OS_VI_NTSC_HAF1 11
#define OS_VI_NTSC_HPN2 12
#define OS_VI_NTSC_HPF2 13
#define OS_VI_PAL_LPN1 14 /* PAL */
#define OS_VI_PAL_LPF1 15
#define OS_VI_PAL_LAN1 16
#define OS_VI_PAL_LAF1 17
#define OS_VI_PAL_LPN2 18
#define OS_VI_PAL_LPF2 19
#define OS_VI_PAL_LAN2 20
#define OS_VI_PAL_LAF2 21
#define OS_VI_PAL_HPN1 22
#define OS_VI_PAL_HPF1 23
#define OS_VI_PAL_HAN1 24
#define OS_VI_PAL_HAF1 25
#define OS_VI_PAL_HPN2 26
#define OS_VI_PAL_HPF2 27
#define OS_VI_MPAL_LPN1 28 /* MPAL */
#define OS_VI_MPAL_LPF1 29
#define OS_VI_MPAL_LAN1 30
#define OS_VI_MPAL_LAF1 31
#define OS_VI_MPAL_LPN2 32
#define OS_VI_MPAL_LPF2 33
#define OS_VI_MPAL_LAN2 34
#define OS_VI_MPAL_LAF2 35
#define OS_VI_MPAL_HPN1 36
#define OS_VI_MPAL_HPF1 37
#define OS_VI_MPAL_HAN1 38
#define OS_VI_MPAL_HAF1 39
#define OS_VI_MPAL_HPN2 40
#define OS_VI_MPAL_HPF2 41
#define OS_VI_FPAL_LPN1 42 /* FPAL */
#define OS_VI_FPAL_LPF1 43
#define OS_VI_FPAL_LAN1 44
#define OS_VI_FPAL_LAF1 45
#define OS_VI_FPAL_LPN2 46
#define OS_VI_FPAL_LPF2 47
#define OS_VI_FPAL_LAN2 48
#define OS_VI_FPAL_LAF2 49
#define OS_VI_FPAL_HPN1 50
#define OS_VI_FPAL_HPF1 51
#define OS_VI_FPAL_HAN1 52
#define OS_VI_FPAL_HAF1 53
#define OS_VI_FPAL_HPN2 54
#define OS_VI_FPAL_HPF2 55
#define OS_TV_PAL 0
#define OS_TV_NTSC 1
#define OS_TV_MPAL 2
#define OS_VI_UNK28 28
void* osViGetCurrentFramebuffer(void);
void* osViGetNextFramebuffer(void);
void osViSetXScale(f32 value);
void osViSetYScale(f32 value);
void osViExtendVStart(u32 a0);
void osViSetSpecialFeatures(u32 func);
void osViSetMode(OSViMode* modep);
void osViSetEvent(OSMesgQueue* mq, OSMesg m, u32 retraceCount);
void osViSwapBuffer(void* frameBufPtr);
void osViBlack(u8 active);
void osCreateViManager(OSPri pri);
#endif
+43
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@@ -0,0 +1,43 @@
#ifndef PR_OS_VOICE_H
#define PR_OS_VOICE_H
#include "ultratypes.h"
#include "os_message.h"
typedef enum OsVoiceHandleMode {
/* 0 */ VOICE_HANDLE_MODE_0,
/* 1 */ VOICE_HANDLE_MODE_1,
/* 2 */ VOICE_HANDLE_MODE_2,
/* 3 */ VOICE_HANDLE_MODE_3,
/* 4 */ VOICE_HANDLE_MODE_4
} OsVoiceHandleMode;
typedef struct {
/* 0x0 */ OSMesgQueue* mq;
/* 0x4 */ s32 channel; // Controller port
/* 0x8 */ OsVoiceHandleMode mode;
/* 0xC */ u8 status;
} OSVoiceHandle; // size = 0x10
typedef struct {
/* 0x00 */ u16 warning; // Warning
/* 0x02 */ u16 answerNum; // Candidate number (0~5)
/* 0x04 */ u16 voiceLevel; // Voice input level
/* 0x06 */ u16 voiceRelLevel; // Relative voice level "voice_sn"
/* 0x08 */ u16 voiceTime; // Voice input time
/* 0x0A */ u16 answer[5]; // Candidate word number
/* 0x14 */ u16 distance[5]; // Distance value
} OSVoiceData; // size = 0x20
s32 osVoiceInit(OSMesgQueue* mq, OSVoiceHandle* hd, int channel);
s32 osVoiceSetWord(OSVoiceHandle* hd, u8* word);
s32 osVoiceCheckWord(u8* word);
s32 osVoiceStartReadData(OSVoiceHandle* hd);
s32 osVoiceStopReadData(OSVoiceHandle* hd);
s32 osVoiceGetReadData(OSVoiceHandle* hd, OSVoiceData* result);
s32 osVoiceClearDictionary(OSVoiceHandle* hd, u8 numWords);
s32 osVoiceMaskDictionary(OSVoiceHandle* hd, u8* maskPattern, int size);
s32 osVoiceControlGain(OSVoiceHandle* hd, s32 analog, s32 digital);
#endif
+38
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@@ -0,0 +1,38 @@
#ifndef PR_OSINT_H
#define PR_OSINT_H
#include "ultratypes.h"
#include "os_message.h"
#include "os.h"
#include "os_internal.h"
typedef struct __OSEventState {
/* 0x0 */ OSMesgQueue* messageQueue;
/* 0x4 */ OSMesg message;
} __OSEventState; // size = 0x8
typedef struct __OSThreadTail {
/* 0x0 */ OSThread* next;
/* 0x4 */ OSPri priority;
} __OSThreadTail; // size = 0x8
void __osEnqueueAndYield(OSThread** param_1);
void __osDequeueThread(OSThread** queue, OSThread* t);
void __osEnqueueThread(OSThread** param_1, OSThread* param_2);
OSThread* __osPopThread(OSThread** param_1);
void __osDispatchThread(void);
void __osCleanupThread(void);
void __osSetTimerIntr(OSTime tim);
OSTime __osInsertTimer(OSTimer* t);
void __osTimerInterrupt(void);
u32 __osProbeTLB(void* param_1);
s32 __osSpDeviceBusy(void);
void __osTimerServicesInit(void);
extern __osHwInt __osHwIntTable[];
extern __OSEventState __osEventStateTab[OS_NUM_EVENTS];
#endif
+20
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@@ -0,0 +1,20 @@
#ifndef PR_PIINT_H
#define PR_PIINT_H
#include "ultratypes.h"
#include "os_pi.h"
#include "libc/stdint.h"
void __osDevMgrMain(void* arg);
void __osPiCreateAccessQueue(void);
void __osPiRelAccess(void);
void __osPiGetAccess(void);
s32 __osPiRawStartDma(s32 direction, uintptr_t devAddr, void* dramAddr, size_t size);
s32 __osEPiRawWriteIo(OSPiHandle* handle, uintptr_t devAddr, u32 data);
s32 __osEPiRawReadIo(OSPiHandle* handle, uintptr_t devAddr, u32* data);
s32 __osEPiRawStartDma(OSPiHandle* handle, s32 direction, uintptr_t cartAddr, void* dramAddr, size_t size);
OSMesgQueue* osPiGetCmdQueue(void);
#endif
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@@ -0,0 +1,367 @@
#ifndef PR_R4300_H
#define PR_R4300_H
#ifdef _LANGUAGE_C
#include "ultratypes.h"
#define U32(x) ((u32)x)
#define C_REG(x) (x)
#else
#define U32(x) (x)
#define C_REG(x) $x
#endif
// Segment base addresses and sizes
#define KUBASE 0
#define KUSIZE 0x80000000
#define K0BASE 0x80000000
#define K0SIZE 0x20000000
#define K1BASE 0xA0000000
#define K1SIZE 0x20000000
#define K2BASE 0xC0000000
#define K2SIZE 0x20000000
// Exception vectors
#define SIZE_EXCVEC 0x80 // Size of an exc. vec
#define UT_VEC K0BASE // utlbmiss vector
#define R_VEC (K1BASE + 0x1FC00000) // reset vector
#define XUT_VEC (K0BASE + 0x80) // extended address tlbmiss
#define ECC_VEC (K0BASE + 0x100) // Ecc exception vector
#define E_VEC (K0BASE + 0x180) // Gen. exception vector
// Address conversion macros
#define K0_TO_K1(x) (U32(x) | 0xA0000000) // kseg0 to kseg1
#define K1_TO_K0(x) (U32(x) & 0x9FFFFFFF) // kseg1 to kseg0
#define K0_TO_PHYS(x) (U32(x) & 0x1FFFFFFF) // kseg0 to physical
#define K1_TO_PHYS(x) (U32(x) & 0x1FFFFFFF) // kseg1 to physical
#define KDM_TO_PHYS(x) (U32(x) & 0x1FFFFFFF) // direct mapped to physical
#define PHYS_TO_K0(x) (U32(x) | 0x80000000) // physical to kseg0
#define PHYS_TO_K1(x) (U32(x) | 0xA0000000) // physical to kseg1
// Address predicates
#define IS_KSEG0(x) (U32(x) >= K0BASE && U32(x) < K1BASE)
#define IS_KSEG1(x) (U32(x) >= K1BASE && U32(x) < K2BASE)
#define IS_KSEGDM(x) (U32(x) >= K0BASE && U32(x) < K2BASE)
#define IS_KSEG2(x) (U32(x) >= K2BASE && U32(x) < KPTE_SHDUBASE)
#define IS_KPTESEG(x) (U32(x) >= KPTE_SHDUBASE)
#define IS_KUSEG(x) (U32(x) < K0BASE)
// TLB size constants
#define NTLBENTRIES 31 /* entry 31 is reserved by rdb */
#define TLBHI_VPN2MASK 0xFFFFE000
#define TLBHI_VPN2SHIFT 13
#define TLBHI_PIDMASK 0xFF
#define TLBHI_PIDSHIFT 0
#define TLBHI_NPID 255 // 255 to fit in 8 bits
#define TLBLO_PFNMASK 0x3FFFFFC0
#define TLBLO_PFNSHIFT 6
#define TLBLO_CACHMASK 0x38 // cache coherency algorithm
#define TLBLO_CACHSHIFT 3
#define TLBLO_UNCACHED 0x10 // not cached
#define TLBLO_NONCOHRNT 0x18 // Cacheable non-coherent
#define TLBLO_EXLWR 0x28 // Exclusive write
#define TLBLO_D 0x4 // writeable
#define TLBLO_V 0x2 // valid bit
#define TLBLO_G 0x1 // global access bit
#define TLBINX_PROBE 0x80000000
#define TLBINX_INXMASK 0x3F
#define TLBINX_INXSHIFT 0
#define TLBRAND_RANDMASK 0x3F
#define TLBRAND_RANDSHIFT 0
#define TLBWIRED_WIREDMASK 0x3F
#define TLBCTXT_BASEMASK 0xFF800000
#define TLBCTXT_BASESHIFT 23
#define TLBCTXT_BASEBITS 9
#define TLBCTXT_VPNMASK 0x7FFFF0
#define TLBCTXT_VPNSHIFT 4
#define TLBPGMASK_4K 0x0
#define TLBPGMASK_16K 0x6000
#define TLBPGMASK_64K 0x1E000
/*
* Status register
*/
#define SR_CUMASK 0xF0000000 // coproc usable bits
#define SR_CU3 0x80000000 // Coprocessor 3 usable
#define SR_CU2 0x40000000 // Coprocessor 2 usable
#define SR_CU1 0x20000000 // Coprocessor 1 usable
#define SR_CU0 0x10000000 // Coprocessor 0 usable
#define SR_RP 0x08000000 // Reduced power (quarter speed)
#define SR_FR 0x04000000 // MIPS III FP register mode
#define SR_RE 0x02000000 // Reverse endian
#define SR_ITS 0x01000000 // Instruction trace support
#define SR_BEV 0x00400000 // Use boot exception vectors
#define SR_TS 0x00200000 // TLB shutdown
#define SR_SR 0x00100000 // Soft reset occured
#define SR_CH 0x00040000 // Cache hit for last 'cache' op
#define SR_CE 0x00020000 // Create ECC
#define SR_DE 0x00010000 // ECC of parity does not cause error
// Interrupt enable bits
// (NOTE: bits set to 1 enable the corresponding level interrupt)
#define SR_IMASK 0x0000FF00 // Interrupt mask
#define SR_IMASK8 0x00000000 // mask level 8
#define SR_IMASK7 0x00008000 // mask level 7
#define SR_IMASK6 0x0000C000 // mask level 6
#define SR_IMASK5 0x0000E000 // mask level 5
#define SR_IMASK4 0x0000F000 // mask level 4
#define SR_IMASK3 0x0000F800 // mask level 3
#define SR_IMASK2 0x0000FC00 // mask level 2
#define SR_IMASK1 0x0000FE00 // mask level 1
#define SR_IMASK0 0x0000FF00 // mask level 0
#define SR_IBIT8 0x00008000 // bit level 8
#define SR_IBIT7 0x00004000 // bit level 7
#define SR_IBIT6 0x00002000 // bit level 6
#define SR_IBIT5 0x00001000 // bit level 5
#define SR_IBIT4 0x00000800 // bit level 4
#define SR_IBIT3 0x00000400 // bit level 3
#define SR_IBIT2 0x00000200 // bit level 2
#define SR_IBIT1 0x00000100 // bit level 1
#define SR_IMASKSHIFT 8
#define SR_KX 0x00000080 // extended-addr TLB vec in kernel
#define SR_SX 0x00000040 // xtended-addr TLB vec supervisor
#define SR_UX 0x00000020 // xtended-addr TLB vec in user mode
#define SR_KSU_MASK 0x00000018 // mode mask
#define SR_KSU_USR 0x00000010 // user mode
#define SR_KSU_SUP 0x00000008 // supervisor mode
#define SR_KSU_KER 0x00000000 // kernel mode
#define SR_ERL 0x00000004 // Error level, 1=>cache error
#define SR_EXL 0x00000002 // Exception level, 1=>exception
#define SR_IE 0x00000001 // interrupt enable, 1=>enable
// Cause Register
#define CAUSE_BD 0x80000000 // Branch delay slot
#define CAUSE_CEMASK 0x30000000 // coprocessor error
#define CAUSE_CESHIFT 28
// Interrupt pending bits
#define CAUSE_IP8 0x00008000 // External level 8 pending - COMPARE
#define CAUSE_IP7 0x00004000 // External level 7 pending - INT4
#define CAUSE_IP6 0x00002000 // External level 6 pending - INT3
#define CAUSE_IP5 0x00001000 // External level 5 pending - INT2
#define CAUSE_IP4 0x00000800 // External level 4 pending - INT1
#define CAUSE_IP3 0x00000400 // External level 3 pending - INT0
#define CAUSE_SW2 0x00000200 // Software level 2 pending
#define CAUSE_SW1 0x00000100 // Software level 1 pending
#define CAUSE_IPMASK 0x0000FF00 // Pending interrupt mask
#define CAUSE_IPSHIFT 8
#define CAUSE_EXCMASK 0x0000007C // Cause code bits
#define CAUSE_EXCSHIFT 2
// Cause register exception codes
#define EXC_CODE(x) ((x) << 2)
// Hardware exception codes
#define EXC_INT EXC_CODE(0) // interrupt
#define EXC_MOD EXC_CODE(1) // TLB mod
#define EXC_RMISS EXC_CODE(2) // Read TLB Miss
#define EXC_WMISS EXC_CODE(3) // Write TLB Miss
#define EXC_RADE EXC_CODE(4) // Read Address Error
#define EXC_WADE EXC_CODE(5) // Write Address Error
#define EXC_IBE EXC_CODE(6) // Instruction Bus Error
#define EXC_DBE EXC_CODE(7) // Data Bus Error
#define EXC_SYSCALL EXC_CODE(8) // SYSCALL
#define EXC_BREAK EXC_CODE(9) // BREAKpoint
#define EXC_II EXC_CODE(10) // Illegal Instruction
#define EXC_CPU EXC_CODE(11) // CoProcessor Unusable
#define EXC_OV EXC_CODE(12) // OVerflow
#define EXC_TRAP EXC_CODE(13) // Trap exception
#define EXC_VCEI EXC_CODE(14) // Virt. Coherency on Inst. fetch
#define EXC_FPE EXC_CODE(15) // Floating Point Exception
#define EXC_WATCH EXC_CODE(23) // Watchpoint reference
#define EXC_VCED EXC_CODE(31) // Virt. Coherency on data read
// C0_PRID Defines
#define C0_IMPMASK 0xFF00
#define C0_IMPSHIFT 8
#define C0_REVMASK 0xFF
#define C0_MAJREVMASK 0xF0
#define C0_MAJREVSHIFT 4
#define C0_MINREVMASK 0xF
// Coprocessor 0 operations
#define C0_READI 0x1 // read ITLB entry addressed by C0_INDEX
#define C0_WRITEI 0x2 // write ITLB entry addressed by C0_INDEX
#define C0_WRITER 0x6 // write ITLB entry addressed by C0_RAND
#define C0_PROBE 0x8 // probe for ITLB entry addressed by TLBHI
#define C0_RFE 0x10 // restore for exception
// 'cache' instruction definitions
// Target cache
#define CACH_PI 0x0 // specifies primary inst. cache
#define CACH_PD 0x1 // primary data cache
#define CACH_SI 0x2 // secondary instruction cache
#define CACH_SD 0x3 // secondary data cache
// Cache operations
#define C_IINV 0x0 // index invalidate (inst, 2nd inst)
#define C_IWBINV 0x0 // index writeback inval (d, sd)
#define C_ILT 0x4 // index load tag (all)
#define C_IST 0x8 // index store tag (all)
#define C_CDX 0xC // create dirty exclusive (d, sd)
#define C_HINV 0x10 // hit invalidate (all)
#define C_HWBINV 0x14 // hit writeback inv. (d, sd)
#define C_FILL 0x14 // fill (i)
#define C_HWB 0x18 // hit writeback (i, d, sd)
#define C_HSV 0x1C // hit set virt. (si, sd)
// Cache size definitions
#define ICACHE_SIZE 0x4000 // 16K
#define ICACHE_LINESIZE 32 // 8 words
#define ICACHE_LINEMASK (ICACHE_LINESIZE - 1)
#define DCACHE_SIZE 0x2000 // 8K
#define DCACHE_LINESIZE 16 // 4 words
#define DCACHE_LINEMASK (DCACHE_LINESIZE - 1)
// C0_CONFIG register definitions
#define CONFIG_CM 0x80000000 // 1 == Master-Checker enabled
#define CONFIG_EC 0x70000000 // System Clock ratio
#define CONFIG_EC_1_1 0x6 // System Clock ratio 1 :1
#define CONFIG_EC_3_2 0x7 // System Clock ratio 1.5 :1
#define CONFIG_EC_2_1 0x0 // System Clock ratio 2 :1
#define CONFIG_EC_3_1 0x1 // System Clock ratio 3 :1
#define CONFIG_EP 0x0F000000 // Transmit Data Pattern
#define CONFIG_SB 0x00C00000 // Secondary cache block size
#define CONFIG_SS 0x00200000 // Split scache: 0 == I&D combined
#define CONFIG_SW 0x00100000 // scache port: 0==128, 1==64
#define CONFIG_EW 0x000C0000 // System Port width: 0==64, 1==32
#define CONFIG_SC 0x00020000 // 0 -> 2nd cache present
#define CONFIG_SM 0x00010000 // 0 -> Dirty Shared Coherency enable
#define CONFIG_BE 0x00008000 // Endian-ness: 1 --> BE
#define CONFIG_EM 0x00004000 // 1 -> ECC mode, 0 -> parity
#define CONFIG_EB 0x00002000 // Block order:1->sequent,0->subblock
#define CONFIG_IC 0x00000E00 // Primary Icache size
#define CONFIG_DC 0x000001C0 // Primary Dcache size
#define CONFIG_IB 0x00000020 // Icache block size
#define CONFIG_DB 0x00000010 // Dcache block size
#define CONFIG_CU 0x00000008 // Update on Store-conditional
#define CONFIG_K0 0x00000007 // K0SEG Coherency algorithm
#define CONFIG_UNCACHED 0x00000002 // K0 is uncached
#define CONFIG_NONCOHRNT 0x00000003
#define CONFIG_COHRNT_EXLWR 0x00000005
#define CONFIG_SB_SHFT 22 // shift SB to bit position 0
#define CONFIG_IC_SHFT 9 // shift IC to bit position 0
#define CONFIG_DC_SHFT 6 // shift DC to bit position 0
#define CONFIG_BE_SHFT 15 // shift BE to bit position 0
// C0_TAGLO definitions for setting/getting cache states and physaddr bits
#define SADDRMASK 0xFFFFE000 // 31..13 -> scache paddr bits 35..17
#define SVINDEXMASK 0x00000380 // 9..7: prim virt index bits 14..12
#define SSTATEMASK 0x00001C00 // bits 12..10 hold scache line state
#define SINVALID 0x00000000 // invalid --> 000 == state 0
#define SCLEANEXCL 0x00001000 // clean exclusive --> 100 == state 4
#define SDIRTYEXCL 0x00001400 // dirty exclusive --> 101 == state 5
#define SECC_MASK 0x0000007F // low 7 bits are ecc for the tag
#define SADDR_SHIFT 4 // shift STagLo (31..13) to 35..17
#define PADDRMASK 0xFFFFFF00 // PTagLo31..8->prim paddr bits35..12
#define PADDR_SHIFT 4 // roll bits 35..12 down to 31..8
#define PSTATEMASK 0x00C0 // bits 7..6 hold primary line state
#define PINVALID 0x0000 // invalid --> 000 == state 0
#define PCLEANEXCL 0x0080 // clean exclusive --> 10 == state 2
#define PDIRTYEXCL 0x00C0 // dirty exclusive --> 11 == state 3
#define PPARITY_MASK 0x0001 // low bit is parity bit (even).
// C0_CACHE_ERR definitions.
#define CACHERR_ER 0x80000000 // 0: inst ref, 1: data ref
#define CACHERR_EC 0x40000000 // 0: primary, 1: secondary
#define CACHERR_ED 0x20000000 // 1: data error
#define CACHERR_ET 0x10000000 // 1: tag error
#define CACHERR_ES 0x08000000 // 1: external ref, e.g. snoo
#define CACHERR_EE 0x04000000 // error on SysAD bus
#define CACHERR_EB 0x02000000 // complicated, see spec.
#define CACHERR_EI 0x01000000 // complicated, see spec.
#define CACHERR_SIDX_MASK 0x003FFFF8 // secondary cache index
#define CACHERR_PIDX_MASK 0x00000007 // primary cache index
#define CACHERR_PIDX_SHIFT 12 // bits 2..0 are paddr14..12
/*
* R4000 family supports hardware watchpoints:
* C0_WATCHLO:
* bits 31..3 are bits 31..3 of physaddr to watch
* bit 2: reserved; must be written as 0.
* bit 1: when set causes a watchpoint trap on load accesses to paddr.
* bit 0: when set traps on stores to paddr;
* C0_WATCHHI
* bits 31..4 are reserved and must be written as zeros.
* bits 3..0 are bits 35..32 of the physaddr to watch
*/
#define WATCHLO_WTRAP 0x00000001
#define WATCHLO_RTRAP 0x00000002
#define WATCHLO_ADDRMASK 0xFFFFFFF8
#define WATCHLO_VALIDMASK 0xFFFFFFFB
#define WATCHHI_VALIDMASK 0x0000000F
// Coprocessor 0 registers
#define C0_INX C_REG(0)
#define C0_RAND C_REG(1)
#define C0_ENTRYLO0 C_REG(2)
#define C0_ENTRYLO1 C_REG(3)
#define C0_CONTEXT C_REG(4)
#define C0_PAGEMASK C_REG(5) // page mask
#define C0_WIRED C_REG(6) // # wired entries in tlb
#define C0_BADVADDR C_REG(8)
#define C0_COUNT C_REG(9) // free-running counter
#define C0_ENTRYHI C_REG(10)
#define C0_COMPARE C_REG(11) // counter comparison reg.
#define C0_SR C_REG(12)
#define C0_CAUSE C_REG(13)
#define C0_EPC C_REG(14)
#define C0_PRID C_REG(15) // revision identifier
#define C0_CONFIG C_REG(16) // hardware configuration
#define C0_LLADDR C_REG(17) // load linked address
#define C0_WATCHLO C_REG(18) // watchpoint
#define C0_WATCHHI C_REG(19) // watchpoint
#define C0_ECC C_REG(26) // S-cache ECC and primary parity
#define C0_CACHE_ERR C_REG(27) // cache error status
#define C0_TAGLO C_REG(28) // cache operations
#define C0_TAGHI C_REG(29) // cache operations
#define C0_ERROR_EPC C_REG(30) // ECC error prg. counter
// floating-point status register
#define C1_FPCSR C_REG(31)
#define FPCSR_FS 0x01000000 // flush denorm to zero
#define FPCSR_C 0x00800000 // condition bit
#define FPCSR_CE 0x00020000 // cause: unimplemented operation
#define FPCSR_CV 0x00010000 // cause: invalid operation
#define FPCSR_CZ 0x00008000 // cause: division by zero
#define FPCSR_CO 0x00004000 // cause: overflow
#define FPCSR_CU 0x00002000 // cause: underflow
#define FPCSR_CI 0x00001000 // cause: inexact operation
#define FPCSR_EV 0x00000800 // enable: invalid operation
#define FPCSR_EZ 0x00000400 // enable: division by zero
#define FPCSR_EO 0x00000200 // enable: overflow
#define FPCSR_EU 0x00000100 // enable: underflow
#define FPCSR_EI 0x00000080 // enable: inexact operation
#define FPCSR_FV 0x00000040 // flag: invalid operation
#define FPCSR_FZ 0x00000020 // flag: division by zero
#define FPCSR_FO 0x00000010 // flag: overflow
#define FPCSR_FU 0x00000008 // flag: underflow
#define FPCSR_FI 0x00000004 // flag: inexact operation
#define FPCSR_RM_MASK 0x00000003 // rounding mode mask
#define FPCSR_RM_RN 0x00000000 // round to nearest
#define FPCSR_RM_RZ 0x00000001 // round to zero
#define FPCSR_RM_RP 0x00000002 // round to positive infinity
#define FPCSR_RM_RM 0x00000003 // round to negative infinity
#endif
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#ifndef PR_RCP_H
#define PR_RCP_H
#define VI_NTSC_CLOCK 48681812 /* Hz = 48.681812 MHz */
#define VI_PAL_CLOCK 49656530 /* Hz = 49.656530 MHz */
#define VI_MPAL_CLOCK 48628316 /* Hz = 48.628316 MHz */
#define DEVICE_TYPE_CART 0 /* ROM cartridge */
#define DEVICE_TYPE_BULK 1 /* ROM bulk */
#define DEVICE_TYPE_64DD 2 /* 64 Disk Drive */
#define DEVICE_TYPE_SRAM 3 /* SRAM */
#define DEVICE_TYPE_INIT 7 /* initial value */
#define CHNL_ERR_NORESP 0x80 /* Bit 7 (Rx): No response error */
#define CHNL_ERR_OVERRUN 0x40 /* Bit 6 (Rx): Overrun error */
#define CHNL_ERR_FRAME 0x80 /* Bit 7 (Tx): Frame error */
#define CHNL_ERR_COLLISION 0x40 /* Bit 6 (Tx): Collision error */
#define CHNL_ERR_MASK 0xC0 /* Bit 6-7: channel errors */
#define IO_READ(addr) (*(vu32*)PHYS_TO_K1(addr))
#define IO_WRITE(addr,data) (*(vu32*)PHYS_TO_K1(addr)=(u32)(data))
#endif
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#ifndef PR_RDP_H
#define PR_RDP_H
/* DP Command Registers */
#define DPC_START_REG 0x04100000
#define DPC_END_REG 0x04100004
#define DPC_CURRENT_REG 0x04100008
#define DPC_STATUS_REG 0x0410000C
#define DPC_CLOCK_REG 0x04100010
#define DPC_BUFBUSY_REG 0x04100014
#define DPC_PIPEBUSY_REG 0x04100018
#define DPC_TMEM_REG 0x0410001C
/* DP Span Registers */
#define DPS_TBIST_REG 0x04200000
#define DPS_TEST_MODE_REG 0x04200004
#define DPS_BUFTEST_ADDR_REG 0x04200008
#define DPS_BUFTEST_DATA_REG 0x0420000C
/* DP Status Read Flags */
#define DPC_STATUS_XBUS_DMEM_DMA (1 << 0)
#define DPC_STATUS_FREEZE (1 << 1)
#define DPC_STATUS_FLUSH (1 << 2)
#define DPC_STATUS_START_GCLK (1 << 3)
#define DPC_STATUS_TMEM_BUSY (1 << 4)
#define DPC_STATUS_PIPE_BUSY (1 << 5)
#define DPC_STATUS_CMD_BUSY (1 << 6)
#define DPC_STATUS_CBUF_READY (1 << 7)
#define DPC_STATUS_DMA_BUSY (1 << 8)
#define DPC_STATUS_END_VALID (1 << 9)
#define DPC_STATUS_START_VALID (1 << 10)
/* DP Status Write Flags */
#define DPC_CLR_XBUS_DMEM_DMA (1 << 0)
#define DPC_SET_XBUS_DMEM_DMA (1 << 1)
#define DPC_CLR_FREEZE (1 << 2)
#define DPC_SET_FREEZE (1 << 3)
#define DPC_CLR_FLUSH (1 << 4)
#define DPC_SET_FLUSH (1 << 5)
#define DPC_CLR_TMEM_CTR (1 << 6)
#define DPC_CLR_PIPE_CTR (1 << 7)
#define DPC_CLR_CMD_CTR (1 << 8)
#define DPC_CLR_CLOCK_CTR (1 << 9)
u32 osDpGetStatus(void);
void osDpSetStatus(u32 data);
#endif
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#ifndef PR_RSP_H
#define PR_RSP_H
#include "ultratypes.h"
#include "libc/stddef.h"
/* SP Status Flags */
#define SP_STATUS_HALT (1 << 0)
#define SP_STATUS_BROKE (1 << 1)
#define SP_STATUS_DMA_BUSY (1 << 2)
#define SP_STATUS_DMA_FULL (1 << 3)
#define SP_STATUS_IO_FULL (1 << 4)
#define SP_STATUS_SSTEP (1 << 5)
#define SP_STATUS_INTR_BREAK (1 << 6)
#define SP_STATUS_YIELD (1 << 7) // SIG0
#define SP_STATUS_YIELDED (1 << 8) // SIG1
#define SP_STATUS_TASKDONE (1 << 9) // SIG2
#define SP_STATUS_SIG3 (1 << 10)
#define SP_STATUS_SIG4 (1 << 11)
#define SP_STATUS_SIG5 (1 << 12)
#define SP_STATUS_SIG6 (1 << 13)
#define SP_STATUS_SIG7 (1 << 14)
#define SP_CLR_HALT (1 << 0)
#define SP_SET_HALT (1 << 1)
#define SP_CLR_BROKE (1 << 2)
#define SP_CLR_INTR (1 << 3)
#define SP_SET_INTR (1 << 4)
#define SP_CLR_SSTEP (1 << 5)
#define SP_SET_SSTEP (1 << 6)
#define SP_CLR_INTR_BREAK (1 << 7)
#define SP_SET_INTR_BREAK (1 << 8)
#define SP_CLR_SIG0 (1 << 9)
#define SP_SET_SIG0 (1 << 10)
#define SP_CLR_SIG1 (1 << 11)
#define SP_SET_SIG1 (1 << 12)
#define SP_CLR_SIG2 (1 << 13)
#define SP_SET_SIG2 (1 << 14)
#define SP_CLR_SIG3 (1 << 15)
#define SP_SET_SIG3 (1 << 16)
#define SP_CLR_SIG4 (1 << 17)
#define SP_SET_SIG4 (1 << 18)
#define SP_CLR_SIG5 (1 << 19)
#define SP_SET_SIG5 (1 << 20)
#define SP_CLR_SIG6 (1 << 21)
#define SP_SET_SIG6 (1 << 22)
#define SP_CLR_SIG7 (1 << 23)
#define SP_SET_SIG7 (1 << 24)
u32 __osSpGetStatus(void);
void __osSpSetStatus(u32 data);
s32 __osSpSetPc(void* pc);
s32 __osSpRawStartDma(s32 direction, void* devAddr, void* dramAddr, size_t size);
#endif
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#ifndef SCHED_H
#define SCHED_H
#ifndef PR_SCHED_H
#define PR_SCHED_H
#include "PR/ultratypes.h"
#include "ultra64/vi.h"
#include "ultra64/sptask.h"
#include "PR/os_vi.h"
#include "PR/sptask.h"
#define OS_SC_STACKSIZE 0x2000
#define OS_SC_RETRACE_MSG 1
#define OS_SC_DONE_MSG 2
#define OS_SC_NMI_MSG 3 // name is made up, 3 is OS_SC_RDP_DONE_MSG in the original sched.c
#define OS_SC_PRE_NMI_MSG 4
#define OS_SC_NEEDS_RDP 0x0001
#define OS_SC_NEEDS_RSP 0x0002
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#ifndef PR_SIINT_H
#define PR_SIINT_H
#include "ultratypes.h"
void __osSiGetAccess(void);
void __osSiRelAccess(void);
s32 __osSiDeviceBusy(void);
void __osSiCreateAccessQueue(void);
#endif
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#ifndef PR_SPTASK_H
#define PR_SPTASK_H
#include "PR/ultratypes.h"
#include "libc/stddef.h"
/* Task Types */
#define M_NULTASK 0
#define M_GFXTASK 1
#define M_AUDTASK 2
#define M_VIDTASK 3
#define M_NJPEGTASK 4
#define M_HVQTASK 6
#define M_HVQMTASK 7
/* Task Flags */
#define M_TASK_FLAG0 (1 << 0)
#define M_TASK_FLAG1 (1 << 1)
/* Task Flag Fields */
#define OS_TASK_YIELDED (1 << 0)
#define OS_TASK_DP_WAIT (1 << 1)
#define OS_TASK_LOADABLE (1 << 2)
#define OS_TASK_SP_ONLY (1 << 3)
#define OS_TASK_USR0 (1 << 4)
#define OS_TASK_USR1 (1 << 5)
#define OS_TASK_USR2 (1 << 6)
#define OS_TASK_USR3 (1 << 7)
#define OS_YIELD_DATA_SIZE 0xC00
#define OS_YIELD_AUDIO_SIZE 0x400
/* SpStatus */
/* Write */
#define SPSTATUS_CLEAR_HALT (1 << 0)
#define SPSTATUS_SET_HALT (1 << 1)
#define SPSTATUS_CLEAR_BROKE (1 << 2)
#define SPSTATUS_CLEAR_INTR (1 << 3)
#define SPSTATUS_SET_INTR (1 << 4)
#define SPSTATUS_CLEAR_SSTEP (1 << 5)
#define SPSTATUS_SET_SSTEP (1 << 6)
#define SPSTATUS_CLEAR_INTR_ON_BREAK (1 << 7)
#define SPSTATUS_SET_INTR_ON_BREAK (1 << 8)
#define SPSTATUS_CLEAR_SIGNAL0 (1 << 9)
#define SPSTATUS_SET_SIGNAL0 (1 << 10)
#define SPSTATUS_CLEAR_SIGNAL1 (1 << 11)
#define SPSTATUS_SET_SIGNAL1 (1 << 12)
#define SPSTATUS_CLEAR_SIGNAL2 (1 << 13)
#define SPSTATUS_SET_SIGNAL2 (1 << 14)
#define SPSTATUS_CLEAR_SIGNAL3 (1 << 15)
#define SPSTATUS_SET_SIGNAL3 (1 << 16)
#define SPSTATUS_CLEAR_SIGNAL4 (1 << 17)
#define SPSTATUS_SET_SIGNAL4 (1 << 18)
#define SPSTATUS_CLEAR_SIGNAL5 (1 << 19)
#define SPSTATUS_SET_SIGNAL5 (1 << 20)
#define SPSTATUS_CLEAR_SIGNAL6 (1 << 21)
#define SPSTATUS_SET_SIGNAL6 (1 << 23)
#define SPSTATUS_CLEAR_SIGNAL7 (1 << 24)
#define SPSTATUS_SET_SIGNAL7 (1 << 25)
/* Read */
#define SPSTATUS_HALT (1 << 0)
#define SPSTATUS_BROKE (1 << 1)
#define SPSTATUS_DMA_BUSY (1 << 2)
#define SPSTATUS_DMA_FULL (1 << 3)
#define SPSTATUS_IO_FULL (1 << 4)
#define SPSTATUS_SINGLE_STEP (1 << 5)
#define SPSTATUS_INTERRUPT_ON_BREAK (1 << 6)
#define SPSTATUS_SIGNAL0_SET (1 << 7)
#define SPSTATUS_SIGNAL1_SET (1 << 8)
#define SPSTATUS_SIGNAL2_SET (1 << 9)
#define SPSTATUS_SIGNAL3_SET (1 << 10)
#define SPSTATUS_SIGNAL4_SET (1 << 11)
#define SPSTATUS_SIGNAL5_SET (1 << 12)
#define SPSTATUS_SIGNAL6_SET (1 << 13)
#define SPSTATUS_SIGNAL7_SET (1 << 14)
typedef struct {
/* 0x00 */ u32 type;
/* 0x04 */ u32 flags;
/* 0x08 */ u64* ucodeBoot;
/* 0x0C */ u32 ucodeBootSize; // ucode will load these sizes with lw, so need to be 32-bit
/* 0x10 */ u64* ucode;
/* 0x14 */ u32 ucodeSize;
/* 0x18 */ u64* ucodeData;
/* 0x1C */ u32 ucodeDataSize;
/* 0x20 */ u64* dramStack;
/* 0x24 */ u32 dramStackSize;
/* 0x28 */ u64* outputBuff;
/* 0x2C */ u64* outputBuffSize;
/* 0x30 */ u64* dataPtr;
/* 0x34 */ u32 dataSize;
/* 0x38 */ u64* yieldDataPtr;
/* 0x3C */ u32 yieldDataSize;
} OSTask_t; // size = 0x40
typedef union {
OSTask_t t;
long long int force_structure_alignment;
} OSTask;
typedef u32 OSYieldResult;
void osSpTaskLoad(OSTask* intp);
void osSpTaskStartGo(OSTask* tp);
void osSpTaskYield(void);
OSYieldResult osSpTaskYielded(OSTask* task);
#endif
+31
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@@ -0,0 +1,31 @@
#ifndef PR_UCODE_H
#define PR_UCODE_H
#include "PR/ultratypes.h"
#define SP_DRAM_STACK_SIZE8 0x400
#define SP_DRAM_STACK_SIZE64 (SP_DRAM_STACK_SIZE8 >> 3)
#define SP_UCODE_SIZE 0x1000
#define SP_UCODE_DATA_SIZE 0x800
extern u64 rspbootTextStart[];
extern u64 rspbootTextEnd[];
extern u64 aspMainTextStart[];
extern u64 aspMainTextEnd[];
extern u64 aspMainDataStart[];
extern u64 aspMainDataEnd[];
extern u64 gspF3DZEX2_NoN_PosLight_fifoTextStart[];
extern u64 gspF3DZEX2_NoN_PosLight_fifoTextEnd[];
extern u64 gspF3DZEX2_NoN_PosLight_fifoDataStart[];
extern u64 gspF3DZEX2_NoN_PosLight_fifoDataEnd[];
extern u64 gspS2DEX2_fifoTextStart[];
extern u64 gspS2DEX2_fifoTextEnd[];
extern u64 gspS2DEX2_fifoDataStart[];
extern u64 gspS2DEX2_fifoDataEnd[];
#endif
+3 -23
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@@ -1,5 +1,5 @@
#ifndef _ULTRATYPES_H_
#define _ULTRATYPES_H_
#ifndef PR_ULTRATYPES_H
#define PR_ULTRATYPES_H
typedef signed char s8;
typedef unsigned char u8;
@@ -22,27 +22,7 @@ typedef volatile s64 vs64;
typedef float f32;
typedef double f64;
// TODO: move this somewhere else
typedef void* TexturePtr;
typedef long int Mtx_t[4][4];
typedef union {
Mtx_t m;
struct {
u16 intPart[4][4];
u16 fracPart[4][4];
};
long long int forc_structure_alignment;
} Mtx; // size = 0x40
typedef float MtxF_t[4][4];
typedef union {
MtxF_t mf;
struct {
float xx, yx, zx, wx,
xy, yy, zy, wy,
xz, yz, zz, wz,
xw, yw, zw, ww;
};
} MtxF; // size = 0x40
#endif
+73
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@@ -0,0 +1,73 @@
#ifndef PR_VIINT_H
#define PR_VIINT_H
#include "ultratypes.h"
#define OS_TV_TYPE_PAL 0
#define OS_TV_TYPE_NTSC 1
#define OS_TV_TYPE_MPAL 2
#define VI_STATE_MODE_UPDATED (1 << 0)
#define VI_STATE_XSCALE_UPDATED (1 << 1)
#define VI_STATE_YSCALE_UPDATED (1 << 2)
#define VI_STATE_CTRL_UPDATED (1 << 3) // related to control regs changing
#define VI_STATE_BUFFER_UPDATED (1 << 4) // swap buffer
#define VI_STATE_BLACK (1 << 5) // probably related to a black screen
#define VI_STATE_REPEATLINE (1 << 6) // repeat line?
#define VI_STATE_FADE (1 << 7) // fade
#define VI_CTRL_ANTIALIAS_MODE_3 0x00300 /* Bit [9:8] anti-alias mode */
#define VI_CTRL_ANTIALIAS_MODE_2 0x00200 /* Bit [9:8] anti-alias mode */
#define VI_CTRL_ANTIALIAS_MODE_1 0x00100 /* Bit [9:8] anti-alias mode */
#define VI_SCALE_MASK 0xFFF
#define VI_2_10_FPART_MASK 0x3FF
#define VI_SUBPIXEL_SH 0x10
// For use in initializing OSViMode structures
#define BURST(hsync_width, color_width, vsync_width, color_start) \
(((u32)(hsync_width) & 0xFF) | (((u32)(color_width) & 0xFF) << 8) | (((u32)(vsync_width) & 0xF) << 16) | (((u32)(color_start) & 0xFFFF) << 20))
#define WIDTH(v) (v)
#define VSYNC(v) (v)
#define HSYNC(duration, leap) (((u32)(leap) << 16) | ((u32)(duration) & 0xFFFF))
#define LEAP(upper, lower) (((u32)(upper) << 16) | ((u32)(lower) & 0xFFFF))
#define START(start, end) (((u32)(start) << 16) | ((u32)(end) & 0xFFFF))
#define FTOFIX(val, i, f) ((u32)((val) * (f32)(1 << (f))) & ((1 << ((i) + (f))) - 1))
#define F210(val) FTOFIX(val, 2, 10)
#define SCALE(scaleup, off) (F210((1.0f / (f32)(scaleup))) | (F210((f32)(off)) << 16))
#define VCURRENT(v) v
#define ORIGIN(v) v
#define VINTR(v) v
#define HSTART START
typedef struct {
/* 0x0 */ f32 factor;
/* 0x4 */ u16 offset;
/* 0x8 */ u32 scale;
} __OSViScale; // size = 0x0C
typedef struct {
/* 0x00 */ u16 state;
/* 0x02 */ u16 retraceCount;
/* 0x04 */ void* buffer;
/* 0x08 */ OSViMode* modep;
/* 0x0C */ u32 features;
/* 0x10 */ OSMesgQueue* mq;
/* 0x14 */ OSMesg* msg;
/* 0x18 */ __OSViScale x;
/* 0x24 */ __OSViScale y;
} __OSViContext; // size = 0x30
void __osViSwapContext(void);
extern __OSViContext* __osViCurr;
extern __OSViContext* __osViNext;
extern u32 __additional_scanline;
__OSViContext* __osViGetCurrentContext(void);
void __osViInit(void);
#endif
+38
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@@ -0,0 +1,38 @@
#ifndef PR_XSTDIO_H
#define PR_XSTDIO_H
#include "ultratypes.h"
#include "libc/stdarg.h"
typedef struct {
/* 0x0 */ union {
/* 0x0 */ s64 ll;
/* 0x0 */ f64 ld;
} v;
/* 0x8 */ char* s;
/* 0xC */ s32 n0;
/* 0x10 */ s32 nz0;
/* 0x14 */ s32 n1;
/* 0x18 */ s32 nz1;
/* 0x1C */ s32 n2;
/* 0x20 */ s32 nz2;
/* 0x24 */ s32 prec;
/* 0x28 */ s32 width;
/* 0x2C */ size_t nchar;
/* 0x30 */ u32 flags;
/* 0x34 */ u8 qual;
} _Pft;
typedef void* (*PrintCallback)(void*, const char*, size_t);
#define FLAGS_SPACE 1
#define FLAGS_PLUS 2
#define FLAGS_MINUS 4
#define FLAGS_HASH 8
#define FLAGS_ZERO 16
s32 _Printf(PrintCallback pfn, void* arg, const char* fmt, va_list ap);
void _Litob(_Pft* args, u8 type);
void _Ldtob(_Pft* args, u8 type);
#endif