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Load Docs (#1222)
* Sync with OoT * Macro cleanup * Some cleanup/rename load system name to Fragment * Format * bss * Some clarifying comments regarding fragments * PR suggestions * size_t and numRelocations
This commit is contained in:
Derek Hensley
+92
-52
@@ -1,42 +1,81 @@
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/**
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* @file loadfragment.c
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*
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* Functions used to process and relocate overlays
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* Functions used to process and relocate dynamically loadable code segments (overlays).
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*
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* @note:
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* These are completly unused in favor of the functions in `loadfragment2.c`.
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* These are completly unused in favor of the fragment overlay functions in `loadfragment2.c`.
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*
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* The main difference between them seems to be the lack of vRamEnd arguments here.
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* The main difference between them seems to be the lack of vramEnd arguments here.
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* Instead they are calculated on the fly.
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*/
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#include "global.h"
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#include "system_malloc.h"
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#include "z64load.h"
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#include "loadfragment.h"
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s32 gLoadLogSeverity = 2;
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void Load_Relocate(void* allocatedVRamAddr, OverlayRelocationSection* ovl, uintptr_t vRamStart) {
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u32 sections[4];
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// Extract MIPS register rs from an instruction word
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#define MIPS_REG_RS(insn) (((insn) >> 0x15) & 0x1F)
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// Extract MIPS register rt from an instruction word
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#define MIPS_REG_RT(insn) (((insn) >> 0x10) & 0x1F)
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// Extract MIPS jump target from an instruction word
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#define MIPS_JUMP_TARGET(insn) (((insn)&0x03FFFFFF) << 2)
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/**
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* Performs runtime relocation of overlay files, loadable code segments.
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*
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* Overlays are expected to be loadable anywhere in direct-mapped cached (KSEG0) memory, with some appropriate
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* alignment requirements; memory addresses in such code must be updated once loaded to execute properly.
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* When compiled, overlays are given 'fake' KSEG0 RAM addresses larger than the total possible available main memory
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* (>= 0x80800000), such addresses are referred to as Virtual RAM (VRAM) to distinguish them. When loading the overlay,
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* the relocation table produced at compile time is consulted to determine where and how to update these VRAM addresses
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* to correct RAM addresses based on the location the overlay was loaded at, enabling the code to execute at this
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* address as if it were compiled to run at this address.
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*
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* Each relocation is represented by a packed 32-bit value, formatted in the following way:
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* - [31:30] 2-bit section id, taking values from the `RelocSectionId` enum.
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* - [29:24] 6-bit relocation type describing which relocation operation should be performed. Same as ELF32 MIPS.
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* - [23: 0] 24-bit section-relative offset indicating where in the section to apply this relocation.
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*
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* @param allocatedRamAddr Memory address the binary was loaded at.
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* @param ovlRelocs Overlay relocation section containing overlay section layout and runtime relocations.
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* @param vramStart Virtual RAM address that the overlay was compiled at.
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*/
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void Fragment_Relocate(void* allocatedRamAddr, OverlayRelocationSection* ovlRelocs, uintptr_t vramStart) {
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u32 sections[RELOC_SECTION_MAX];
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u32* relocDataP;
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u32 reloc;
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uintptr_t relocatedAddress;
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u32 i;
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u32* luiInstRef;
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uintptr_t allocu32 = (uintptr_t)allocatedVRamAddr;
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uintptr_t allocu32 = (uintptr_t)allocatedRamAddr;
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u32* regValP;
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//! MIPS ELF relocation does not generally require tracking register values, so at first glance it appears this
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//! register tracking was an unnecessary complication. However there is a bug in the IDO compiler that can cause
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//! relocations to be emitted in the wrong order under rare circumstances when the compiler attempts to reuse a
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//! previous HI16 relocation for a different LO16 relocation as an optimization. This register tracking is likely
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//! a workaround to prevent improper matching of unrelated HI16 and LO16 relocations that would otherwise arise
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//! due to the incorrect ordering.
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u32* luiRefs[32];
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u32 luiVals[32];
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u32 isLoNeg;
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if (gLoadLogSeverity >= 3) {}
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sections[0] = 0;
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sections[1] = allocu32;
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sections[2] = allocu32 + ovl->textSize;
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sections[3] = sections[2] + ovl->dataSize;
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sections[RELOC_SECTION_NULL] = 0;
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sections[RELOC_SECTION_TEXT] = allocu32;
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sections[RELOC_SECTION_DATA] = allocu32 + ovlRelocs->textSize;
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sections[RELOC_SECTION_RODATA] = sections[RELOC_SECTION_DATA] + ovlRelocs->dataSize;
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for (i = 0; i < ovl->nRelocations; i++) {
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reloc = ovl->relocations[i];
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for (i = 0; i < ovlRelocs->numRelocations; i++) {
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// This will always resolve to a 32-bit aligned address as each section
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// containing code or pointers must be aligned to at least 4 bytes and the
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// MIPS ABI defines the offset of both 16-bit and 32-bit relocations to be
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// the start of the 32-bit word containing the target.
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reloc = ovlRelocs->relocations[i];
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relocDataP = (u32*)(sections[RELOC_SECTION(reloc)] + RELOC_OFFSET(reloc));
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switch (RELOC_TYPE_MASK(reloc)) {
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@@ -46,7 +85,7 @@ void Load_Relocate(void* allocatedVRamAddr, OverlayRelocationSection* ovl, uintp
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// Check address is valid for relocation
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if ((*relocDataP & 0x0F000000) == 0) {
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*relocDataP = RELOCATE_ADDR(*relocDataP, vRamStart, allocu32);
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*relocDataP = *relocDataP - vramStart + allocu32;
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} else if (gLoadLogSeverity >= 3) {
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}
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break;
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@@ -56,10 +95,11 @@ void Load_Relocate(void* allocatedVRamAddr, OverlayRelocationSection* ovl, uintp
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// Extract the address from the target field of the J-type MIPS instruction.
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// Relocate the address and update the instruction.
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*relocDataP =
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(*relocDataP & 0xFC000000) |
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((RELOCATE_ADDR(PHYS_TO_K0((*relocDataP & 0x03FFFFFF) << 2), vRamStart, allocu32) & 0x0FFFFFFF) >>
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2);
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if (1) {
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*relocDataP =
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(*relocDataP & 0xFC000000) |
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(((PHYS_TO_K0(MIPS_JUMP_TARGET(*relocDataP)) - vramStart + allocu32) & 0x0FFFFFFF) >> 2);
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}
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break;
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case R_MIPS_HI16 << RELOC_TYPE_SHIFT:
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@@ -83,7 +123,7 @@ void Load_Relocate(void* allocatedVRamAddr, OverlayRelocationSection* ovl, uintp
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// Check address is valid for relocation
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if ((((*luiInstRef << 0x10) + (s16)*relocDataP) & 0x0F000000) == 0) {
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relocatedAddress = RELOCATE_ADDR((*regValP << 0x10) + (s16)*relocDataP, vRamStart, allocu32);
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relocatedAddress = ((*regValP << 0x10) + (s16)*relocDataP) - vramStart + allocu32;
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isLoNeg = (relocatedAddress & 0x8000) ? 1 : 0;
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*luiInstRef = (*luiInstRef & 0xFFFF0000) | (((relocatedAddress >> 0x10) & 0xFFFF) + isLoNeg);
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*relocDataP = (*relocDataP & 0xFFFF0000) | (relocatedAddress & 0xFFFF);
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@@ -94,97 +134,97 @@ void Load_Relocate(void* allocatedVRamAddr, OverlayRelocationSection* ovl, uintp
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}
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}
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size_t Load_LoadOverlay(uintptr_t vRomStart, uintptr_t vRomEnd, uintptr_t vRamStart, void* allocatedVRamAddr,
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size_t allocatedBytes) {
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size_t size = vRomEnd - vRomStart;
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size_t Fragment_Load(uintptr_t vromStart, uintptr_t vromEnd, uintptr_t vramStart, void* allocatedRamAddr,
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size_t allocatedBytes) {
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size_t size = vromEnd - vromStart;
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void* end;
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s32 pad;
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OverlayRelocationSection* ovl;
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OverlayRelocationSection* ovlRelocs;
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if (gLoadLogSeverity >= 3) {}
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if (gLoadLogSeverity >= 3) {}
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end = (uintptr_t)allocatedVRamAddr + size;
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DmaMgr_SendRequest0(allocatedVRamAddr, vRomStart, size);
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end = (uintptr_t)allocatedRamAddr + size;
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DmaMgr_SendRequest0(allocatedRamAddr, vromStart, size);
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ovl = (OverlayRelocationSection*)((uintptr_t)end - ((s32*)end)[-1]);
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ovlRelocs = (OverlayRelocationSection*)((uintptr_t)end - ((s32*)end)[-1]);
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if (gLoadLogSeverity >= 3) {}
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if (allocatedBytes < ovl->bssSize + size) {
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if (allocatedBytes < ovlRelocs->bssSize + size) {
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if (gLoadLogSeverity >= 3) {}
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return 0;
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}
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allocatedBytes = ovl->bssSize + size;
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allocatedBytes = ovlRelocs->bssSize + size;
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if (gLoadLogSeverity >= 3) {}
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Load_Relocate(allocatedVRamAddr, ovl, vRamStart);
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Fragment_Relocate(allocatedRamAddr, ovlRelocs, vramStart);
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if (ovl->bssSize != 0) {
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if (ovlRelocs->bssSize != 0) {
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if (gLoadLogSeverity >= 3) {}
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bzero(end, ovl->bssSize);
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bzero(end, ovlRelocs->bssSize);
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}
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osWritebackDCache(allocatedVRamAddr, allocatedBytes);
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osInvalICache(allocatedVRamAddr, allocatedBytes);
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osWritebackDCache(allocatedRamAddr, allocatedBytes);
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osInvalICache(allocatedRamAddr, allocatedBytes);
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if (gLoadLogSeverity >= 3) {}
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return allocatedBytes;
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}
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void* Load_AllocateAndLoad(uintptr_t vRomStart, uintptr_t vRomEnd, uintptr_t vRamStart) {
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size_t size = vRomEnd - vRomStart;
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void* Fragment_AllocateAndLoad(uintptr_t vromStart, uintptr_t vromEnd, uintptr_t vramStart) {
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size_t size = vromEnd - vromStart;
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void* end;
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void* allocatedVRamAddr;
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void* allocatedRamAddr;
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uintptr_t ovlOffset;
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OverlayRelocationSection* ovl;
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OverlayRelocationSection* ovlRelocs;
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size_t allocatedBytes;
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if (gLoadLogSeverity >= 3) {}
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allocatedVRamAddr = SystemArena_MallocR(size);
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end = (uintptr_t)allocatedVRamAddr + size;
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allocatedRamAddr = SystemArena_MallocR(size);
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end = (uintptr_t)allocatedRamAddr + size;
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if (gLoadLogSeverity >= 3) {}
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DmaMgr_SendRequest0(allocatedVRamAddr, vRomStart, size);
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DmaMgr_SendRequest0(allocatedRamAddr, vromStart, size);
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if (gLoadLogSeverity >= 3) {}
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ovlOffset = (uintptr_t)end - 4;
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ovl = (OverlayRelocationSection*)((uintptr_t)end - ((s32*)end)[-1]);
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ovlRelocs = (OverlayRelocationSection*)((uintptr_t)end - ((s32*)end)[-1]);
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if (1) {}
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allocatedBytes = ovl->bssSize + size;
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allocatedBytes = ovlRelocs->bssSize + size;
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allocatedVRamAddr = SystemArena_Realloc(allocatedVRamAddr, allocatedBytes);
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allocatedRamAddr = SystemArena_Realloc(allocatedRamAddr, allocatedBytes);
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if (gLoadLogSeverity >= 3) {}
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if (allocatedVRamAddr == NULL) {
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if (allocatedRamAddr == NULL) {
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if (gLoadLogSeverity >= 3) {}
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return allocatedVRamAddr;
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return allocatedRamAddr;
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}
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end = (uintptr_t)allocatedVRamAddr + size;
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ovl = (OverlayRelocationSection*)((uintptr_t)end - *(uintptr_t*)ovlOffset);
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end = (uintptr_t)allocatedRamAddr + size;
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ovlRelocs = (OverlayRelocationSection*)((uintptr_t)end - *(uintptr_t*)ovlOffset);
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if (gLoadLogSeverity >= 3) {}
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Load_Relocate(allocatedVRamAddr, ovl, vRamStart);
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Fragment_Relocate(allocatedRamAddr, ovlRelocs, vramStart);
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if (ovl->bssSize != 0) {
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if (ovlRelocs->bssSize != 0) {
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if (gLoadLogSeverity >= 3) {}
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bzero(end, ovl->bssSize);
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bzero(end, ovlRelocs->bssSize);
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}
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osInvalICache(allocatedVRamAddr, allocatedBytes);
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osInvalICache(allocatedRamAddr, allocatedBytes);
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if (gLoadLogSeverity >= 3) {}
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return allocatedVRamAddr;
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return allocatedRamAddr;
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}
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+87
-45
@@ -1,37 +1,78 @@
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/**
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* @file loadfragment2.c
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*
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* Functions used to process and relocate overlays
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* Functions used to process and relocate dynamically loadable code segments (overlays).
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*
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* @note:
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* These are for specific fragment overlays with the .ovl file extension
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*/
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#include "global.h"
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#include "system_malloc.h"
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#include "z64load.h"
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#include "loadfragment.h"
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s32 gLoad2LogSeverity = 2;
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s32 gOverlayLogSeverity = 2;
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void Load2_Relocate(void* allocatedVRamAddr, OverlayRelocationSection* ovl, uintptr_t vRamStart) {
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u32 sections[4];
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// Extract MIPS register rs from an instruction word
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#define MIPS_REG_RS(insn) (((insn) >> 0x15) & 0x1F)
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// Extract MIPS register rt from an instruction word
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#define MIPS_REG_RT(insn) (((insn) >> 0x10) & 0x1F)
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// Extract MIPS jump target from an instruction word
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#define MIPS_JUMP_TARGET(insn) (((insn)&0x03FFFFFF) << 2)
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/**
|
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* Performs runtime relocation of overlay files, loadable code segments.
|
||||
*
|
||||
* Overlays are expected to be loadable anywhere in direct-mapped cached (KSEG0) memory, with some appropriate
|
||||
* alignment requirements; memory addresses in such code must be updated once loaded to execute properly.
|
||||
* When compiled, overlays are given 'fake' KSEG0 RAM addresses larger than the total possible available main memory
|
||||
* (>= 0x80800000), such addresses are referred to as Virtual RAM (VRAM) to distinguish them. When loading the overlay,
|
||||
* the relocation table produced at compile time is consulted to determine where and how to update these VRAM addresses
|
||||
* to correct RAM addresses based on the location the overlay was loaded at, enabling the code to execute at this
|
||||
* address as if it were compiled to run at this address.
|
||||
*
|
||||
* Each relocation is represented by a packed 32-bit value, formatted in the following way:
|
||||
* - [31:30] 2-bit section id, taking values from the `RelocSectionId` enum.
|
||||
* - [29:24] 6-bit relocation type describing which relocation operation should be performed. Same as ELF32 MIPS.
|
||||
* - [23: 0] 24-bit section-relative offset indicating where in the section to apply this relocation.
|
||||
*
|
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* @param allocatedRamAddress Memory address the binary was loaded at.
|
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* @param ovlRelocs Overlay relocation section containing overlay section layout and runtime relocations.
|
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* @param vramStart Virtual RAM address that the overlay was compiled at.
|
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*/
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void Overlay_Relocate(void* allocatedRamAddr, OverlayRelocationSection* ovlRelocs, uintptr_t vramStart) {
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u32 sections[RELOC_SECTION_MAX];
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u32* relocDataP;
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u32 reloc;
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uintptr_t relocatedAddress;
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u32 i;
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u32* luiInstRef;
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uintptr_t allocu32 = (uintptr_t)allocatedVRamAddr;
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uintptr_t allocu32 = (uintptr_t)allocatedRamAddr;
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u32* regValP;
|
||||
//! MIPS ELF relocation does not generally require tracking register values, so at first glance it appears this
|
||||
//! register tracking was an unnecessary complication. However there is a bug in the IDO compiler that can cause
|
||||
//! relocations to be emitted in the wrong order under rare circumstances when the compiler attempts to reuse a
|
||||
//! previous HI16 relocation for a different LO16 relocation as an optimization. This register tracking is likely
|
||||
//! a workaround to prevent improper matching of unrelated HI16 and LO16 relocations that would otherwise arise
|
||||
//! due to the incorrect ordering.
|
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u32* luiRefs[32];
|
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u32 luiVals[32];
|
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u32 isLoNeg;
|
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|
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if (gLoad2LogSeverity >= 3) {}
|
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if (gOverlayLogSeverity >= 3) {}
|
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|
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sections[0] = 0;
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sections[1] = allocu32;
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sections[2] = allocu32 + ovl->textSize;
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sections[3] = sections[2] + ovl->dataSize;
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sections[RELOC_SECTION_NULL] = 0;
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sections[RELOC_SECTION_TEXT] = allocu32;
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sections[RELOC_SECTION_DATA] = allocu32 + ovlRelocs->textSize;
|
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sections[RELOC_SECTION_RODATA] = sections[RELOC_SECTION_DATA] + ovlRelocs->dataSize;
|
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|
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for (i = 0; i < ovl->nRelocations; i++) {
|
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reloc = ovl->relocations[i];
|
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for (i = 0; i < ovlRelocs->numRelocations; i++) {
|
||||
// This will always resolve to a 32-bit aligned address as each section
|
||||
// containing code or pointers must be aligned to at least 4 bytes and the
|
||||
// MIPS ABI defines the offset of both 16-bit and 32-bit relocations to be
|
||||
// the start of the 32-bit word containing the target.
|
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reloc = ovlRelocs->relocations[i];
|
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relocDataP = (u32*)(sections[RELOC_SECTION(reloc)] + RELOC_OFFSET(reloc));
|
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switch (RELOC_TYPE_MASK(reloc)) {
|
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@@ -41,8 +82,8 @@ void Load2_Relocate(void* allocatedVRamAddr, OverlayRelocationSection* ovl, uint
|
||||
|
||||
// Check address is valid for relocation
|
||||
if ((*relocDataP & 0x0F000000) == 0) {
|
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*relocDataP = RELOCATE_ADDR(*relocDataP, vRamStart, allocu32);
|
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} else if (gLoad2LogSeverity >= 3) {
|
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*relocDataP = *relocDataP - vramStart + allocu32;
|
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} else if (gOverlayLogSeverity >= 3) {
|
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}
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break;
|
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|
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@@ -51,10 +92,11 @@ void Load2_Relocate(void* allocatedVRamAddr, OverlayRelocationSection* ovl, uint
|
||||
// Extract the address from the target field of the J-type MIPS instruction.
|
||||
// Relocate the address and update the instruction.
|
||||
|
||||
*relocDataP =
|
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(*relocDataP & 0xFC000000) |
|
||||
((RELOCATE_ADDR(PHYS_TO_K0((*relocDataP & 0x03FFFFFF) << 2), vRamStart, allocu32) & 0x0FFFFFFF) >>
|
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2);
|
||||
if (1) {
|
||||
*relocDataP =
|
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(*relocDataP & 0xFC000000) |
|
||||
(((PHYS_TO_K0(MIPS_JUMP_TARGET(*relocDataP)) - vramStart + allocu32) & 0x0FFFFFFF) >> 2);
|
||||
}
|
||||
break;
|
||||
|
||||
case R_MIPS_HI16 << RELOC_TYPE_SHIFT:
|
||||
@@ -78,58 +120,58 @@ void Load2_Relocate(void* allocatedVRamAddr, OverlayRelocationSection* ovl, uint
|
||||
|
||||
// Check address is valid for relocation
|
||||
if ((((*luiInstRef << 0x10) + (s16)*relocDataP) & 0x0F000000) == 0) {
|
||||
relocatedAddress = RELOCATE_ADDR((*regValP << 0x10) + (s16)*relocDataP, vRamStart, allocu32);
|
||||
relocatedAddress = ((*regValP << 0x10) + (s16)*relocDataP) - vramStart + allocu32;
|
||||
isLoNeg = (relocatedAddress & 0x8000) ? 1 : 0;
|
||||
*luiInstRef = (*luiInstRef & 0xFFFF0000) | (((relocatedAddress >> 0x10) & 0xFFFF) + isLoNeg);
|
||||
*relocDataP = (*relocDataP & 0xFFFF0000) | (relocatedAddress & 0xFFFF);
|
||||
} else if (gLoad2LogSeverity >= 3) {
|
||||
} else if (gOverlayLogSeverity >= 3) {
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
size_t Load2_LoadOverlay(uintptr_t vRomStart, uintptr_t vRomEnd, uintptr_t vRamStart, uintptr_t vRamEnd,
|
||||
void* allocatedVRamAddr) {
|
||||
size_t Overlay_Load(uintptr_t vromStart, uintptr_t vromEnd, uintptr_t vramStart, uintptr_t vramEnd,
|
||||
void* allocatedRamAddr) {
|
||||
s32 pad[2];
|
||||
s32 size = vRomEnd - vRomStart;
|
||||
s32 size = vromEnd - vromStart;
|
||||
void* end;
|
||||
OverlayRelocationSection* ovl;
|
||||
OverlayRelocationSection* ovlRelocs;
|
||||
|
||||
if (gLoad2LogSeverity >= 3) {}
|
||||
if (gLoad2LogSeverity >= 3) {}
|
||||
if (gOverlayLogSeverity >= 3) {}
|
||||
if (gOverlayLogSeverity >= 3) {}
|
||||
|
||||
end = (uintptr_t)allocatedVRamAddr + size;
|
||||
DmaMgr_SendRequest0(allocatedVRamAddr, vRomStart, size);
|
||||
end = (uintptr_t)allocatedRamAddr + size;
|
||||
DmaMgr_SendRequest0(allocatedRamAddr, vromStart, size);
|
||||
|
||||
ovl = (OverlayRelocationSection*)((uintptr_t)end - ((s32*)end)[-1]);
|
||||
ovlRelocs = (OverlayRelocationSection*)((uintptr_t)end - ((s32*)end)[-1]);
|
||||
|
||||
if (gLoad2LogSeverity >= 3) {}
|
||||
if (gLoad2LogSeverity >= 3) {}
|
||||
if (gOverlayLogSeverity >= 3) {}
|
||||
if (gOverlayLogSeverity >= 3) {}
|
||||
|
||||
Load2_Relocate(allocatedVRamAddr, ovl, vRamStart);
|
||||
Overlay_Relocate(allocatedRamAddr, ovlRelocs, vramStart);
|
||||
|
||||
if (ovl->bssSize != 0) {
|
||||
if (gLoad2LogSeverity >= 3) {}
|
||||
bzero(end, ovl->bssSize);
|
||||
if (ovlRelocs->bssSize != 0) {
|
||||
if (gOverlayLogSeverity >= 3) {}
|
||||
bzero(end, ovlRelocs->bssSize);
|
||||
}
|
||||
|
||||
size = vRamEnd - vRamStart;
|
||||
size = vramEnd - vramStart;
|
||||
|
||||
osWritebackDCache(allocatedVRamAddr, size);
|
||||
osInvalICache(allocatedVRamAddr, size);
|
||||
osWritebackDCache(allocatedRamAddr, size);
|
||||
osInvalICache(allocatedRamAddr, size);
|
||||
|
||||
if (gLoad2LogSeverity >= 3) {}
|
||||
if (gOverlayLogSeverity >= 3) {}
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
void* Load2_AllocateAndLoad(uintptr_t vRomStart, uintptr_t vRomEnd, uintptr_t vRamStart, uintptr_t vRamEnd) {
|
||||
void* allocatedVRamAddr = SystemArena_MallocR(vRamEnd - vRamStart);
|
||||
void* Overlay_AllocateAndLoad(uintptr_t vromStart, uintptr_t vromEnd, uintptr_t vramStart, uintptr_t vramEnd) {
|
||||
void* allocatedRamAddr = SystemArena_MallocR(vramEnd - vramStart);
|
||||
|
||||
if (allocatedVRamAddr != NULL) {
|
||||
Load2_LoadOverlay(vRomStart, vRomEnd, vRamStart, vRamEnd, allocatedVRamAddr);
|
||||
if (allocatedRamAddr != NULL) {
|
||||
Overlay_Load(vromStart, vromEnd, vramStart, vramEnd, allocatedRamAddr);
|
||||
}
|
||||
|
||||
return allocatedVRamAddr;
|
||||
return allocatedRamAddr;
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user