mirror of
https://github.com/zeldaret/mm.git
synced 2026-07-08 21:34:48 -04:00
ZAPD fixes in sys_initial_check, update subrepos (#507)
* git subrepo pull --force tools/ZAPD subrepo: subdir: "tools/ZAPD" merged: "a3363333d" upstream: origin: "https://github.com/zeldaret/ZAPD.git" branch: "master" commit: "a3363333d" git-subrepo: version: "0.4.3" origin: "https://github.com/ingydotnet/git-subrepo.git" commit: "2f68596" * git subrepo pull tools/asm-differ --force subrepo: subdir: "tools/asm-differ" merged: "70c33cc12" upstream: origin: "https://github.com/simonlindholm/asm-differ.git" branch: "main" commit: "70c33cc12" git-subrepo: version: "0.4.3" origin: "https://github.com/ingydotnet/git-subrepo.git" commit: "2f68596" * git subrepo pull (merge) tools/z64compress --force subrepo: subdir: "tools/z64compress" merged: "ac5b1a0d0" upstream: origin: "https://github.com/z64me/z64compress.git" branch: "main" commit: "ac5b1a0d0" git-subrepo: version: "0.4.3" origin: "https://github.com/ingydotnet/git-subrepo.git" commit: "2f68596" * Use defines for texture sizes in sys_initial_check * Update extract_assets.py * Add null check * git subrepo pull --force tools/ZAPD subrepo: subdir: "tools/ZAPD" merged: "50242eca9" upstream: origin: "https://github.com/zeldaret/ZAPD.git" branch: "master" commit: "50242eca9" git-subrepo: version: "0.4.3" origin: "https://github.com/ingydotnet/git-subrepo.git" commit: "2f68596"
This commit is contained in:
+187
-117
@@ -640,6 +640,7 @@ class Text:
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class TableMetadata:
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headers: Tuple[Text, ...]
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current_score: int
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max_score: int
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previous_score: Optional[int]
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@@ -832,6 +833,7 @@ class JsonFormatter(Formatter):
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for h, name in zip(meta.headers, ("base", "current", "previous"))
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}
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output["current_score"] = meta.current_score
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output["max_score"] = meta.max_score
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if meta.previous_score is not None:
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output["previous_score"] = meta.previous_score
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output_rows: List[Dict[str, Any]] = []
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@@ -1184,8 +1186,9 @@ def parse_elf_data_references(data: bytes) -> List[Tuple[int, int, str]]:
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assert len(symtab_sections) == 1
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symtab = sections[symtab_sections[0]]
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text_sections = [i for i in range(e_shnum) if sec_names[i] == b".text"]
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assert len(text_sections) == 1
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text_sections = [i for i in range(e_shnum) if sec_names[i] == b".text" and sections[i].sh_size != 0]
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if len(text_sections) != 1:
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return []
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text_section = text_sections[0]
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ret: List[Tuple[int, int, str]] = []
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@@ -1327,11 +1330,23 @@ def dump_binary(
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(objdump_flags + flags2, project.myimg, None),
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)
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DATA_POOL_PLACEHOLDER = "DATA_POOL_PLACEHOLDER-OFFSET_{}"
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DATA_POOL_PLACEHOLDER_PATTERN = re.compile(
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r"DATA_POOL_PLACEHOLDER-OFFSET_([a-zA-z0-9]+)"
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)
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class DifferenceNormalizer:
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# Example: "ldr r4, [pc, #56] ; (4c <AddCoins+0x4c>)"
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ARM32_LOAD_POOL_PATTERN = r"(ldr\s+r([0-9]|1[0-3]),\s+\[pc,.*;\s*)(\([a-fA-F0-9]+.*\))"
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# The base class is a no-op.
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class AsmProcessor:
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def __init__(self, config: Config) -> None:
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self.config = config
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def process_reloc(self, row: str, prev: str) -> str:
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return prev
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def normalize(self, mnemonic: str, row: str) -> str:
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"""This should be called exactly once for each line."""
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arch = self.config.arch
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@@ -1342,9 +1357,143 @@ class DifferenceNormalizer:
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def _normalize_arch_specific(self, mnemonic: str, row: str) -> str:
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return row
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def post_process(self, lines: List["Line"]) -> None:
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return
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class DifferenceNormalizerAArch64(DifferenceNormalizer):
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class AsmProcessorMIPS(AsmProcessor):
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def process_reloc(self, row: str, prev: str) -> str:
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arch = self.config.arch
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if "R_MIPS_NONE" in row:
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# GNU as emits no-op relocations immediately after real ones when
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# assembling with -mabi=64. Return without trying to parse 'imm' as an
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# integer.
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return prev
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before, imm, after = parse_relocated_line(prev)
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repl = row.split()[-1]
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if imm != "0":
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# MIPS uses relocations with addends embedded in the code as immediates.
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# If there is an immediate, show it as part of the relocation. Ideally
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# we'd show this addend in both %lo/%hi, but annoyingly objdump's output
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# doesn't include enough information to pair up %lo's and %hi's...
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# TODO: handle unambiguous cases where all addends for a symbol are the
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# same, or show "+???".
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mnemonic = prev.split()[0]
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if (
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mnemonic in arch.instructions_with_address_immediates
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and not imm.startswith("0x")
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):
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imm = "0x" + imm
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repl += "+" + imm if int(imm, 0) > 0 else imm
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if "R_MIPS_LO16" in row:
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repl = f"%lo({repl})"
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elif "R_MIPS_HI16" in row:
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# Ideally we'd pair up R_MIPS_LO16 and R_MIPS_HI16 to generate a
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# correct addend for each, but objdump doesn't give us the order of
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# the relocations, so we can't find the right LO16. :(
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repl = f"%hi({repl})"
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elif "R_MIPS_26" in row:
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# Function calls
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pass
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elif "R_MIPS_PC16" in row:
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# Branch to glabel. This gives confusing output, but there's not much
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# we can do here.
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pass
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else:
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assert False, f"unknown relocation type '{row}' for line '{prev}'"
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return before + repl + after
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class AsmProcessorPPC(AsmProcessor):
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def process_reloc(self, row: str, prev: str) -> str:
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arch = self.config.arch
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assert any(
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r in row for r in ["R_PPC_REL24", "R_PPC_ADDR16", "R_PPC_EMB_SDA21"]
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), f"unknown relocation type '{row}' for line '{prev}'"
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before, imm, after = parse_relocated_line(prev)
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repl = row.split()[-1]
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if "R_PPC_REL24" in row:
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# function calls
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pass
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elif "R_PPC_ADDR16_HI" in row:
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# absolute hi of addr
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repl = f"{repl}@h"
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elif "R_PPC_ADDR16_HA" in row:
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# adjusted hi of addr
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repl = f"{repl}@ha"
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elif "R_PPC_ADDR16_LO" in row:
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# lo of addr
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repl = f"{repl}@l"
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elif "R_PPC_ADDR16" in row:
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# 16-bit absolute addr
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if "+0x7" in repl:
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# remove the very large addends as they are an artifact of (label-_SDA(2)_BASE_)
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# computations and are unimportant in a diff setting.
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if int(repl.split("+")[1], 16) > 0x70000000:
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repl = repl.split("+")[0]
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elif "R_PPC_EMB_SDA21" in row:
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# small data area
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pass
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return before + repl + after
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class AsmProcessorARM32(AsmProcessor):
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def process_reloc(self, row: str, prev: str) -> str:
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arch = self.config.arch
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before, imm, after = parse_relocated_line(prev)
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repl = row.split()[-1]
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return before + repl + after
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def _normalize_arch_specific(self, mnemonic: str, row: str) -> str:
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if self.config.ignore_addr_diffs:
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row = self._normalize_bl(mnemonic, row)
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row = self._normalize_data_pool(row)
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return row
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def _normalize_bl(self, mnemonic: str, row: str) -> str:
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if mnemonic != "bl":
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return row
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row, _ = split_off_address(row)
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return row + "<ignore>"
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def _normalize_data_pool(self, row: str) -> str:
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pool_match = re.search(ARM32_LOAD_POOL_PATTERN, row)
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if pool_match:
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offset = pool_match.group(3).split(" ")[0][1:]
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repl = DATA_POOL_PLACEHOLDER.format(offset)
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return pool_match.group(1) + repl
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return row
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def post_process(self, lines: List["Line"]) -> None:
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lines_by_line_number = {}
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for line in lines:
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lines_by_line_number[line.line_num] = line
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for line in lines:
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reloc_match = re.search(
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DATA_POOL_PLACEHOLDER_PATTERN, line.normalized_original
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)
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if reloc_match is None:
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continue
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# Get value at relocation
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reloc = reloc_match.group(0)
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line_number = re.search(
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DATA_POOL_PLACEHOLDER_PATTERN, reloc).group(1)
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line_original = lines_by_line_number[int(line_number, 16)].original
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value = line_original.split()[1]
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# Replace relocation placeholder with value
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replaced = re.sub(
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DATA_POOL_PLACEHOLDER_PATTERN,
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f"={value} ({line_number})",
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line.normalized_original,
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)
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line.original = replaced
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class AsmProcessorAArch64(AsmProcessor):
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def __init__(self, config: Config) -> None:
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super().__init__(config)
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self._adrp_pair_registers: Set[str] = set()
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@@ -1394,23 +1543,6 @@ class DifferenceNormalizerAArch64(DifferenceNormalizer):
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return row
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class DifferenceNormalizerARM32(DifferenceNormalizer):
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def __init__(self, config: Config) -> None:
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super().__init__(config)
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def _normalize_arch_specific(self, mnemonic: str, row: str) -> str:
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if self.config.ignore_addr_diffs:
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row = self._normalize_bl(mnemonic, row)
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return row
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def _normalize_bl(self, mnemonic: str, row: str) -> str:
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if mnemonic != "bl":
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return row
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row, _ = split_off_address(row)
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return row + "<ignore>"
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@dataclass
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class ArchSettings:
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name: str
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@@ -1420,14 +1552,15 @@ class ArchSettings:
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re_sprel: Pattern[str]
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re_large_imm: Pattern[str]
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re_imm: Pattern[str]
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re_reloc: Pattern[str]
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branch_instructions: Set[str]
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instructions_with_address_immediates: Set[str]
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forbidden: Set[str] = field(default_factory=lambda: set(string.ascii_letters + "_"))
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arch_flags: List[str] = field(default_factory=list)
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branch_likely_instructions: Set[str] = field(default_factory=set)
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difference_normalizer: Type[DifferenceNormalizer] = DifferenceNormalizer
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proc: Type[AsmProcessor] = AsmProcessor
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big_endian: Optional[bool] = True
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delay_slot_instructions: Set[str] = field(default_factory=set)
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MIPS_BRANCH_LIKELY_INSTRUCTIONS = {
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"beql",
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@@ -1543,10 +1676,13 @@ MIPS_SETTINGS = ArchSettings(
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re_sprel=re.compile(r"(?<=,)([0-9]+|0x[0-9a-f]+)\(sp\)"),
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re_large_imm=re.compile(r"-?[1-9][0-9]{2,}|-?0x[0-9a-f]{3,}"),
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re_imm=re.compile(r"(\b|-)([0-9]+|0x[0-9a-fA-F]+)\b(?!\(sp)|%(lo|hi)\([^)]*\)"),
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re_reloc=re.compile(r"R_MIPS_"),
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arch_flags=["-m", "mips:4300"],
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branch_likely_instructions=MIPS_BRANCH_LIKELY_INSTRUCTIONS,
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branch_instructions=MIPS_BRANCH_INSTRUCTIONS,
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instructions_with_address_immediates=MIPS_BRANCH_INSTRUCTIONS.union({"jal", "j"}),
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delay_slot_instructions=MIPS_BRANCH_INSTRUCTIONS.union({"j", "jal", "jr", "jalr"}),
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proc=AsmProcessorMIPS,
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)
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MIPSEL_SETTINGS = replace(MIPS_SETTINGS, name="mipsel", big_endian=False)
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@@ -1566,9 +1702,10 @@ ARM32_SETTINGS = ArchSettings(
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re_sprel=re.compile(r"sp, #-?(0x[0-9a-fA-F]+|[0-9]+)\b"),
|
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re_large_imm=re.compile(r"-?[1-9][0-9]{2,}|-?0x[0-9a-f]{3,}"),
|
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re_imm=re.compile(r"(?<!sp, )#-?(0x[0-9a-fA-F]+|[0-9]+)\b"),
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re_reloc=re.compile(r"R_ARM_"),
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branch_instructions=ARM32_BRANCH_INSTRUCTIONS,
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instructions_with_address_immediates=ARM32_BRANCH_INSTRUCTIONS.union({"adr"}),
|
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difference_normalizer=DifferenceNormalizerARM32,
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proc=AsmProcessorARM32,
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)
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AARCH64_SETTINGS = ArchSettings(
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@@ -1581,9 +1718,10 @@ AARCH64_SETTINGS = ArchSettings(
|
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re_sprel=re.compile(r"sp, #-?(0x[0-9a-fA-F]+|[0-9]+)\b"),
|
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re_large_imm=re.compile(r"-?[1-9][0-9]{2,}|-?0x[0-9a-f]{3,}"),
|
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re_imm=re.compile(r"(?<!sp, )#-?(0x[0-9a-fA-F]+|[0-9]+)\b"),
|
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re_reloc=re.compile(r"R_AARCH64_"),
|
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branch_instructions=AARCH64_BRANCH_INSTRUCTIONS,
|
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instructions_with_address_immediates=AARCH64_BRANCH_INSTRUCTIONS.union({"bl", "adrp"}),
|
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difference_normalizer=DifferenceNormalizerAArch64,
|
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proc=AsmProcessorAArch64,
|
||||
)
|
||||
|
||||
PPC_SETTINGS = ArchSettings(
|
||||
@@ -1594,8 +1732,10 @@ PPC_SETTINGS = ArchSettings(
|
||||
re_sprel=re.compile(r"(?<=,)(-?[0-9]+|-?0x[0-9a-f]+)\(r1\)"),
|
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re_large_imm=re.compile(r"-?[1-9][0-9]{2,}|-?0x[0-9a-f]{3,}"),
|
||||
re_imm=re.compile(r"(\b|-)([0-9]+|0x[0-9a-fA-F]+)\b(?!\(r1)|[^@]*@(ha|h|lo)"),
|
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re_reloc=re.compile(r"R_PPC_"),
|
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branch_instructions=PPC_BRANCH_INSTRUCTIONS,
|
||||
instructions_with_address_immediates=PPC_BRANCH_INSTRUCTIONS.union({"bl"}),
|
||||
proc=AsmProcessorPPC,
|
||||
)
|
||||
|
||||
ARCH_SETTINGS = [
|
||||
@@ -1639,84 +1779,6 @@ def parse_relocated_line(line: str) -> Tuple[str, str, str]:
|
||||
return before, imm, after
|
||||
|
||||
|
||||
def process_mips_reloc(row: str, prev: str, arch: ArchSettings) -> str:
|
||||
if "R_MIPS_NONE" in row:
|
||||
# GNU as emits no-op relocations immediately after real ones when
|
||||
# assembling with -mabi=64. Return without trying to parse 'imm' as an
|
||||
# integer.
|
||||
return prev
|
||||
before, imm, after = parse_relocated_line(prev)
|
||||
repl = row.split()[-1]
|
||||
if imm != "0":
|
||||
# MIPS uses relocations with addends embedded in the code as immediates.
|
||||
# If there is an immediate, show it as part of the relocation. Ideally
|
||||
# we'd show this addend in both %lo/%hi, but annoyingly objdump's output
|
||||
# doesn't include enough information to pair up %lo's and %hi's...
|
||||
# TODO: handle unambiguous cases where all addends for a symbol are the
|
||||
# same, or show "+???".
|
||||
mnemonic = prev.split()[0]
|
||||
if (
|
||||
mnemonic in arch.instructions_with_address_immediates
|
||||
and not imm.startswith("0x")
|
||||
):
|
||||
imm = "0x" + imm
|
||||
repl += "+" + imm if int(imm, 0) > 0 else imm
|
||||
if "R_MIPS_LO16" in row:
|
||||
repl = f"%lo({repl})"
|
||||
elif "R_MIPS_HI16" in row:
|
||||
# Ideally we'd pair up R_MIPS_LO16 and R_MIPS_HI16 to generate a
|
||||
# correct addend for each, but objdump doesn't give us the order of
|
||||
# the relocations, so we can't find the right LO16. :(
|
||||
repl = f"%hi({repl})"
|
||||
elif "R_MIPS_26" in row:
|
||||
# Function calls
|
||||
pass
|
||||
elif "R_MIPS_PC16" in row:
|
||||
# Branch to glabel. This gives confusing output, but there's not much
|
||||
# we can do here.
|
||||
pass
|
||||
else:
|
||||
assert False, f"unknown relocation type '{row}' for line '{prev}'"
|
||||
return before + repl + after
|
||||
|
||||
|
||||
def process_ppc_reloc(row: str, prev: str) -> str:
|
||||
assert any(
|
||||
r in row for r in ["R_PPC_REL24", "R_PPC_ADDR16", "R_PPC_EMB_SDA21"]
|
||||
), f"unknown relocation type '{row}' for line '{prev}'"
|
||||
before, imm, after = parse_relocated_line(prev)
|
||||
repl = row.split()[-1]
|
||||
if "R_PPC_REL24" in row:
|
||||
# function calls
|
||||
pass
|
||||
elif "R_PPC_ADDR16_HI" in row:
|
||||
# absolute hi of addr
|
||||
repl = f"{repl}@h"
|
||||
elif "R_PPC_ADDR16_HA" in row:
|
||||
# adjusted hi of addr
|
||||
repl = f"{repl}@ha"
|
||||
elif "R_PPC_ADDR16_LO" in row:
|
||||
# lo of addr
|
||||
repl = f"{repl}@l"
|
||||
elif "R_PPC_ADDR16" in row:
|
||||
# 16-bit absolute addr
|
||||
if "+0x7" in repl:
|
||||
# remove the very large addends as they are an artifact of (label-_SDA(2)_BASE_)
|
||||
# computations and are unimportant in a diff setting.
|
||||
if int(repl.split("+")[1], 16) > 0x70000000:
|
||||
repl = repl.split("+")[0]
|
||||
elif "R_PPC_EMB_SDA21" in row:
|
||||
# small data area
|
||||
pass
|
||||
return before + repl + after
|
||||
|
||||
|
||||
def process_arm_reloc(row: str, prev: str, arch: ArchSettings) -> str:
|
||||
before, imm, after = parse_relocated_line(prev)
|
||||
repl = row.split()[-1]
|
||||
return before + repl + after
|
||||
|
||||
|
||||
def pad_mnemonic(line: str) -> str:
|
||||
if "\t" not in line:
|
||||
return line
|
||||
@@ -1741,7 +1803,7 @@ class Line:
|
||||
|
||||
def process(dump: str, config: Config) -> List[Line]:
|
||||
arch = config.arch
|
||||
normalizer = arch.difference_normalizer(config)
|
||||
processor = arch.proc(config)
|
||||
skip_next = False
|
||||
source_lines = []
|
||||
source_filename = None
|
||||
@@ -1783,7 +1845,7 @@ def process(dump: str, config: Config) -> List[Line]:
|
||||
)
|
||||
break
|
||||
|
||||
if not re.match(r"^ +[0-9a-f]+:\t", row):
|
||||
if not re.match(r"^\s+[0-9a-f]+:\s+", row):
|
||||
# This regex is conservative, and assumes the file path does not contain "weird"
|
||||
# characters like colons, tabs, or angle brackets.
|
||||
if re.match(
|
||||
@@ -1797,10 +1859,11 @@ def process(dump: str, config: Config) -> List[Line]:
|
||||
m_comment = re.search(arch.re_comment, row)
|
||||
comment = m_comment[0] if m_comment else None
|
||||
row = re.sub(arch.re_comment, "", row)
|
||||
line_num_str = row.split(":")[0]
|
||||
row = row.rstrip()
|
||||
tabs = row.split("\t")
|
||||
row = "\t".join(tabs[2:])
|
||||
line_num = eval_line_num(tabs[0].strip())
|
||||
line_num = eval_line_num(line_num_str.strip())
|
||||
|
||||
if line_num in data_refs:
|
||||
refs = data_refs[line_num]
|
||||
@@ -1835,20 +1898,13 @@ def process(dump: str, config: Config) -> List[Line]:
|
||||
|
||||
while i < len(lines):
|
||||
reloc_row = lines[i]
|
||||
if "R_AARCH64_" in reloc_row:
|
||||
# TODO: handle relocation
|
||||
pass
|
||||
elif "R_MIPS_" in reloc_row:
|
||||
original = process_mips_reloc(reloc_row, original, arch)
|
||||
elif "R_PPC_" in reloc_row:
|
||||
original = process_ppc_reloc(reloc_row, original)
|
||||
elif "R_ARM_" in reloc_row:
|
||||
original = process_arm_reloc(reloc_row, original, arch)
|
||||
if re.search(arch.re_reloc, reloc_row):
|
||||
original = processor.process_reloc(reloc_row, original)
|
||||
else:
|
||||
break
|
||||
i += 1
|
||||
|
||||
normalized_original = normalizer.normalize(mnemonic, original)
|
||||
normalized_original = processor.normalize(mnemonic, original)
|
||||
|
||||
scorable_line = normalized_original
|
||||
if not config.score_stack_differences:
|
||||
@@ -1904,6 +1960,7 @@ def process(dump: str, config: Config) -> List[Line]:
|
||||
elif stop_after_delay_slot:
|
||||
break
|
||||
|
||||
processor.post_process(output)
|
||||
return output
|
||||
|
||||
|
||||
@@ -2123,8 +2180,15 @@ class OutputLine:
|
||||
class Diff:
|
||||
lines: List[OutputLine]
|
||||
score: int
|
||||
max_score: int
|
||||
|
||||
|
||||
def trim_nops(lines: List[Line], arch: ArchSettings) -> List[Line]:
|
||||
lines = lines[:]
|
||||
while lines and lines[-1].mnemonic == "nop" and (len(lines) == 1 or lines[-2].mnemonic not in arch.delay_slot_instructions):
|
||||
lines.pop()
|
||||
return lines
|
||||
|
||||
def do_diff(lines1: List[Line], lines2: List[Line], config: Config) -> Diff:
|
||||
if config.show_source:
|
||||
import cxxfilt
|
||||
@@ -2152,8 +2216,12 @@ def do_diff(lines1: List[Line], lines2: List[Line], config: Config) -> Diff:
|
||||
btset.add(bt)
|
||||
sc(str(bt))
|
||||
|
||||
lines1 = trim_nops(lines1, arch)
|
||||
lines2 = trim_nops(lines2, arch)
|
||||
|
||||
diffed_lines = diff_lines(lines1, lines2, config.algorithm)
|
||||
score = score_diff_lines(diffed_lines, config)
|
||||
max_score = len(lines1) * config.penalty_deletion
|
||||
|
||||
line_num_base = -1
|
||||
line_num_offset = 0
|
||||
@@ -2385,7 +2453,7 @@ def do_diff(lines1: List[Line], lines2: List[Line], config: Config) -> Diff:
|
||||
)
|
||||
|
||||
output = output[config.skip_lines :]
|
||||
return Diff(lines=output, score=score)
|
||||
return Diff(lines=output, score=score, max_score=max_score)
|
||||
|
||||
|
||||
def chunk_diff_lines(
|
||||
@@ -2461,6 +2529,7 @@ def align_diffs(
|
||||
Text(f"{padding}PREVIOUS ({old_diff.score})"),
|
||||
),
|
||||
current_score=new_diff.score,
|
||||
max_score=new_diff.max_score,
|
||||
previous_score=old_diff.score,
|
||||
)
|
||||
old_chunks = chunk_diff_lines(old_diff.lines)
|
||||
@@ -2504,6 +2573,7 @@ def align_diffs(
|
||||
Text(f"{padding}CURRENT ({new_diff.score})"),
|
||||
),
|
||||
current_score=new_diff.score,
|
||||
max_score=new_diff.max_score,
|
||||
previous_score=None,
|
||||
)
|
||||
diff_lines = [(line, line) for line in new_diff.lines]
|
||||
|
||||
Reference in New Issue
Block a user