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https://github.com/zeldaret/oot
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Use IDO for assembling handwritten asm files in src (#2390)
* as0 * Fix ASOPTFLAGS for src/libc, remove unnecessary noreorder region in kanread * Suggested changes * Use %half to load the boot bss size for matching Co-authored-by: cadmic <cadmic24@gmail.com> * Wrap all of __osProbeTLB in noreorder --------- Co-authored-by: cadmic <cadmic24@gmail.com>
This commit is contained in:
+46
-46
@@ -1,10 +1,7 @@
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#include "ultra64/asm.h"
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#include "ultra64/regdef.h"
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.set noreorder
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.section .text
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.balign 16
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.text
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/**
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* void Mio0_Decompress(void* src, void* dst);
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@@ -12,53 +9,56 @@
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* Decompress Mio0 chunk
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*/
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LEAF(Mio0_Decompress)
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lw $a3, 8($a0) // compressed offset
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lw $t9, 0xC($a0) // uncompressed offset
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lw $t8, 4($a0) // decompressed length
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add $a3, $a3, $a0 // compressed start
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add $t9, $t9, $a0 // uncompressed start
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move $a2, $zero // 0
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addi $a0, $a0, 0x10 // move past header
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add $t8, $t8, $a1 // dst + decompressed length = end
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lw a3, 0x08(a0) /* compressed offset */
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lw t9, 0x0C(a0) /* uncompressed offset */
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lw t8, 0x04(a0) /* decompressed length */
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add a3, a3, a0 /* compressed start */
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add t9, t9, a0 /* uncompressed start */
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move a2, zero /* 0 */
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addi a0, a0, 0x10 /* move past header */
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add t8, t8, a1 /* dst + decompressed length = end */
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mainloop:
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bnez $a2, 1f
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nop
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lw $t0, ($a0)
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li $a2, 32
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addi $a0, $a0, 4
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bnez a2, 1f
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lw t0, (a0)
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li a2, 32
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addi a0, a0, 4
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1:
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slt $t1, $t0, $zero
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beqz $t1, read_comp
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nop
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lb $t2, ($t9) // read 1 byte from uncompressed data
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addi $t9, $t9, 1 // advance uncompressed start
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addi $a1, $a1, 1
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slt t1, t0, zero
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beqz t1, read_comp
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lb t2, (t9) /* read 1 byte from uncompressed data */
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sb t2, (a1) /* store uncompressed byte */
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addi t9, t9, 1 /* advance uncompressed start */
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addi a1, a1, 1
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b next_iter
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sb $t2, -1($a1) // store uncompressed byte
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read_comp:
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lhu $t2, ($a3) // read 2 bytes from compressed data
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addi $a3, $a3, 2 // advance compressed start
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srl $t3, $t2, 0xC
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andi $t2, $t2, 0xFFF
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beqz $t3, 3f
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sub $t1, $a1, $t2
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addi $t3, $t3, 2
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lhu t2, (a3) /* read 2 bytes from compressed data */
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addi a3, a3, 2 /* advance compressed start */
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srl t3, t2, 0xC
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andi t2, t2, 0xFFF
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sub t1, a1, t2
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beqz t3, 3f
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addi t3, t3, 2
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2:
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lb $t2, -1($t1)
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addi $t3, $t3, -1
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addi $t1, $t1, 1
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addi $a1, $a1, 1
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bnez $t3, 2b
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sb $t2, -1($a1)
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lb t2, -1(t1)
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addi t3, t3, -1
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addi t1, t1, 1
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sb t2, (a1)
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addi a1, a1, 1
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bnez t3, 2b
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next_iter:
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sll $t0, $t0, 1
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bne $a1, $t8, mainloop // continue until decompressed length is reached
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addi $a2, $a2, -1
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jr $ra
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nop
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sll t0, t0, 1
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addi a2, a2, -1
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bne a1, t8, mainloop /* continue until decompressed length is reached */
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jr ra
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3:
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lbu $t3, ($t9)
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addi $t9, $t9, 1
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lbu t3, (t9)
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addi t9, t9, 1
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addi t3, t3, 0x12
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b 2b
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addi $t3, $t3, 0x12
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END(Mio0_Decompress)
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+57
-68
@@ -1,11 +1,7 @@
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#include "ultra64/asm.h"
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#include "ultra64/regdef.h"
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.set noat
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.set noreorder
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.section .text
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.balign 16
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.text
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/**
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* s32 Kanji_OffsetFromShiftJIS(s32 sjis);
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@@ -26,64 +22,57 @@
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* @remark Almost identical to "LeoGetKadr" from libleo.
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*/
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LEAF(Kanji_OffsetFromShiftJIS)
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// Characters with codepoints >= 0x8800 are kanji. Arrangement is regular,
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// so convert index directly.
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li $at, 0x8800
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slt $at, $a0, $at
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bnez $at, .nonkanji
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// 0xBC is number of glyphs in one block in the `kanji` file:
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// 0x100 possible codepoints with the same byte1
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// - 0x40 unused at beginning
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// - 1 unused at 0x7F
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// - 3 unused at 0xFD, 0xFE, 0xFF
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li $a2, 0xBC
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// Get byte1 and adjust so starts at 0
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srl $a1, $a0, 8
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addi $a1, $a1, -0x88
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multu $a2, $a1
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// Get byte2 and adjust so starts at 0
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andi $a3, $a0, 0xFF
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addi $a3, $a3, -0x40
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slti $at, $a3, (0x80 - 0x40)
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mflo $a2
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// 0x__7F is always empty and elided in the file, so decrement if larger
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bnezl $at, .kanji_lower_halfblock
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mflo $a2
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addi $a3, $a3, -1
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mflo $a2
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.kanji_lower_halfblock:
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addi $a3, $a3, 0x30A
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add $a3, $a3, $a2
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jr $ra
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sll $v0, $a3, 7
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// returns (0x30A + (adjusted byte2) + (adjusted byte1) * 0xBC) * FONT_CHAR_TEX_SIZE
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/* Characters with codepoints >= 0x8800 are kanji. Arrangement is regular, */
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/* so convert index directly. */
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li a2, 0xBC
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blt a0, 0x8800, .nonkanji
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/* 0xBC is number of glyphs in one block in the `kanji` file: */
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/* 0x100 possible codepoints with the same byte1 */
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/* - 0x40 unused at beginning */
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/* - 1 unused at 0x7F */
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/* - 3 unused at 0xFD, 0xFE, 0xFF */
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/* Get byte1 and adjust so starts at 0 */
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srl a1, a0, 8
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addi a1, a1, -0x88
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/* Get byte2 and adjust so starts at 0 */
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andi a3, a0, 0xFF
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addi a3, a3, -0x40
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mul a2, a2, a1
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blt a3, 0x40, .kanji_lower_halfblock
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// Non-kanji are arranged with irregular gaps, use the lookup table.
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/* 0x__7F is always empty and elided in the file, so decrement if larger */
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addi a3, a3, -1
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.kanji_lower_halfblock:
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mflo a2 /* Unncessary mflo: the pseudo-op `mul` already performs mflo */
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addi a3, a3, 0x30A
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add a3, a3, a2
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/* returns (0x30A + (adjusted byte2) + (adjusted byte1) * 0xBC) * FONT_CHAR_TEX_SIZE */
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sll v0, a3, 7
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jr ra
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/* Non-kanji are arranged with irregular gaps, use the lookup table. */
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.nonkanji:
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// Get byte1 and adjust so starts at 0
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srl $a1, $a0, 8
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addi $a1, $a1, -0x81
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multu $a2, $a1
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// Get byte2 and adjust so starts at 0
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andi $a3, $a0, 0xFF
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addi $a3, $a3, -0x40
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slti $at, $a3, (0x80 - 0x40)
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mflo $a2
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// 0x__7F is always empty and elided in the file, so decrement if larger
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bnezl $at, .nonkanji_lower_halfblock
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mflo $a2
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addi $a3, $a3, -1
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mflo $a2
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/* Get byte1 and adjust so starts at 0 */
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srl a1, a0, 8
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addi a1, a1, -0x81
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/* Get byte2 and adjust so starts at 0 */
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andi a3, a0, 0xFF
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addi a3, a3, -0x40
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mul a2, a2, a1
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blt a3, 0x40, .nonkanji_lower_halfblock
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/* 0x__7F is always empty and elided in the file, so decrement if larger */
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addi a3, a3, -1
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.nonkanji_lower_halfblock:
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add $a3, $a3, $a2
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lui $a2, %hi(sNonKanjiIndices)
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sll $a3, $a3, 1
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addiu $a2, %lo(sNonKanjiIndices)
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add $a3, $a3, $a2
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lh $a2, ($a3)
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jr $ra
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sll $v0, $a2, 7
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// returns sNonKanjiIndices[(adjusted byte2) + (adjusted byte1) * 0xBC] * FONT_CHAR_TEX_SIZE
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mflo a2 /* Unncessary mflo: the pseudo-op `mul` already performs mflo */
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add a3, a3, a2
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sll a3, a3, 1
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la a2, sNonKanjiIndices
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add a3, a3, a2
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lh a2, (a3)
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/* returns sNonKanjiIndices[(adjusted byte2) + (adjusted byte1) * 0xBC] * FONT_CHAR_TEX_SIZE */
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sll v0, a2, 7
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jr ra
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END(Kanji_OffsetFromShiftJIS)
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/**
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@@ -116,7 +105,7 @@ END(Kanji_OffsetFromShiftJIS)
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* into blocks by high byte.
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*/
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DATA(sNonKanjiIndices)
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// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
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/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
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/* 0x814_ */ .half 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008, 0x0009, 0x000A, 0x000B, 0x000C, 0x000D, 0x000E, 0x000F
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/* 0x815_ */ .half 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, 0x0018, 0x0019, 0x001A, 0x001B, 0x001C, 0x001D, 0x001E, 0x001F
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/* 0x816_ */ .half 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, 0x0028, 0x0029, 0x002A, 0x002B, 0x002C, 0x002D, 0x002E, 0x002F
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@@ -130,7 +119,7 @@ DATA(sNonKanjiIndices)
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/* 0x81E_ */ .half 0x0080, 0x0081, 0x0082, 0x0083, 0x0084, 0x0085, 0x0086, 0x0087, 0x0088, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
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/* 0x81F_ */ .half 0x0089, 0x008A, 0x008B, 0x008C, 0x008D, 0x008E, 0x008F, 0x0090, 0x0000, 0x0000, 0x0000, 0x0000, 0x0091
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// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
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/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
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/* 0x824_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0092
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/* 0x825_ */ .half 0x0093, 0x0094, 0x0095, 0x0096, 0x0097, 0x0098, 0x0099, 0x009A, 0x009B, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
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/* 0x826_ */ .half 0x009C, 0x009D, 0x009E, 0x009F, 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, 0x00A8, 0x00A9, 0x00AA, 0x00AB
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@@ -144,7 +133,7 @@ DATA(sNonKanjiIndices)
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/* 0x82E_ */ .half 0x0111, 0x0112, 0x0113, 0x0114, 0x0115, 0x0116, 0x0117, 0x0118, 0x0119, 0x011A, 0x011B, 0x011C, 0x011D, 0x011E, 0x011F, 0x0120
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/* 0x82F_ */ .half 0x0121, 0x0122, 0x0123, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
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// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
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/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
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/* 0x834_ */ .half 0x0124, 0x0125, 0x0126, 0x0127, 0x0128, 0x0129, 0x012A, 0x012B, 0x012C, 0x012D, 0x012E, 0x012F, 0x0130, 0x0131, 0x0132, 0x0133
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/* 0x835_ */ .half 0x0134, 0x0135, 0x0136, 0x0137, 0x0138, 0x0139, 0x013A, 0x013B, 0x013C, 0x013D, 0x013E, 0x013F, 0x0140, 0x0141, 0x0142, 0x0143
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/* 0x836_ */ .half 0x0144, 0x0145, 0x0146, 0x0147, 0x0148, 0x0149, 0x014A, 0x014B, 0x014C, 0x014D, 0x014E, 0x014F, 0x0150, 0x0151, 0x0152, 0x0153
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@@ -158,7 +147,7 @@ DATA(sNonKanjiIndices)
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/* 0x83E_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
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/* 0x83F_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
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// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
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/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
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/* 0x844_ */ .half 0x01AB, 0x01AC, 0x01AD, 0x01AE, 0x01AF, 0x01B0, 0x01B1, 0x01B2, 0x01B3, 0x01B4, 0x01B5, 0x01B6, 0x01B7, 0x01B8, 0x01B9, 0x01BA
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/* 0x845_ */ .half 0x01BB, 0x01BC, 0x01BD, 0x01BE, 0x01BF, 0x01C0, 0x01C1, 0x01C2, 0x01C3, 0x01C4, 0x01C5, 0x01C6, 0x01C7, 0x01C8, 0x01C9, 0x01CA
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/* 0x846_ */ .half 0x01CB, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
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@@ -172,7 +161,7 @@ DATA(sNonKanjiIndices)
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/* 0x84E_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
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/* 0x84F_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
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// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
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/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
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/* 0x854_ */ .half 0x020E, 0x020F, 0x0210, 0x0211, 0x0212, 0x0213, 0x0214, 0x0215, 0x0216, 0x0217, 0x0218, 0x0219, 0x021A, 0x021B, 0x021C, 0x021D
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/* 0x855_ */ .half 0x021E, 0x021F, 0x0220, 0x0221, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0222, 0x0223
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/* 0x856_ */ .half 0x0224, 0x0225, 0x0226, 0x0227, 0x0228, 0x0229, 0x022A, 0x022B, 0x022C, 0x022D, 0x022E, 0x022F, 0x0230, 0x0231, 0x0232, 0x0233
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@@ -186,7 +175,7 @@ DATA(sNonKanjiIndices)
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/* 0x85E_ */ .half 0x026C, 0x026D, 0x026E, 0x026F, 0x0270, 0x0271, 0x0272, 0x0273, 0x0274, 0x0275, 0x0276, 0x0277, 0x0278, 0x0279, 0x027A, 0x027B
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/* 0x85F_ */ .half 0x027C, 0x027D, 0x027E, 0x027F, 0x0280, 0x0281, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
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// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
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/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
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/* 0x864_ */ .half 0x0282, 0x0283, 0x0284, 0x0285, 0x0286, 0x0287, 0x0288, 0x0289, 0x028A, 0x028B, 0x028C, 0x028D, 0x028E, 0x028F, 0x0290, 0x0291
|
||||
/* 0x865_ */ .half 0x0292, 0x0293, 0x0294, 0x0295, 0x0296, 0x0297, 0x0298, 0x0299, 0x029A, 0x029B, 0x029C, 0x029D, 0x029E, 0x029F, 0x0000, 0x0000
|
||||
/* 0x866_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
@@ -200,7 +189,7 @@ DATA(sNonKanjiIndices)
|
||||
/* 0x86E_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
/* 0x86F_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
|
||||
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
|
||||
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
|
||||
/* 0x874_ */ .half 0x02C0, 0x02C1, 0x02C2, 0x02C3, 0x02C4, 0x02C5, 0x02C6, 0x02C7, 0x02C8, 0x02C9, 0x02CA, 0x02CB, 0x02CC, 0x02CD, 0x02CE, 0x02CF
|
||||
/* 0x875_ */ .half 0x02D0, 0x02D1, 0x02D2, 0x02D3, 0x02D4, 0x02D5, 0x02D6, 0x02D7, 0x02D8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
/* 0x876_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
|
||||
+1
-1
@@ -86,7 +86,7 @@ void ViMode_Configure(ViMode* viMode, s32 type, s32 tvType, s32 loRes, s32 antia
|
||||
yScaleHiOddField = modeF ? (loResInterlaced ? (F210(0.75) << 16) : (F210(0.5) << 16)) : 0;
|
||||
|
||||
viMode->customViMode.type = type;
|
||||
viMode->customViMode.comRegs.ctrl = VI_CTRL_PIXEL_ADV_3 | VI_CTRL_GAMMA_ON | VI_CTRL_GAMMA_DITHER_ON |
|
||||
viMode->customViMode.comRegs.ctrl = VI_CTRL_PIXEL_ADV(3) | VI_CTRL_GAMMA_ON | VI_CTRL_GAMMA_DITHER_ON |
|
||||
(!loResDeinterlaced ? VI_CTRL_SERRATE_ON : 0) |
|
||||
(antialiasOn ? VI_CTRL_DIVOT_ON : 0) |
|
||||
(fb32Bit ? VI_CTRL_TYPE_32 : VI_CTRL_TYPE_16);
|
||||
|
||||
+4
-10
@@ -1,15 +1,9 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
#if DEBUG_FEATURES
|
||||
.set noreorder
|
||||
#endif
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(absf)
|
||||
abs.s $f0, $f12
|
||||
jr $ra
|
||||
nop
|
||||
abs.s fv0, fa0
|
||||
jr ra
|
||||
END(absf)
|
||||
|
||||
+4
-10
@@ -1,15 +1,9 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
#if DEBUG_FEATURES
|
||||
.set noreorder
|
||||
#endif
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(sqrt)
|
||||
sqrt.d $f0, $f12
|
||||
jr $ra
|
||||
nop
|
||||
sqrt.d fv0, fa0
|
||||
jr ra
|
||||
END(sqrt)
|
||||
|
||||
+73
-90
@@ -1,12 +1,10 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .data
|
||||
|
||||
.balign 16
|
||||
.data
|
||||
|
||||
#if !PLATFORM_N64
|
||||
|
||||
DATA(gPositiveInfinity)
|
||||
.word 0x7F800000
|
||||
ENDDATA(gPositiveInfinity)
|
||||
@@ -34,150 +32,135 @@ ENDDATA(qNaN0x10000)
|
||||
DATA(sNaN0x3FFFFF)
|
||||
.word 0x7FFFFFFF
|
||||
ENDDATA(sNaN0x3FFFFF)
|
||||
|
||||
#endif
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(floorf)
|
||||
floor.w.s $f12, $f12
|
||||
jr $ra
|
||||
cvt.s.w $f0, $f12
|
||||
floor.w.s fa0, fa0
|
||||
cvt.s.w fv0, fa0
|
||||
jr ra
|
||||
END(floorf)
|
||||
|
||||
LEAF(floor)
|
||||
floor.w.d $f12, $f12
|
||||
jr $ra
|
||||
cvt.d.w $f0, $f12
|
||||
floor.w.d fa0, fa0
|
||||
cvt.d.w fv0, fa0
|
||||
jr ra
|
||||
END(floor)
|
||||
|
||||
LEAF(lfloorf)
|
||||
floor.w.s $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
jr $ra
|
||||
nop
|
||||
floor.w.s ft0, fa0
|
||||
mfc1 v0, ft0
|
||||
jr ra
|
||||
END(lfloorf)
|
||||
|
||||
LEAF(lfloor)
|
||||
floor.w.d $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
jr $ra
|
||||
nop
|
||||
floor.w.d ft0, fa0
|
||||
mfc1 v0, ft0
|
||||
jr ra
|
||||
END(lfloor)
|
||||
|
||||
LEAF(ceilf)
|
||||
ceil.w.s $f12, $f12
|
||||
jr $ra
|
||||
cvt.s.w $f0, $f12
|
||||
ceil.w.s fa0, fa0
|
||||
cvt.s.w fv0, fa0
|
||||
jr ra
|
||||
END(ceilf)
|
||||
|
||||
LEAF(ceil)
|
||||
ceil.w.d $f12, $f12
|
||||
jr $ra
|
||||
cvt.d.w $f0, $f12
|
||||
ceil.w.d fa0, fa0
|
||||
cvt.d.w fv0, fa0
|
||||
jr ra
|
||||
END(ceil)
|
||||
|
||||
LEAF(lceilf)
|
||||
ceil.w.s $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
jr $ra
|
||||
nop
|
||||
ceil.w.s ft0, fa0
|
||||
mfc1 v0, ft0
|
||||
jr ra
|
||||
END(lceilf)
|
||||
|
||||
LEAF(lceil)
|
||||
ceil.w.d $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
jr $ra
|
||||
nop
|
||||
ceil.w.d ft0, fa0
|
||||
mfc1 v0, ft0
|
||||
jr ra
|
||||
END(lceil)
|
||||
|
||||
LEAF(truncf)
|
||||
trunc.w.s $f12, $f12
|
||||
jr $ra
|
||||
cvt.s.w $f0, $f12
|
||||
trunc.w.s fa0, fa0
|
||||
cvt.s.w fv0, fa0
|
||||
jr ra
|
||||
END(truncf)
|
||||
|
||||
LEAF(trunc)
|
||||
trunc.w.d $f12, $f12
|
||||
jr $ra
|
||||
cvt.d.w $f0, $f12
|
||||
trunc.w.d fa0, fa0
|
||||
cvt.d.w fv0, fa0
|
||||
jr ra
|
||||
END(trunc)
|
||||
|
||||
LEAF(ltruncf)
|
||||
trunc.w.s $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
jr $ra
|
||||
nop
|
||||
trunc.w.s ft0, fa0
|
||||
mfc1 v0, ft0
|
||||
jr ra
|
||||
END(ltruncf)
|
||||
|
||||
LEAF(ltrunc)
|
||||
trunc.w.d $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
jr $ra
|
||||
nop
|
||||
trunc.w.d ft0, fa0
|
||||
mfc1 v0, ft0
|
||||
jr ra
|
||||
END(ltrunc)
|
||||
|
||||
LEAF(nearbyintf)
|
||||
round.w.s $f12, $f12
|
||||
jr $ra
|
||||
cvt.s.w $f0, $f12
|
||||
round.w.s fa0, fa0
|
||||
cvt.s.w fv0, fa0
|
||||
jr ra
|
||||
END(nearbyintf)
|
||||
|
||||
LEAF(nearbyint)
|
||||
round.w.d $f12, $f12
|
||||
jr $ra
|
||||
cvt.d.w $f0, $f12
|
||||
round.w.d fa0, fa0
|
||||
cvt.d.w fv0, fa0
|
||||
jr ra
|
||||
END(nearbyint)
|
||||
|
||||
LEAF(lnearbyintf)
|
||||
round.w.s $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
jr $ra
|
||||
nop
|
||||
round.w.s ft0, fa0
|
||||
mfc1 v0, ft0
|
||||
jr ra
|
||||
END(lnearbyintf)
|
||||
|
||||
LEAF(lnearbyint)
|
||||
round.w.d $f4, $f12
|
||||
mfc1 $v0, $f4
|
||||
jr $ra
|
||||
nop
|
||||
round.w.d ft0, fa0
|
||||
mfc1 v0, ft0
|
||||
jr ra
|
||||
END(lnearbyint)
|
||||
|
||||
LEAF(roundf)
|
||||
li.s $f4, 0.5
|
||||
nop
|
||||
add.s $f0, $f12, $f4
|
||||
floor.w.s $f0, $f0
|
||||
jr $ra
|
||||
cvt.s.w $f0, $f0
|
||||
li.s ft0, 0.5
|
||||
add.s fv0, fa0, ft0
|
||||
floor.w.s fv0, fv0
|
||||
cvt.s.w fv0, fv0
|
||||
jr ra
|
||||
END(roundf)
|
||||
|
||||
LEAF(round)
|
||||
li.d $f4, 0.5
|
||||
nop
|
||||
add.d $f0, $f12, $f4
|
||||
floor.w.d $f0, $f0
|
||||
jr $ra
|
||||
cvt.d.w $f0, $f0
|
||||
li.d ft0, 0.5
|
||||
add.d fv0, fa0, ft0
|
||||
floor.w.d fv0, fv0
|
||||
cvt.d.w fv0, fv0
|
||||
jr ra
|
||||
END(round)
|
||||
|
||||
LEAF(lroundf)
|
||||
li.s $f4, 0.5
|
||||
nop
|
||||
add.s $f0, $f12, $f4
|
||||
floor.w.s $f0, $f0
|
||||
mfc1 $v0, $f0
|
||||
jr $ra
|
||||
nop
|
||||
li.s ft0, 0.5
|
||||
add.s fv0, fa0, ft0
|
||||
floor.w.s fv0, fv0
|
||||
mfc1 v0, fv0
|
||||
jr ra
|
||||
END(lroundf)
|
||||
|
||||
LEAF(lround)
|
||||
li.d $f4, 0.5
|
||||
nop
|
||||
add.d $f0, $f12, $f4
|
||||
floor.w.d $f0, $f0
|
||||
mfc1 $v0, $f0
|
||||
jr $ra
|
||||
nop
|
||||
li.d ft0, 0.5
|
||||
add.d fv0, fa0, ft0
|
||||
floor.w.d fv0, fv0
|
||||
mfc1 v0, fv0
|
||||
jr ra
|
||||
END(lround)
|
||||
|
||||
+25
-34
@@ -1,42 +1,33 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(LeoGetAAdr)
|
||||
bltz $a0, .out_of_range
|
||||
slti $at, $a0, 0x908
|
||||
beqz $at, .out_of_range
|
||||
nop
|
||||
lui $v1, %hi(asc2tbl)
|
||||
sll $t0, $a0, 2
|
||||
addiu $v1, %lo(asc2tbl)
|
||||
add $t1, $t0, $v1
|
||||
lbu $t8, 2($t1)
|
||||
lhu $t9, 0($t1)
|
||||
li $at, 0x70000
|
||||
andi $t2, $t8, 0xF
|
||||
addi $t3, $t2, 1
|
||||
sw $t3, ($a2)
|
||||
lb $t0, 3($t1)
|
||||
srl $t4, $t8, 4
|
||||
ori $at, $at, 0xEE80
|
||||
andi $t5, $t0, 1
|
||||
sll $t6, $t5, 4
|
||||
or $t7, $t6, $t4
|
||||
sw $t7, ($a1)
|
||||
sll $v0, $t9, 1
|
||||
sra $v1, $t0, 1
|
||||
sw $v1, ($a3)
|
||||
jr $ra
|
||||
add $v0, $v0, $at
|
||||
bltz a0, .out_of_range
|
||||
bge a0, 0x908, .out_of_range
|
||||
sll t0, a0, 2
|
||||
la v1, asc2tbl
|
||||
add t1, t0, v1
|
||||
lbu t8, 2(t1)
|
||||
lhu t9, 0(t1)
|
||||
andi t2, t8, 0xF
|
||||
addi t3, t2, 1
|
||||
sw t3, (a2)
|
||||
lb t0, 3(t1)
|
||||
srl t4, t8, 4
|
||||
andi t5, t0, 1
|
||||
sll t6, t5, 4
|
||||
or t7, t6, t4
|
||||
sw t7, (a1)
|
||||
sll v0, t9, 1
|
||||
sra v1, t0, 1
|
||||
sw v1, (a3)
|
||||
add v0, v0, 0x7EE80
|
||||
jr ra
|
||||
.out_of_range:
|
||||
jr $ra
|
||||
li $v0, -1
|
||||
li v0, -1
|
||||
jr ra
|
||||
END(LeoGetAAdr)
|
||||
|
||||
DATA(asc2tbl)
|
||||
|
||||
+20
-28
@@ -1,33 +1,25 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(LeoGetAAdr2)
|
||||
li $at, 0x10000
|
||||
srl $t8, $a0, 0xF
|
||||
ori $at, $at, 0xFFFE
|
||||
and $v1, $t8, $at
|
||||
li $at, 0x70000
|
||||
ori $at, $at, 0xEE80
|
||||
srl $t2, $a0, 0x8
|
||||
add $v0, $v1, $at
|
||||
andi $t3, $t2, 0xF
|
||||
andi $t5, $a0, 0xFE
|
||||
addi $t4, $t3, 1
|
||||
sll $t6, $t5, 0x18
|
||||
andi $t9, $a0, 0x1
|
||||
srl $v1, $a0, 0xC
|
||||
sw $t4, ($a2)
|
||||
sra $t7, $t6, 0x19
|
||||
sll $t8, $t9, 0x4
|
||||
andi $t1, $v1, 0xF
|
||||
sw $t7, ($a3)
|
||||
or $t2, $t1, $t8
|
||||
jr $ra
|
||||
sw $t2, ($a1)
|
||||
srl t8, a0, 15
|
||||
and v1, t8, 0x1FFFE
|
||||
add v0, v1, 0x7EE80
|
||||
srl t2, a0, 8
|
||||
andi t3, t2, 0xF
|
||||
andi t5, a0, 0xFE
|
||||
addi t4, t3, 1
|
||||
sll t6, t5, 24
|
||||
andi t9, a0, 1
|
||||
srl v1, a0, 12
|
||||
sw t4, (a2)
|
||||
sra t7, t6, 25
|
||||
sll t8, t9, 4
|
||||
andi t1, v1, 0xF
|
||||
sw t7, (a3)
|
||||
or t2, t1, t8
|
||||
sw t2, (a1)
|
||||
jr ra
|
||||
END(LeoGetAAdr2)
|
||||
|
||||
+59
-76
@@ -1,11 +1,7 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
/**
|
||||
* int LeoGetKAdr(int sjis);
|
||||
@@ -22,74 +18,61 @@
|
||||
* @return int Storage offset address into the N64 Disk Drive mask ROM.
|
||||
*/
|
||||
LEAF(LeoGetKAdr)
|
||||
// Check if the codepoint is in the range 0x8140 to 0x9872.
|
||||
li $at, 0x8140
|
||||
slt $at, $a0, $at
|
||||
bnez $at, .out_of_range
|
||||
li $at, 0x9873
|
||||
slt $at, $a0, $at
|
||||
beqz $at, .out_of_range
|
||||
// Characters with codepoints >= 0x8800 are kanji. Arrangement is regular,
|
||||
// so convert index directly.
|
||||
li $at, 0x8800
|
||||
slt $at, $a0, $at
|
||||
bnez $at, .nonkanji
|
||||
// 0xBC is number of glyphs in one block in the `kanji` file:
|
||||
// 0x100 possible codepoints with the same byte1
|
||||
// - 0x40 unused at beginning
|
||||
// - 1 unused at 0x7F
|
||||
// - 3 unused at 0xFD, 0xFE, 0xFF
|
||||
li $a2, 0xBC
|
||||
// Get byte1 and adjust so starts at 0
|
||||
srl $a1, $a0, 8
|
||||
addi $a1, $a1, -0x88
|
||||
multu $a2, $a1
|
||||
// Get byte2 and adjust so starts at 0
|
||||
andi $a3, $a0, 0xFF
|
||||
addi $a3, $a3, -0x40
|
||||
slti $at, $a3, (0x80 - 0x40)
|
||||
mflo $a2
|
||||
// 0x__7F is always empty and elided in the file, so decrement if larger
|
||||
bnezl $at, .kanji_lower_halfblock
|
||||
mflo $a2
|
||||
addi $a3, $a3, -1
|
||||
mflo $a2
|
||||
/* Check if the codepoint is in the range 0x8140 to 0x9872. */
|
||||
blt a0, 0x8140, .out_of_range
|
||||
bge a0, 0x9873, .out_of_range
|
||||
/* Characters with codepoints >= 0x8800 are kanji. Arrangement is regular,
|
||||
* so convert index directly. */
|
||||
li a2, 0xBC
|
||||
blt a0, 0x8800, .nonkanji
|
||||
/* 0xBC is number of glyphs in one block in the `kanji` file:
|
||||
* 0x100 possible codepoints with the same byte1
|
||||
* - 0x40 unused at beginning
|
||||
* - 1 unused at 0x7F
|
||||
* - 3 unused at 0xFD, 0xFE, 0xFF */
|
||||
/* Get byte1 and adjust so starts at 0 */
|
||||
srl a1, a0, 8
|
||||
addi a1, a1, -0x88
|
||||
mul a2, a2, a1
|
||||
/* Get byte2 and adjust so starts at 0 */
|
||||
andi a3, a0, 0xFF
|
||||
addi a3, a3, -0x40
|
||||
/* 0x__7F is always empty and elided in the file, so decrement if larger */
|
||||
blt a3, 0x40, .kanji_lower_halfblock
|
||||
addi a3, a3, -1
|
||||
.kanji_lower_halfblock:
|
||||
addi $a3, $a3, 0x30A
|
||||
add $a3, $a3, $a2
|
||||
jr $ra
|
||||
sll $v0, $a3, 7
|
||||
// returns (0x30A + (adjusted byte2) + (adjusted byte1) * 0xBC) * FONT_CHAR_TEX_SIZE
|
||||
mflo a2
|
||||
addi a3, a3, 0x30A
|
||||
add a3, a3, a2
|
||||
sll v0, a3, 7
|
||||
jr ra
|
||||
/* returns (0x30A + (adjusted byte2) + (adjusted byte1) * 0xBC) * FONT_CHAR_TEX_SIZE */
|
||||
|
||||
// Non-kanji are arranged with irregular gaps, use the lookup table.
|
||||
/* Non-kanji are arranged with irregular gaps, use the lookup table. */
|
||||
.nonkanji:
|
||||
// Get byte1 and adjust so starts at 0
|
||||
srl $a1, $a0, 8
|
||||
addi $a1, $a1, -0x81
|
||||
multu $a2, $a1
|
||||
// Get byte2 and adjust so starts at 0
|
||||
andi $a3, $a0, 0xFF
|
||||
addi $a3, $a3, -0x40
|
||||
slti $at, $a3, (0x80 - 0x40)
|
||||
mflo $a2
|
||||
// 0x__7F is always empty and elided in the file, so decrement if larger
|
||||
bnezl $at, .nonkanji_lower_halfblock
|
||||
mflo $a2
|
||||
addi $a3, $a3, -1
|
||||
mflo $a2
|
||||
/* Get byte1 and adjust so starts at 0 */
|
||||
srl a1, a0, 8
|
||||
addi a1, a1, -0x81
|
||||
mul a2, a2, a1
|
||||
/* Get byte2 and adjust so starts at 0 */
|
||||
andi a3, a0, 0xFF
|
||||
addi a3, a3, -0x40
|
||||
/* 0x__7F is always empty and elided in the file, so decrement if larger */
|
||||
blt a3, 0x40, .nonkanji_lower_halfblock
|
||||
addi a3, a3, -1
|
||||
.nonkanji_lower_halfblock:
|
||||
add $a3, $a3, $a2
|
||||
lui $a2, %hi(kantbl)
|
||||
sll $a3, $a3, 1
|
||||
addiu $a2, %lo(kantbl)
|
||||
add $a3, $a3, $a2
|
||||
lh $a2, ($a3)
|
||||
jr $ra
|
||||
sll $v0, $a2, 7
|
||||
// returns kantbl[(adjusted byte2) + (adjusted byte1) * 0xBC] * FONT_CHAR_TEX_SIZE
|
||||
mflo a2
|
||||
add a3, a3, a2
|
||||
sll a3, a3, 1
|
||||
la a2, kantbl
|
||||
add a3, a3, a2
|
||||
lh a2, (a3)
|
||||
sll v0, a2, 7
|
||||
jr ra
|
||||
/* returns kantbl[(adjusted byte2) + (adjusted byte1) * 0xBC] * FONT_CHAR_TEX_SIZE */
|
||||
.out_of_range:
|
||||
jr $ra
|
||||
li $v0, -1
|
||||
li v0, -1
|
||||
jr ra
|
||||
END(LeoGetKAdr)
|
||||
|
||||
/**
|
||||
@@ -129,7 +112,7 @@ END(LeoGetKAdr)
|
||||
* into blocks by high byte.
|
||||
*/
|
||||
DATA(kantbl)
|
||||
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
|
||||
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
|
||||
/* 0x814_ */ .half 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0006, 0x0007, 0x0008, 0x0009, 0x000A, 0x000B, 0x000C, 0x000D, 0x000E, 0x000F
|
||||
/* 0x815_ */ .half 0x0010, 0x0011, 0x0012, 0x0013, 0x0014, 0x0015, 0x0016, 0x0017, 0x0018, 0x0019, 0x001A, 0x001B, 0x001C, 0x001D, 0x001E, 0x001F
|
||||
/* 0x816_ */ .half 0x0020, 0x0021, 0x0022, 0x0023, 0x0024, 0x0025, 0x0026, 0x0027, 0x0028, 0x0029, 0x002A, 0x002B, 0x002C, 0x002D, 0x002E, 0x002F
|
||||
@@ -143,7 +126,7 @@ DATA(kantbl)
|
||||
/* 0x81E_ */ .half 0x0080, 0x0081, 0x0082, 0x0083, 0x0084, 0x0085, 0x0086, 0x0087, 0x0088, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
/* 0x81F_ */ .half 0x0089, 0x008A, 0x008B, 0x008C, 0x008D, 0x008E, 0x008F, 0x0090, 0x0000, 0x0000, 0x0000, 0x0000, 0x0091
|
||||
|
||||
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
|
||||
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
|
||||
/* 0x824_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0092
|
||||
/* 0x825_ */ .half 0x0093, 0x0094, 0x0095, 0x0096, 0x0097, 0x0098, 0x0099, 0x009A, 0x009B, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
/* 0x826_ */ .half 0x009C, 0x009D, 0x009E, 0x009F, 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, 0x00A8, 0x00A9, 0x00AA, 0x00AB
|
||||
@@ -157,7 +140,7 @@ DATA(kantbl)
|
||||
/* 0x82E_ */ .half 0x0111, 0x0112, 0x0113, 0x0114, 0x0115, 0x0116, 0x0117, 0x0118, 0x0119, 0x011A, 0x011B, 0x011C, 0x011D, 0x011E, 0x011F, 0x0120
|
||||
/* 0x82F_ */ .half 0x0121, 0x0122, 0x0123, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
|
||||
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
|
||||
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
|
||||
/* 0x834_ */ .half 0x0124, 0x0125, 0x0126, 0x0127, 0x0128, 0x0129, 0x012A, 0x012B, 0x012C, 0x012D, 0x012E, 0x012F, 0x0130, 0x0131, 0x0132, 0x0133
|
||||
/* 0x835_ */ .half 0x0134, 0x0135, 0x0136, 0x0137, 0x0138, 0x0139, 0x013A, 0x013B, 0x013C, 0x013D, 0x013E, 0x013F, 0x0140, 0x0141, 0x0142, 0x0143
|
||||
/* 0x836_ */ .half 0x0144, 0x0145, 0x0146, 0x0147, 0x0148, 0x0149, 0x014A, 0x014B, 0x014C, 0x014D, 0x014E, 0x014F, 0x0150, 0x0151, 0x0152, 0x0153
|
||||
@@ -171,7 +154,7 @@ DATA(kantbl)
|
||||
/* 0x83E_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
/* 0x83F_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
|
||||
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
|
||||
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
|
||||
/* 0x844_ */ .half 0x01AB, 0x01AC, 0x01AD, 0x01AE, 0x01AF, 0x01B0, 0x01B1, 0x01B2, 0x01B3, 0x01B4, 0x01B5, 0x01B6, 0x01B7, 0x01B8, 0x01B9, 0x01BA
|
||||
/* 0x845_ */ .half 0x01BB, 0x01BC, 0x01BD, 0x01BE, 0x01BF, 0x01C0, 0x01C1, 0x01C2, 0x01C3, 0x01C4, 0x01C5, 0x01C6, 0x01C7, 0x01C8, 0x01C9, 0x01CA
|
||||
/* 0x846_ */ .half 0x01CB, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
@@ -185,7 +168,7 @@ DATA(kantbl)
|
||||
/* 0x84E_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
/* 0x84F_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
|
||||
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
|
||||
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
|
||||
/* 0x854_ */ .half 0x020E, 0x020F, 0x0210, 0x0211, 0x0212, 0x0213, 0x0214, 0x0215, 0x0216, 0x0217, 0x0218, 0x0219, 0x021A, 0x021B, 0x021C, 0x021D
|
||||
/* 0x855_ */ .half 0x021E, 0x021F, 0x0220, 0x0221, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0222, 0x0223
|
||||
/* 0x856_ */ .half 0x0224, 0x0225, 0x0226, 0x0227, 0x0228, 0x0229, 0x022A, 0x022B, 0x022C, 0x022D, 0x022E, 0x022F, 0x0230, 0x0231, 0x0232, 0x0233
|
||||
@@ -199,7 +182,7 @@ DATA(kantbl)
|
||||
/* 0x85E_ */ .half 0x026C, 0x026D, 0x026E, 0x026F, 0x0270, 0x0271, 0x0272, 0x0273, 0x0274, 0x0275, 0x0276, 0x0277, 0x0278, 0x0279, 0x027A, 0x027B
|
||||
/* 0x85F_ */ .half 0x027C, 0x027D, 0x027E, 0x027F, 0x0280, 0x0281, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
|
||||
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
|
||||
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
|
||||
/* 0x864_ */ .half 0x0282, 0x0283, 0x0284, 0x0285, 0x0286, 0x0287, 0x0288, 0x0289, 0x028A, 0x028B, 0x028C, 0x028D, 0x028E, 0x028F, 0x0290, 0x0291
|
||||
/* 0x865_ */ .half 0x0292, 0x0293, 0x0294, 0x0295, 0x0296, 0x0297, 0x0298, 0x0299, 0x029A, 0x029B, 0x029C, 0x029D, 0x029E, 0x029F, 0x0000, 0x0000
|
||||
/* 0x866_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
@@ -213,7 +196,7 @@ DATA(kantbl)
|
||||
/* 0x86E_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
/* 0x86F_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
|
||||
// 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F
|
||||
/* 0x___0 0x___1 0x___2 0x___3 0x___4 0x___5 0x___6 0x___7 0x___8 0x___9 0x___A 0x___B 0x___C 0x___D 0x___E 0x___F */
|
||||
/* 0x874_ */ .half 0x02C0, 0x02C1, 0x02C2, 0x02C3, 0x02C4, 0x02C5, 0x02C6, 0x02C7, 0x02C8, 0x02C9, 0x02CA, 0x02CB, 0x02CC, 0x02CD, 0x02CE, 0x02CF
|
||||
/* 0x875_ */ .half 0x02D0, 0x02D1, 0x02D2, 0x02D3, 0x02D4, 0x02D5, 0x02D6, 0x02D7, 0x02D8, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
/* 0x876_ */ .half 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
|
||||
@@ -1,8 +1,6 @@
|
||||
#include "ultra64/asm.h"
|
||||
|
||||
.section .rodata
|
||||
|
||||
.balign 16
|
||||
.rdata
|
||||
|
||||
DATA(__libm_qnan_f)
|
||||
.word 0x7F810000
|
||||
|
||||
@@ -16,15 +16,15 @@ OSViMode osViModeFpalLan1 = {
|
||||
{
|
||||
// comRegs
|
||||
VI_CTRL_TYPE_16 | VI_CTRL_GAMMA_DITHER_ON | VI_CTRL_GAMMA_ON | VI_CTRL_DIVOT_ON | VI_CTRL_ANTIALIAS_MODE_1 |
|
||||
VI_CTRL_PIXEL_ADV_3, // ctrl
|
||||
WIDTH(320), // width
|
||||
BURST(58, 30, 4, 69), // burst
|
||||
VSYNC(625), // vSync
|
||||
HSYNC(3177, 23), // hSync
|
||||
LEAP(3183, 3181), // leap
|
||||
HSTART(128, 768), // hStart
|
||||
SCALE(2, 0), // xScale
|
||||
VCURRENT(0), // vCurrent
|
||||
VI_CTRL_PIXEL_ADV(3), // ctrl
|
||||
WIDTH(320), // width
|
||||
BURST(58, 30, 4, 69), // burst
|
||||
VSYNC(625), // vSync
|
||||
HSYNC(3177, 23), // hSync
|
||||
LEAP(3183, 3181), // leap
|
||||
HSTART(128, 768), // hStart
|
||||
SCALE(2, 0), // xScale
|
||||
VCURRENT(0), // vCurrent
|
||||
},
|
||||
{ // fldRegs
|
||||
{
|
||||
|
||||
@@ -16,15 +16,15 @@ OSViMode osViModeMpalLan1 = {
|
||||
{
|
||||
// comRegs
|
||||
VI_CTRL_TYPE_16 | VI_CTRL_GAMMA_DITHER_ON | VI_CTRL_GAMMA_ON | VI_CTRL_DIVOT_ON | VI_CTRL_ANTIALIAS_MODE_1 |
|
||||
VI_CTRL_PIXEL_ADV_3, // ctrl
|
||||
WIDTH(320), // width
|
||||
BURST(57, 30, 5, 70), // burst
|
||||
VSYNC(525), // vSync
|
||||
HSYNC(3089, 4), // hSync
|
||||
LEAP(3097, 3098), // leap
|
||||
HSTART(108, 748), // hStart
|
||||
SCALE(2, 0), // xScale
|
||||
VCURRENT(0), // vCurrent
|
||||
VI_CTRL_PIXEL_ADV(3), // ctrl
|
||||
WIDTH(320), // width
|
||||
BURST(57, 30, 5, 70), // burst
|
||||
VSYNC(525), // vSync
|
||||
HSYNC(3089, 4), // hSync
|
||||
LEAP(3097, 3098), // leap
|
||||
HSTART(108, 748), // hStart
|
||||
SCALE(2, 0), // xScale
|
||||
VCURRENT(0), // vCurrent
|
||||
},
|
||||
{ // fldRegs
|
||||
{
|
||||
|
||||
@@ -16,15 +16,15 @@ OSViMode osViModeNtscLan1 = {
|
||||
{
|
||||
// comRegs
|
||||
VI_CTRL_TYPE_16 | VI_CTRL_GAMMA_DITHER_ON | VI_CTRL_GAMMA_ON | VI_CTRL_DIVOT_ON | VI_CTRL_ANTIALIAS_MODE_1 |
|
||||
VI_CTRL_PIXEL_ADV_3, // ctrl
|
||||
WIDTH(320), // width
|
||||
BURST(57, 34, 5, 62), // burst
|
||||
VSYNC(525), // vSync
|
||||
HSYNC(3093, 0), // hSync
|
||||
LEAP(3093, 3093), // leap
|
||||
HSTART(108, 748), // hStart
|
||||
SCALE(2, 0), // xScale
|
||||
VCURRENT(0), // vCurrent
|
||||
VI_CTRL_PIXEL_ADV(3), // ctrl
|
||||
WIDTH(320), // width
|
||||
BURST(57, 34, 5, 62), // burst
|
||||
VSYNC(525), // vSync
|
||||
HSYNC(3093, 0), // hSync
|
||||
LEAP(3093, 3093), // leap
|
||||
HSTART(108, 748), // hStart
|
||||
SCALE(2, 0), // xScale
|
||||
VCURRENT(0), // vCurrent
|
||||
},
|
||||
{ // fldRegs
|
||||
{
|
||||
|
||||
@@ -16,15 +16,15 @@ OSViMode osViModePalLan1 = {
|
||||
{
|
||||
// comRegs
|
||||
VI_CTRL_TYPE_16 | VI_CTRL_GAMMA_DITHER_ON | VI_CTRL_GAMMA_ON | VI_CTRL_DIVOT_ON | VI_CTRL_ANTIALIAS_MODE_1 |
|
||||
VI_CTRL_PIXEL_ADV_3, // ctrl
|
||||
WIDTH(320), // width
|
||||
BURST(58, 30, 4, 69), // burst
|
||||
VSYNC(625), // vSync
|
||||
HSYNC(3177, 23), // hSync
|
||||
LEAP(3183, 3181), // leap
|
||||
HSTART(128, 768), // hStart
|
||||
SCALE(2, 0), // xScale
|
||||
VCURRENT(0), // vCurrent
|
||||
VI_CTRL_PIXEL_ADV(3), // ctrl
|
||||
WIDTH(320), // width
|
||||
BURST(58, 30, 4, 69), // burst
|
||||
VSYNC(625), // vSync
|
||||
HSYNC(3177, 23), // hSync
|
||||
LEAP(3183, 3181), // leap
|
||||
HSTART(128, 768), // hStart
|
||||
SCALE(2, 0), // xScale
|
||||
VCURRENT(0), // vCurrent
|
||||
},
|
||||
{ // fldRegs
|
||||
{
|
||||
|
||||
+72
-76
@@ -1,93 +1,89 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(bcmp)
|
||||
slti $at, $a2, 0x10
|
||||
bnez $at, bytecmp
|
||||
xor $v0, $a0, $a1
|
||||
andi $v0, $v0, 3
|
||||
bnez $v0, unaligncmp
|
||||
negu $t8, $a0
|
||||
andi $t8, $t8, 3
|
||||
beqz $t8, wordcmp
|
||||
subu $a2, $a2, $t8
|
||||
move $v0, $v1
|
||||
lwl $v0, ($a0)
|
||||
lwl $v1, ($a1)
|
||||
addu $a0, $a0, $t8
|
||||
addu $a1, $a1, $t8
|
||||
bne $v0, $v1, cmpne
|
||||
xor v0, a0, a1
|
||||
blt a2, 0x10, bytecmp
|
||||
|
||||
and v0, v0, 3
|
||||
negu t8, a0
|
||||
bnez v0, unaligncmp
|
||||
|
||||
and t8, t8, 3
|
||||
subu a2, a2, t8
|
||||
beqz t8, wordcmp
|
||||
|
||||
move v0, v1
|
||||
lwl v0, (a0)
|
||||
lwl v1, (a1)
|
||||
addu a0, a0, t8
|
||||
addu a1, a1, t8
|
||||
bne v0, v1, cmpne
|
||||
|
||||
wordcmp:
|
||||
li $at, ~3
|
||||
and $a3, $a2, $at
|
||||
beqz $a3, bytecmp
|
||||
subu $a2, $a2, $a3
|
||||
addu $a3, $a3, $a0
|
||||
lw $v0, ($a0)
|
||||
and a3, a2, ~3
|
||||
subu a2, a2, a3
|
||||
beqz a3, bytecmp
|
||||
|
||||
addu a3, a3, a0
|
||||
1:
|
||||
lw $v1, ($a1)
|
||||
addiu $a0, $a0, 4
|
||||
addiu $a1, $a1, 4
|
||||
bne $v0, $v1, cmpne
|
||||
nop
|
||||
bnel $a0, $a3, 1b
|
||||
lw $v0, ($a0)
|
||||
lw v0, (a0)
|
||||
lw v1, (a1)
|
||||
addu a0, a0, 4
|
||||
addu a1, a1, 4
|
||||
bne v0, v1, cmpne
|
||||
bne a0, a3, 1b
|
||||
|
||||
b bytecmp
|
||||
nop
|
||||
|
||||
unaligncmp:
|
||||
negu $a3, $a1
|
||||
andi $a3, $a3, 3
|
||||
beqz $a3, partaligncmp
|
||||
subu $a2, $a2, $a3
|
||||
addu $a3, $a3, $a0
|
||||
lbu $v0, ($a0)
|
||||
negu a3, a1
|
||||
and a3, a3, 3
|
||||
subu a2, a2, a3
|
||||
beqz a3, partaligncmp
|
||||
|
||||
addu a3, a3, a0
|
||||
1:
|
||||
lbu $v1, ($a1)
|
||||
addiu $a0, $a0, 1
|
||||
addiu $a1, $a1, 1
|
||||
bne $v0, $v1, cmpne
|
||||
nop
|
||||
bnel $a0, $a3, 1b
|
||||
lbu $v0, ($a0)
|
||||
lbu v0, (a0)
|
||||
lbu v1, (a1)
|
||||
addu a0, a0, 1
|
||||
addu a1, a1, 1
|
||||
bne v0, v1, cmpne
|
||||
bne a0, a3, 1b
|
||||
|
||||
partaligncmp:
|
||||
li $at, ~3
|
||||
and $a3, $a2, $at
|
||||
beqz $a3, bytecmp
|
||||
subu $a2, $a2, $a3
|
||||
addu $a3, $a3, $a0
|
||||
lwl $v0, ($a0)
|
||||
and a3, a2, ~3
|
||||
subu a2, a2, a3
|
||||
beqz a3, bytecmp
|
||||
|
||||
addu a3, a3, a0
|
||||
1:
|
||||
lw $v1, ($a1)
|
||||
lwr $v0, 3($a0)
|
||||
addiu $a0, $a0, 4
|
||||
addiu $a1, $a1, 4
|
||||
bne $v0, $v1, cmpne
|
||||
nop
|
||||
bnel $a0, $a3, 1b
|
||||
lwl $v0, ($a0)
|
||||
lwl v0, (a0)
|
||||
lw v1, (a1)
|
||||
lwr v0, 3(a0)
|
||||
addu a0, a0, 4
|
||||
addu a1, a1, 4
|
||||
bne v0, v1, cmpne
|
||||
bne a0, a3, 1b
|
||||
|
||||
bytecmp:
|
||||
blez $a2, cmpdone
|
||||
addu $a3, $a2, $a0
|
||||
lbu $v0, ($a0)
|
||||
addu a3, a2, a0
|
||||
blez a2, cmpdone
|
||||
1:
|
||||
lbu $v1, ($a1)
|
||||
addiu $a0, $a0, 1
|
||||
addiu $a1, $a1, 1
|
||||
bne $v0, $v1, cmpne
|
||||
nop
|
||||
bnel $a0, $a3, 1b
|
||||
lbu $v0, ($a0)
|
||||
lbu v0, (a0)
|
||||
lbu v1, (a1)
|
||||
addu a0, a0, 1
|
||||
addu a1, a1, 1
|
||||
bne v0, v1, cmpne
|
||||
bne a0, a3, 1b
|
||||
|
||||
cmpdone:
|
||||
jr $ra
|
||||
move $v0, $zero
|
||||
move v0, zero
|
||||
jr ra
|
||||
|
||||
cmpne:
|
||||
jr $ra
|
||||
li $v0, 1
|
||||
li v0, 1
|
||||
jr ra
|
||||
END(bcmp)
|
||||
|
||||
+172
-194
@@ -1,233 +1,211 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(bcopy)
|
||||
beqz $a2, ret
|
||||
move $a3, $a1
|
||||
beq $a0, $a1, ret
|
||||
slt $at, $a1, $a0
|
||||
bnezl $at, goforwards
|
||||
slti $at, $a2, 0x10
|
||||
add $v0, $a0, $a2
|
||||
slt $at, $a1, $v0
|
||||
beql $at, $zero, goforwards
|
||||
slti $at, $a2, 0x10
|
||||
move a3, a1
|
||||
beqz a2, ret
|
||||
beq a0, a1, ret
|
||||
blt a1, a0, goforwards
|
||||
add v0, a0, a2
|
||||
bge a1, v0, goforwards
|
||||
b gobackwards
|
||||
slti $at, $a2, 0x10
|
||||
slti $at, $a2, 0x10
|
||||
|
||||
goforwards:
|
||||
bnez $at, forwards_bytecopy
|
||||
nop
|
||||
andi $v0, $a0, 3
|
||||
andi $v1, $a1, 3
|
||||
beq $v0, $v1, forwalignable
|
||||
nop
|
||||
blt a2, 0x10, forwards_bytecopy
|
||||
and v0, a0, 3
|
||||
and v1, a1, 3
|
||||
beq v0, v1, forwalignable
|
||||
|
||||
forwards_bytecopy:
|
||||
beqz $a2, ret
|
||||
nop
|
||||
addu $v1, $a0, $a2
|
||||
beqz a2, ret
|
||||
addu v1, a0, a2
|
||||
99:
|
||||
lb $v0, ($a0)
|
||||
addiu $a0, $a0, 1
|
||||
addiu $a1, $a1, 1
|
||||
bne $a0, $v1, 99b
|
||||
sb $v0, -1($a1)
|
||||
lb v0, (a0)
|
||||
addu a0, a0, 1
|
||||
sb v0, (a1)
|
||||
addu a1, a1, 1
|
||||
bne a0, v1, 99b
|
||||
ret:
|
||||
jr $ra
|
||||
move $v0, $a3
|
||||
move v0, a3
|
||||
jr ra
|
||||
|
||||
forwalignable:
|
||||
beqz $v0, forwards_32
|
||||
li $at, 1
|
||||
beq $v0, $at, forw_copy3
|
||||
li $at, 2
|
||||
beql $v0, $at, forw_copy2
|
||||
lh $v0, ($a0)
|
||||
lb $v0, ($a0)
|
||||
addiu $a0, $a0, 1
|
||||
addiu $a1, $a1, 1
|
||||
addiu $a2, $a2, -1
|
||||
beqz v0, forwards_32
|
||||
beq v0, 1, forw_copy3
|
||||
beq v0, 2, forw_copy2
|
||||
|
||||
lb v0, (a0)
|
||||
addu a0, a0, 1
|
||||
sb v0, (a1)
|
||||
addu a1, a1, 1
|
||||
addu a2, a2, -1
|
||||
b forwards_32
|
||||
sb $v0, -1($a1)
|
||||
lh $v0, ($a0)
|
||||
|
||||
forw_copy2:
|
||||
addiu $a0, $a0, 2
|
||||
addiu $a1, $a1, 2
|
||||
addiu $a2, $a2, -2
|
||||
lh v0, (a0)
|
||||
addu a0, a0, 2
|
||||
sh v0, (a1)
|
||||
addu a1, a1, 2
|
||||
addu a2, a2, -2
|
||||
b forwards_32
|
||||
sh $v0, -2($a1)
|
||||
|
||||
forw_copy3:
|
||||
lb $v0, ($a0)
|
||||
lh $v1, 1($a0)
|
||||
addiu $a0, $a0, 3
|
||||
addiu $a1, $a1, 3
|
||||
addiu $a2, $a2, -3
|
||||
sb $v0, -3($a1)
|
||||
sh $v1, -2($a1)
|
||||
lb v0, (a0)
|
||||
lh v1, 1(a0)
|
||||
addiu a0, a0, 3
|
||||
sb v0, (a1)
|
||||
sh v1, 1(a1)
|
||||
addiu a1, a1, 3
|
||||
addiu a2, a2, -3
|
||||
|
||||
forwards:
|
||||
forwards_32:
|
||||
slti $at, $a2, 0x20
|
||||
bnezl $at, forwards_16_
|
||||
slti $at, $a2, 0x10
|
||||
lw $v0, ($a0)
|
||||
lw $v1, 4($a0)
|
||||
lw $t0, 8($a0)
|
||||
lw $t1, 0xC($a0)
|
||||
lw $t2, 0x10($a0)
|
||||
lw $t3, 0x14($a0)
|
||||
lw $t4, 0x18($a0)
|
||||
lw $t5, 0x1C($a0)
|
||||
addiu $a0, $a0, 0x20
|
||||
addiu $a1, $a1, 0x20
|
||||
addiu $a2, $a2, -0x20
|
||||
sw $v0, -0x20($a1)
|
||||
sw $v1, -0x1C($a1)
|
||||
sw $t0, -0x18($a1)
|
||||
sw $t1, -0x14($a1)
|
||||
sw $t2, -0x10($a1)
|
||||
sw $t3, -0xC($a1)
|
||||
sw $t4, -8($a1)
|
||||
blt a2, 32, forwards_16
|
||||
lw v0, 0(a0)
|
||||
lw v1, 4(a0)
|
||||
lw t0, 8(a0)
|
||||
lw t1, 12(a0)
|
||||
lw t2, 16(a0)
|
||||
lw t3, 20(a0)
|
||||
lw t4, 24(a0)
|
||||
lw t5, 28(a0)
|
||||
addiu a0, a0, 32
|
||||
sw v0, 0(a1)
|
||||
sw v1, 4(a1)
|
||||
sw t0, 8(a1)
|
||||
sw t1, 12(a1)
|
||||
sw t2, 16(a1)
|
||||
sw t3, 20(a1)
|
||||
sw t4, 24(a1)
|
||||
sw t5, 28(a1)
|
||||
addiu a1, a1, 32
|
||||
addiu a2, a2, -32
|
||||
b forwards_32
|
||||
sw $t5, -4($a1)
|
||||
|
||||
forwards_16:
|
||||
slti $at, $a2, 0x10
|
||||
forwards_16_: // fake label due to branch likely optimization
|
||||
bnezl $at, forwards_4_
|
||||
slti $at, $a2, 4
|
||||
lw $v0, ($a0)
|
||||
lw $v1, 4($a0)
|
||||
lw $t0, 8($a0)
|
||||
lw $t1, 0xC($a0)
|
||||
addiu $a0, $a0, 0x10
|
||||
addiu $a1, $a1, 0x10
|
||||
addiu $a2, $a2, -0x10
|
||||
sw $v0, -0x10($a1)
|
||||
sw $v1, -0xC($a1)
|
||||
sw $t0, -8($a1)
|
||||
blt a2, 16, forwards_4
|
||||
lw v0, 0(a0)
|
||||
lw v1, 4(a0)
|
||||
lw t0, 8(a0)
|
||||
lw t1, 12(a0)
|
||||
addiu a0, a0, 16
|
||||
sw v0, 0(a1)
|
||||
sw v1, 4(a1)
|
||||
sw t0, 8(a1)
|
||||
sw t1, 12(a1)
|
||||
addiu a1, a1, 16
|
||||
addiu a2, a2, -16
|
||||
b forwards_16
|
||||
sw $t1, -4($a1)
|
||||
|
||||
forwards_4:
|
||||
slti $at, $a2, 4
|
||||
forwards_4_: // fake label due to branch likely optimization
|
||||
bnez $at, forwards_bytecopy
|
||||
nop
|
||||
lw $v0, ($a0)
|
||||
addiu $a0, $a0, 4
|
||||
addiu $a1, $a1, 4
|
||||
addiu $a2, $a2, -4
|
||||
blt a2, 4, forwards_bytecopy
|
||||
|
||||
lw v0, 0(a0)
|
||||
addiu a0, a0, 4
|
||||
sw v0, 0(a1)
|
||||
addiu a1, a1, 4
|
||||
addiu a2, a2, -4
|
||||
b forwards_4
|
||||
sw $v0, -4($a1)
|
||||
slti $at, $a2, 0x10
|
||||
|
||||
gobackwards:
|
||||
add $a0, $a0, $a2
|
||||
bnez $at, backwards_bytecopy
|
||||
add $a1, $a1, $a2
|
||||
andi $v0, $a0, 3
|
||||
andi $v1, $a1, 3
|
||||
beq $v0, $v1, backalignable
|
||||
nop
|
||||
add a0, a0,a2
|
||||
add a1, a1,a2
|
||||
blt a2, 16, backwards_bytecopy
|
||||
|
||||
andi v0, a0, 0x3
|
||||
andi v1, a1, 0x3
|
||||
beq v0, v1, backalignable
|
||||
|
||||
backwards_bytecopy:
|
||||
beqz $a2, ret
|
||||
nop
|
||||
addiu $a0, $a0, -1
|
||||
addiu $a1, $a1, -1
|
||||
subu $v1, $a0, $a2
|
||||
beqz a2, ret
|
||||
addiu a0, a0, -1
|
||||
addiu a1, a1, -1
|
||||
subu v1, a0,a2
|
||||
99:
|
||||
lb $v0, ($a0)
|
||||
addiu $a0, $a0, -1
|
||||
addiu $a1, $a1, -1
|
||||
bne $a0, $v1, 99b
|
||||
sb $v0, 1($a1)
|
||||
jr $ra
|
||||
move $v0, $a3
|
||||
lb v0, 0(a0)
|
||||
addiu a0, a0, -1
|
||||
sb v0, 0(a1)
|
||||
addiu a1, a1, -1
|
||||
bne a0, v1,99b
|
||||
|
||||
move v0, a3
|
||||
jr ra
|
||||
|
||||
backalignable:
|
||||
beqz $v0, backwards_32
|
||||
li $at, 3
|
||||
beq $v0, $at, back_copy3
|
||||
li $at, 2
|
||||
beql $v0, $at, back_copy2
|
||||
lh $v0, -2($a0)
|
||||
lb $v0, -1($a0)
|
||||
addiu $a0, $a0, -1
|
||||
addiu $a1, $a1, -1
|
||||
addiu $a2, $a2, -1
|
||||
b backwards_32
|
||||
sb $v0, ($a1)
|
||||
lh $v0, -2($a0)
|
||||
beqz v0, backwards
|
||||
beq v0, 3, back_copy3
|
||||
beq v0, 2, back_copy2
|
||||
lb v0, -1(a0)
|
||||
addiu a0, a0, -1
|
||||
sb v0, -1(a1)
|
||||
addiu a1, a1, -1
|
||||
addiu a2, a2, -1
|
||||
b backwards
|
||||
|
||||
back_copy2:
|
||||
addiu $a0, $a0, -2
|
||||
addiu $a1, $a1, -2
|
||||
addiu $a2, $a2, -2
|
||||
b backwards_32
|
||||
sh $v0, ($a1)
|
||||
lh v0, -2(a0)
|
||||
addiu a0, a0, -2
|
||||
sh v0, -2(a1)
|
||||
addiu a1, a1, -2
|
||||
addiu a2, a2, -2
|
||||
b backwards
|
||||
|
||||
back_copy3:
|
||||
lb $v0, -1($a0)
|
||||
lh $v1, -3($a0)
|
||||
addiu $a0, $a0, -3
|
||||
addiu $a1, $a1, -3
|
||||
addiu $a2, $a2, -3
|
||||
sb $v0, 2($a1)
|
||||
sh $v1, ($a1)
|
||||
lb v0, -1(a0)
|
||||
lh v1, -3(a0)
|
||||
addiu a0, a0, -3
|
||||
sb v0, -1(a1)
|
||||
sh v1, -3(a1)
|
||||
addiu a1, a1, -3
|
||||
addiu a2, a2, -3
|
||||
|
||||
backwards:
|
||||
backwards_32:
|
||||
slti $at, $a2, 0x20
|
||||
bnezl $at, backwards_16_
|
||||
slti $at, $a2, 0x10
|
||||
lw $v0, -4($a0)
|
||||
lw $v1, -8($a0)
|
||||
lw $t0, -0xc($a0)
|
||||
lw $t1, -0x10($a0)
|
||||
lw $t2, -0x14($a0)
|
||||
lw $t3, -0x18($a0)
|
||||
lw $t4, -0x1c($a0)
|
||||
lw $t5, -0x20($a0)
|
||||
addiu $a0, $a0, -0x20
|
||||
addiu $a1, $a1, -0x20
|
||||
addiu $a2, $a2, -0x20
|
||||
sw $v0, 0x1C($a1)
|
||||
sw $v1, 0x18($a1)
|
||||
sw $t0, 0x14($a1)
|
||||
sw $t1, 0x10($a1)
|
||||
sw $t2, 0xC($a1)
|
||||
sw $t3, 8($a1)
|
||||
sw $t4, 4($a1)
|
||||
blt a2, 32, backwards_16
|
||||
lw v0, -4(a0)
|
||||
lw v1, -8(a0)
|
||||
lw t0, -12(a0)
|
||||
lw t1, -16(a0)
|
||||
lw t2, -20(a0)
|
||||
lw t3, -24(a0)
|
||||
lw t4, -28(a0)
|
||||
lw t5, -32(a0)
|
||||
addiu a0, a0, -32
|
||||
sw v0, -4(a1)
|
||||
sw v1, -8(a1)
|
||||
sw t0, -12(a1)
|
||||
sw t1, -16(a1)
|
||||
sw t2, -20(a1)
|
||||
sw t3, -24(a1)
|
||||
sw t4, -28(a1)
|
||||
sw t5, -32(a1)
|
||||
addiu a1, a1, -32
|
||||
addiu a2, a2, -32
|
||||
b backwards_32
|
||||
sw $t5, ($a1)
|
||||
|
||||
backwards_16:
|
||||
slti $at, $a2, 0x10
|
||||
backwards_16_: // fake label due to branch likely optimization
|
||||
bnezl $at, backwards_4_
|
||||
slti $at, $a2, 4
|
||||
lw $v0, -4($a0)
|
||||
lw $v1, -8($a0)
|
||||
lw $t0, -0xC($a0)
|
||||
lw $t1, -0x10($a0)
|
||||
addiu $a0, $a0, -0x10
|
||||
addiu $a1, $a1, -0x10
|
||||
addiu $a2, $a2, -0x10
|
||||
sw $v0, 0xC($a1)
|
||||
sw $v1, 8($a1)
|
||||
sw $t0, 4($a1)
|
||||
blt a2, 16, backwards_4
|
||||
lw v0, -4(a0)
|
||||
lw v1, -8(a0)
|
||||
lw t0, -12(a0)
|
||||
lw t1, -16(a0)
|
||||
addiu a0, a0, -16
|
||||
sw v0, -4(a1)
|
||||
sw v1, -8(a1)
|
||||
sw t0, -12(a1)
|
||||
sw t1, -16(a1)
|
||||
addiu a1, a1, -16
|
||||
addiu a2, a2, -16
|
||||
b backwards_16
|
||||
sw $t1, ($a1)
|
||||
|
||||
backwards_4:
|
||||
slti $at, $a2, 4
|
||||
backwards_4_: // fake label due to branch likely optimization
|
||||
bnez $at, backwards_bytecopy
|
||||
nop
|
||||
lw $v0, -4($a0)
|
||||
addiu $a0, $a0, -4
|
||||
addiu $a1, $a1, -4
|
||||
addiu $a2, $a2, -4
|
||||
blt a2, 4, backwards_bytecopy
|
||||
lw v0, -4(a0)
|
||||
addiu a0, a0, -4
|
||||
sw v0, -4(a1)
|
||||
addiu a1, a1, -4
|
||||
addiu a2, a2, -4
|
||||
b backwards_4
|
||||
sw $v0, ($a1)
|
||||
END(bcopy)
|
||||
|
||||
+47
-53
@@ -1,65 +1,59 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(bzero)
|
||||
slti $at, $a1, 0xC
|
||||
bnez $at, bytezero
|
||||
negu $v1, $a0
|
||||
andi $v1, $v1, 3
|
||||
beqz $v1, blkzero
|
||||
subu $a1, $a1, $v1
|
||||
swl $zero, ($a0)
|
||||
addu $a0, $a0, $v1
|
||||
negu v1, a0
|
||||
blt a1, 0xC, bytezero
|
||||
|
||||
and v1, v1, 3
|
||||
subu a1, a1, v1
|
||||
beqz v1, blkzero
|
||||
|
||||
swl zero, (a0)
|
||||
addu a0, a0, v1
|
||||
blkzero:
|
||||
// align backwards to 0x20
|
||||
li $at, ~0x1F
|
||||
and $a3, $a1, $at
|
||||
// If the result is zero, the amount to zero is less than 0x20 bytes
|
||||
beqz $a3, wordzero
|
||||
subu $a1, $a1, $a3
|
||||
// zero in blocks of 0x20 at a time
|
||||
addu $a3, $a3, $a0
|
||||
/* align backwards to 0x20 */
|
||||
and a3, a1, ~(0x20 - 1)
|
||||
/* If the result is zero, the amount to zero is less than 0x20 bytes */
|
||||
subu a1, a1, a3
|
||||
beqz a3, wordzero
|
||||
/* zero in blocks of 0x20 at a time */
|
||||
addu a3, a3, a0
|
||||
1:
|
||||
addiu $a0, $a0, 0x20
|
||||
sw $zero, -0x20($a0)
|
||||
sw $zero, -0x1C($a0)
|
||||
sw $zero, -0x18($a0)
|
||||
sw $zero, -0x14($a0)
|
||||
sw $zero, -0x10($a0)
|
||||
sw $zero, -0xC($a0)
|
||||
sw $zero, -8($a0)
|
||||
bne $a0, $a3, 1b
|
||||
sw $zero, -4($a0)
|
||||
sw zero, 0(a0)
|
||||
sw zero, 4(a0)
|
||||
sw zero, 8(a0)
|
||||
sw zero, 12(a0)
|
||||
addiu a0, a0, 0x20
|
||||
sw zero, -16(a0)
|
||||
sw zero, -12(a0)
|
||||
sw zero, -8(a0)
|
||||
sw zero, -4(a0)
|
||||
bne a0, a3, 1b
|
||||
|
||||
wordzero:
|
||||
// align backwards to 0x4
|
||||
li $at, ~3
|
||||
and $a3, $a1, $at
|
||||
// If the result is zero, the amount to zero is less than 0x4 bytes
|
||||
beqz $a3, bytezero
|
||||
subu $a1, $a1, $a3
|
||||
// zero one word at a time
|
||||
addu $a3, $a3, $a0
|
||||
/* align backwards to 0x4 */
|
||||
and a3, a1, ~3
|
||||
/* If the result is zero, the amount to zero is less than 0x4 bytes */
|
||||
subu a1, a1, a3
|
||||
beqz a3, bytezero
|
||||
/* zero one word at a time */
|
||||
addu a3, a3, a0
|
||||
1:
|
||||
addiu $a0, $a0, 4
|
||||
bne $a0, $a3, 1b
|
||||
sw $zero, -4($a0)
|
||||
addu a0, a0, 4
|
||||
sw zero, -4(a0)
|
||||
bne a0, a3, 1b
|
||||
bytezero:
|
||||
// test if nothing left to zero
|
||||
blez $a1, zerodone
|
||||
nop
|
||||
// zero one byte at a time
|
||||
addu $a1, $a1, $a0
|
||||
/* test if nothing left to zero */
|
||||
blez a1, zerodone
|
||||
/* zero one byte at a time */
|
||||
addu a1, a1, a0
|
||||
1:
|
||||
addiu $a0, $a0, 1
|
||||
bne $a0, $a1, 1b
|
||||
sb $zero, -1($a0)
|
||||
sb zero, (a0)
|
||||
addiu a0, a0, 1
|
||||
bne a0, a1, 1b
|
||||
zerodone:
|
||||
jr $ra
|
||||
nop
|
||||
jr ra
|
||||
END(bzero)
|
||||
|
||||
+27
-31
@@ -1,40 +1,36 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 32
|
||||
.text
|
||||
.align 5
|
||||
|
||||
#define MTX_INTPART 0
|
||||
#define MTX_FRACPART 0x20
|
||||
|
||||
LEAF(guMtxF2L)
|
||||
li $at, 0x47800000 // 65536.0f
|
||||
mtc1 $at, $f0
|
||||
li $t9, 0xFFFF0000
|
||||
addiu $t8, $a1, MTX_FRACPART
|
||||
li.s fv0, 65536.0
|
||||
li t9, 0xFFFF0000
|
||||
addu t8, a1, MTX_FRACPART
|
||||
1:
|
||||
lwc1 $f4, ($a0)
|
||||
lwc1 $f10, 4($a0)
|
||||
addiu $a1, $a1, 4
|
||||
mul.s $f6, $f4, $f0
|
||||
addiu $a0, $a0, 8
|
||||
mul.s $f16, $f10, $f0
|
||||
trunc.w.s $f8, $f6
|
||||
trunc.w.s $f18, $f16
|
||||
mfc1 $t0, $f8
|
||||
mfc1 $t1, $f18
|
||||
and $t2, $t0, $t9
|
||||
sll $t5, $t0, 0x10
|
||||
srl $t3, $t1, 0x10
|
||||
andi $t6, $t1, 0xFFFF
|
||||
or $t4, $t2, $t3
|
||||
or $t7, $t5, $t6
|
||||
sw $t4, (MTX_INTPART-4)($a1)
|
||||
bne $a1, $t8, 1b
|
||||
sw $t7, (MTX_FRACPART-4)($a1)
|
||||
jr $ra
|
||||
nop
|
||||
lwc1 ft0, 0(a0)
|
||||
lwc1 ft3, 4(a0)
|
||||
mul.s ft1, ft0, fv0
|
||||
mul.s ft4, ft3, fv0
|
||||
trunc.w.s ft2, ft1
|
||||
trunc.w.s ft5, ft4
|
||||
mfc1 t0, ft2
|
||||
mfc1 t1, ft5
|
||||
srl t3, t1, 0x10
|
||||
and t6, t1, 0xFFFF
|
||||
and t2, t0, t9
|
||||
sll t5, t0, 0x10
|
||||
or t4, t2, t3
|
||||
or t7, t5, t6
|
||||
sw t4, (MTX_INTPART)(a1)
|
||||
sw t7, (MTX_FRACPART)(a1)
|
||||
addu a0, a0, 8
|
||||
addu a1, a1, 4
|
||||
bne a1, t8, 1b
|
||||
|
||||
jr ra
|
||||
END(guMtxF2L)
|
||||
|
||||
+22
-24
@@ -1,29 +1,27 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 32
|
||||
.text
|
||||
.align 5
|
||||
|
||||
LEAF(guMtxIdent)
|
||||
addi $t0, $zero, 1
|
||||
sll $t1, $t0, 0x10
|
||||
sw $t1, ($a0)
|
||||
sw $zero, 4($a0)
|
||||
sw $t0, 8($a0)
|
||||
sw $zero, 0xc($a0)
|
||||
sw $zero, 0x10($a0)
|
||||
sw $t1, 0x14($a0)
|
||||
sw $zero, 0x18($a0)
|
||||
sw $t0, 0x1C($a0)
|
||||
sw $zero, 0x20($a0)
|
||||
sw $zero, 0x24($a0)
|
||||
sw $zero, 0x28($a0)
|
||||
sw $zero, 0x2c($a0)
|
||||
sw $zero, 0x30($a0)
|
||||
sw $zero, 0x34($a0)
|
||||
sw $zero, 0x38($a0)
|
||||
jr $ra
|
||||
sw $zero, 0x3C($a0)
|
||||
add t0, zero, 1
|
||||
sll t1, t0, 0x10
|
||||
sw t1, 0x00(a0)
|
||||
sw zero, 0x04(a0)
|
||||
sw t0, 0x08(a0)
|
||||
sw zero, 0x0C(a0)
|
||||
sw zero, 0x10(a0)
|
||||
sw t1, 0x14(a0)
|
||||
sw zero, 0x18(a0)
|
||||
sw t0, 0x1C(a0)
|
||||
sw zero, 0x20(a0)
|
||||
sw zero, 0x24(a0)
|
||||
sw zero, 0x28(a0)
|
||||
sw zero, 0x2c(a0)
|
||||
sw zero, 0x30(a0)
|
||||
sw zero, 0x34(a0)
|
||||
sw zero, 0x38(a0)
|
||||
sw zero, 0x3C(a0)
|
||||
jr ra
|
||||
END(guMtxIdent)
|
||||
|
||||
@@ -1,28 +1,26 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 32
|
||||
.text
|
||||
.align 5
|
||||
|
||||
LEAF(guMtxIdentF)
|
||||
li $t0, 0x3F800000 // 1.0f
|
||||
sw $t0, ($a0)
|
||||
sw $zero, 4($a0)
|
||||
sw $zero, 8($a0)
|
||||
sw $zero, 0xC($a0)
|
||||
sw $zero, 0x10($a0)
|
||||
sw $t0, 0x14($a0)
|
||||
sw $zero, 0x18($a0)
|
||||
sw $zero, 0x1C($a0)
|
||||
sw $zero, 0x20($a0)
|
||||
sw $zero, 0x24($a0)
|
||||
sw $t0, 0x28($a0)
|
||||
sw $zero, 0x2C($a0)
|
||||
sw $zero, 0x30($a0)
|
||||
sw $zero, 0x34($a0)
|
||||
sw $zero, 0x38($a0)
|
||||
jr $ra
|
||||
sw $t0, 0x3C($a0)
|
||||
li.s t0, 1.0
|
||||
sw t0, 0x00(a0)
|
||||
sw zero, 0x04(a0)
|
||||
sw zero, 0x08(a0)
|
||||
sw zero, 0x0C(a0)
|
||||
sw zero, 0x10(a0)
|
||||
sw t0, 0x14(a0)
|
||||
sw zero, 0x18(a0)
|
||||
sw zero, 0x1C(a0)
|
||||
sw zero, 0x20(a0)
|
||||
sw zero, 0x24(a0)
|
||||
sw t0, 0x28(a0)
|
||||
sw zero, 0x2C(a0)
|
||||
sw zero, 0x30(a0)
|
||||
sw zero, 0x34(a0)
|
||||
sw zero, 0x38(a0)
|
||||
sw t0, 0x3C(a0)
|
||||
jr ra
|
||||
END(guMtxIdentF)
|
||||
|
||||
+34
-32
@@ -1,41 +1,43 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 32
|
||||
.text
|
||||
.align 5
|
||||
|
||||
#define MTX_INTPART 0
|
||||
#define MTX_FRACPART 0x20
|
||||
|
||||
#define FIXTOF 0.0000152587890625 /* 1.0f / 65536.0f */
|
||||
|
||||
LEAF(guMtxL2F)
|
||||
li $at, 0x37800000 // 1.0f / 65536.0f
|
||||
mtc1 $at, $f0
|
||||
li $t9, 0xFFFF0000
|
||||
addiu $t8, $a1, MTX_FRACPART
|
||||
li.s fv0, FIXTOF
|
||||
li t9, 0xFFFF0000
|
||||
addiu t8, a1, MTX_FRACPART
|
||||
1:
|
||||
lw $t0, MTX_INTPART($a1)
|
||||
lw $t1, MTX_FRACPART($a1)
|
||||
addiu $a1, $a1, 4
|
||||
and $t2, $t0, $t9
|
||||
srl $t3, $t1, 0x10
|
||||
or $t4, $t2, $t3
|
||||
mtc1 $t4, $f4
|
||||
sll $t5, $t0, 0x10
|
||||
andi $t6, $t1, 0xFFFF
|
||||
or $t7, $t5, $t6
|
||||
cvt.s.w $f6, $f4
|
||||
mtc1 $t7, $f10
|
||||
addiu $a0, $a0, 8
|
||||
cvt.s.w $f16, $f10
|
||||
mul.s $f8, $f6, $f0
|
||||
nop
|
||||
mul.s $f18, $f16, $f0
|
||||
swc1 $f8, -8($a0)
|
||||
bne $a1, $t8, 1b
|
||||
swc1 $f18, -4($a0)
|
||||
jr $ra
|
||||
nop
|
||||
lw t0, MTX_INTPART(a1)
|
||||
lw t1, MTX_FRACPART(a1)
|
||||
|
||||
and t2, t0, t9
|
||||
srl t3, t1, 0x10
|
||||
or t4, t2, t3
|
||||
|
||||
sll t5, t0, 0x10
|
||||
and t6, t1, 0xFFFF
|
||||
or t7, t5, t6
|
||||
|
||||
mtc1 t4, ft0
|
||||
cvt.s.w ft1, ft0
|
||||
mul.s ft2, ft1, fv0
|
||||
|
||||
mtc1 t7, ft3
|
||||
cvt.s.w ft4, ft3
|
||||
mul.s ft5, ft4, fv0
|
||||
|
||||
swc1 ft2, 0(a0)
|
||||
swc1 ft5, 4(a0)
|
||||
addu a0, a0, 8
|
||||
addu a1, a1, 4
|
||||
bne a1, t8, 1b
|
||||
|
||||
jr ra
|
||||
END(guMtxL2F)
|
||||
|
||||
@@ -1,31 +1,27 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 32
|
||||
.text
|
||||
.align 5
|
||||
|
||||
LEAF(guNormalize)
|
||||
lwc1 $f4, ($a0)
|
||||
lwc1 $f6, ($a1)
|
||||
lwc1 $f8, ($a2)
|
||||
mul.s $f10, $f4, $f4
|
||||
li $t0, 0x3F800000 // 1.0f
|
||||
mul.s $f16, $f6, $f6
|
||||
add.s $f18, $f10, $f16
|
||||
mul.s $f16, $f8, $f8
|
||||
add.s $f10, $f16, $f18
|
||||
mtc1 $t0, $f18
|
||||
sqrt.s $f16, $f10
|
||||
div.s $f10, $f18, $f16
|
||||
mul.s $f16, $f4, $f10
|
||||
nop
|
||||
mul.s $f18, $f6, $f10
|
||||
nop
|
||||
mul.s $f4, $f8, $f10
|
||||
swc1 $f16, ($a0)
|
||||
swc1 $f18, ($a1)
|
||||
jr $ra
|
||||
swc1 $f4, ($a2)
|
||||
lwc1 ft0, (a0)
|
||||
lwc1 ft1, (a1)
|
||||
lwc1 ft2, (a2)
|
||||
li.s t0, 1.0
|
||||
mul.s ft3, ft0, ft0
|
||||
mul.s ft4, ft1, ft1
|
||||
add.s ft5, ft3, ft4
|
||||
mul.s ft4, ft2, ft2
|
||||
add.s ft3, ft4, ft5
|
||||
mtc1 t0, ft5
|
||||
sqrt.s ft4, ft3
|
||||
div.s ft3, ft5, ft4
|
||||
mul.s ft4, ft0, ft3
|
||||
mul.s ft5, ft1, ft3
|
||||
mul.s ft0, ft2, ft3
|
||||
swc1 ft4, (a0)
|
||||
swc1 ft5, (a1)
|
||||
swc1 ft0, (a2)
|
||||
jr ra
|
||||
END(guNormalize)
|
||||
|
||||
+51
-47
@@ -1,52 +1,56 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 32
|
||||
.text
|
||||
.align 5
|
||||
|
||||
LEAF(guScale)
|
||||
li $at, 0x47800000 // 65536.0f
|
||||
mtc1 $at, $f4
|
||||
mtc1 $a1, $f6
|
||||
sw $zero, 4($a0)
|
||||
sw $zero, 0xC($a0)
|
||||
mul.s $f8, $f6, $f4
|
||||
mtc1 $a2, $f6
|
||||
sw $zero, 0x10($a0)
|
||||
sw $zero, 0x18($a0)
|
||||
sw $zero, 0x24($a0)
|
||||
sw $zero, 0x2C($a0)
|
||||
sw $zero, 0x30($a0)
|
||||
trunc.w.s $f10, $f8
|
||||
mul.s $f8, $f6, $f4
|
||||
mtc1 $a3, $f6
|
||||
sw $zero, 0x38($a0)
|
||||
mfc1 $t1, $f10
|
||||
sw $zero, 0x3C($a0)
|
||||
srl $t2, $t1, 0x10
|
||||
trunc.w.s $f10, $f8
|
||||
mul.s $f8, $f6, $f4
|
||||
sll $t0, $t2, 0x10
|
||||
sll $t2, $t1, 0x10
|
||||
mfc1 $t1, $f10
|
||||
sw $t0, ($a0)
|
||||
sw $t2, 0x20($a0)
|
||||
srl $t0, $t1, 0x10
|
||||
trunc.w.s $f10, $f8
|
||||
andi $t2, $t1, 0xFFFF
|
||||
sw $t2, 0x28($a0)
|
||||
sw $t0, 8($a0)
|
||||
mfc1 $t1, $f10
|
||||
nop
|
||||
srl $t2, $t1, 0x10
|
||||
sll $t0, $t2, 0x10
|
||||
sw $t0, 0x14($a0)
|
||||
li $t0, 1
|
||||
sll $t2, $t1, 0x10
|
||||
sw $t2, 0x34($a0)
|
||||
jr $ra
|
||||
sw $t0, 0x1C($a0)
|
||||
li.s ft0, 65536.0
|
||||
|
||||
mtc1 a1, ft1
|
||||
mul.s ft2, ft1, ft0
|
||||
trunc.w.s ft3, ft2
|
||||
mfc1 t1, ft3
|
||||
|
||||
srl t2, t1, 0x10
|
||||
sll t0, t2, 0x10
|
||||
sw t0, 0x00(a0)
|
||||
sll t2, t1, 0x10
|
||||
sw t2, 0x20(a0)
|
||||
|
||||
mtc1 a2, ft1
|
||||
mul.s ft2, ft1, ft0
|
||||
trunc.w.s ft3, ft2
|
||||
mfc1 t1, ft3
|
||||
|
||||
srl t0, t1, 0x10
|
||||
sw t0, 0x08(a0)
|
||||
andi t2, t1, 0xFFFF
|
||||
sw t2, 0x28(a0)
|
||||
|
||||
mtc1 a3, ft1
|
||||
mul.s ft2, ft1, ft0
|
||||
trunc.w.s ft3, ft2
|
||||
mfc1 t1, ft3
|
||||
|
||||
srl t2, t1, 0x10
|
||||
sll t0, t2, 0x10
|
||||
sw t0, 0x14(a0)
|
||||
sll t2, t1, 0x10
|
||||
sw t2, 0x34(a0)
|
||||
|
||||
li t0, 1
|
||||
sw t0, 0x1C(a0)
|
||||
|
||||
sw zero, 0x04(a0)
|
||||
sw zero, 0x0C(a0)
|
||||
sw zero, 0x10(a0)
|
||||
sw zero, 0x18(a0)
|
||||
sw zero, 0x24(a0)
|
||||
sw zero, 0x2C(a0)
|
||||
sw zero, 0x30(a0)
|
||||
sw zero, 0x38(a0)
|
||||
sw zero, 0x3C(a0)
|
||||
|
||||
jr ra
|
||||
END(guScale)
|
||||
|
||||
@@ -1,61 +1,68 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 32
|
||||
.text
|
||||
.align 5
|
||||
|
||||
LEAF(guTranslate)
|
||||
li $at, 0x47800000 // 65536.0f
|
||||
mtc1 $at, $f4
|
||||
mtc1 $a1, $f6
|
||||
sw $zero, ($a0)
|
||||
sw $zero, 0x14($a0)
|
||||
mul.s $f8, $f6, $f4
|
||||
mtc1 $a2, $f6
|
||||
sw $zero, 8($a0)
|
||||
sw $zero, 4($a0)
|
||||
sw $zero, 0xC($a0)
|
||||
sw $zero, 0x10($a0)
|
||||
sw $zero, 0x20($a0)
|
||||
trunc.w.s $f10, $f8
|
||||
mul.s $f8, $f6, $f4
|
||||
mtc1 $a3, $f6
|
||||
sw $zero, 0x24($a0)
|
||||
mfc1 $t1, $f10
|
||||
sw $zero, 0x28($a0)
|
||||
sw $zero, 0x2C($a0)
|
||||
srl $t2, $t1, 0x10
|
||||
trunc.w.s $f10, $f8
|
||||
mul.s $f8, $f6, $f4
|
||||
sll $t0, $t2, 0x10
|
||||
sw $zero, 0x30($a0)
|
||||
mfc1 $t3, $f10
|
||||
sw $zero, 0x34($a0)
|
||||
srl $t2, $t3, 0x10
|
||||
trunc.w.s $f10, $f8
|
||||
or $t0, $t0, $t2
|
||||
sw $t0, 0x18($a0)
|
||||
sll $t0, $t1, 0x10
|
||||
sll $t2, $t3, 0x10
|
||||
mfc1 $t1, $f10
|
||||
srl $t2, $t2, 0x10
|
||||
or $t0, $t0, $t2
|
||||
sw $t0, 0x38($a0)
|
||||
srl $t2, $t1, 0x10
|
||||
sll $t0, $t2, 0x10
|
||||
addiu $t0, $t0, 1
|
||||
sw $t0, 0x1C($a0)
|
||||
lui $t0, 1
|
||||
ori $t0, $t0, 0
|
||||
sw $t0, ($a0)
|
||||
sw $t0, 0x14($a0)
|
||||
lui $t0, (0x00000001 >> 16)
|
||||
ori $t0, (0x00000001 & 0xFFFF)
|
||||
sll $t2, $t1, 0x10
|
||||
sw $t2, 0x3C($a0)
|
||||
jr $ra
|
||||
sw $t0, 8($a0)
|
||||
li.s ft0, 65536.0
|
||||
|
||||
mtc1 a1, ft1
|
||||
mul.s ft2, ft1, ft0
|
||||
trunc.w.s ft3, ft2
|
||||
mfc1 t1, ft3
|
||||
|
||||
mtc1 a2, ft1
|
||||
mul.s ft2, ft1, ft0
|
||||
trunc.w.s ft3, ft2
|
||||
mfc1 t3, ft3
|
||||
|
||||
srl t2, t1, 0x10
|
||||
sll t0, t2, 0x10
|
||||
srl t2, t3, 0x10
|
||||
or t0, t0, t2
|
||||
sw t0, 0x18(a0)
|
||||
|
||||
sll t2, t3, 0x10
|
||||
sll t0, t1, 0x10
|
||||
srl t2, t2, 0x10
|
||||
or t0, t0, t2
|
||||
sw t0, 0x38(a0)
|
||||
|
||||
mtc1 a3, ft1
|
||||
mul.s ft2, ft1, ft0
|
||||
trunc.w.s ft3, ft2
|
||||
mfc1 t1, ft3
|
||||
|
||||
srl t2, t1, 0x10
|
||||
sll t0, t2, 0x10
|
||||
addiu t0, t0, 1
|
||||
sw t0, 0x1C(a0)
|
||||
|
||||
sll t2, t1, 0x10
|
||||
sw t2, 0x3C(a0)
|
||||
|
||||
sw zero, 0x00(a0)
|
||||
sw zero, 0x04(a0)
|
||||
sw zero, 0x08(a0)
|
||||
sw zero, 0x0C(a0)
|
||||
sw zero, 0x10(a0)
|
||||
sw zero, 0x14(a0)
|
||||
sw zero, 0x20(a0)
|
||||
sw zero, 0x24(a0)
|
||||
sw zero, 0x28(a0)
|
||||
sw zero, 0x2C(a0)
|
||||
sw zero, 0x30(a0)
|
||||
sw zero, 0x34(a0)
|
||||
|
||||
lui t0, (0x00010000 >> 16)
|
||||
ori t0, (0x00010000 & 0xFFFF)
|
||||
sw t0, (a0)
|
||||
sw t0, 0x14(a0)
|
||||
|
||||
lui t0, (0x00000001 >> 16)
|
||||
ori t0, (0x00000001 & 0xFFFF)
|
||||
sw t0, 8(a0)
|
||||
|
||||
jr ra
|
||||
END(guTranslate)
|
||||
|
||||
+593
-699
File diff suppressed because it is too large
Load Diff
@@ -1,14 +1,10 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(__osGetCause)
|
||||
mfc0 $v0, C0_CAUSE
|
||||
jr $ra
|
||||
nop
|
||||
MFC0( v0, C0_CAUSE)
|
||||
jr ra
|
||||
END(__osGetCause)
|
||||
|
||||
@@ -1,14 +1,10 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(osGetCount)
|
||||
mfc0 $v0, C0_COUNT
|
||||
jr $ra
|
||||
nop
|
||||
MFC0( v0, C0_COUNT)
|
||||
jr ra
|
||||
END(osGetCount)
|
||||
|
||||
@@ -1,14 +1,10 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(__osGetFpcCsr)
|
||||
cfc1 $v0, C1_FPCSR
|
||||
jr $ra
|
||||
nop
|
||||
CFC1( v0, C1_FPCSR)
|
||||
jr ra
|
||||
END(__osGetFpcCsr)
|
||||
|
||||
@@ -1,14 +1,10 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
#include "ultra64/rcp.h"
|
||||
#include "ultra64/exception.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
/**
|
||||
* OSIntMask osGetIntMask(void);
|
||||
@@ -23,38 +19,35 @@
|
||||
* See the comment for osSetIntMask for more details.
|
||||
*/
|
||||
LEAF(osGetIntMask)
|
||||
// Extract interrupt enable bits from current SR
|
||||
mfc0 $v0, C0_SR
|
||||
andi $v0, $v0, (SR_IMASK | SR_IE)
|
||||
// Get value of __OSGlobalIntMask
|
||||
lui $t0, %hi(__OSGlobalIntMask)
|
||||
addiu $t0, %lo(__OSGlobalIntMask)
|
||||
lw $t1, 0($t0)
|
||||
// Bitwise-OR in the disabled CPU bits of __OSGlobalIntMask
|
||||
li $at, ~0
|
||||
xor $t0, $t1, $at
|
||||
andi $t0, $t0, SR_IMASK
|
||||
or $v0, $v0, $t0
|
||||
// Fetch MI_INTR_MASK_REG
|
||||
lui $t1, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
|
||||
lw $t1, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))($t1)
|
||||
// If there are RCP interrupts masked
|
||||
beqz $t1, 1f
|
||||
// Get value of __OSGlobalIntMask
|
||||
lui $t0, %hi(__OSGlobalIntMask)
|
||||
addiu $t0, %lo(__OSGlobalIntMask)
|
||||
lw $t0, 0($t0)
|
||||
// Bitwise-OR in the disabled RCP bits of __OSGlobalIntMask
|
||||
srl $t0, $t0, RCP_IMASKSHIFT
|
||||
li $at, ~0
|
||||
xor $t0, $t0, $at
|
||||
andi $t0, $t0, (RCP_IMASK >> RCP_IMASKSHIFT)
|
||||
or $t1, $t1, $t0
|
||||
.set noreorder
|
||||
/* Extract interrupt enable bits from current SR */
|
||||
mfc0 v0, C0_SR
|
||||
andi v0, v0, (SR_IMASK | SR_IE)
|
||||
/* Get value of __OSGlobalIntMask */
|
||||
la t0, __OSGlobalIntMask
|
||||
lw t1, (t0)
|
||||
/* Bitwise-OR in the disabled CPU bits of __OSGlobalIntMask */
|
||||
xor t0, t1, ~0
|
||||
andi t0, t0, SR_IMASK
|
||||
or v0, v0, t0
|
||||
/* Fetch MI_INTR_MASK_REG */
|
||||
lw t1, PHYS_TO_K1(MI_INTR_MASK_REG)
|
||||
/* If there are RCP interrupts masked */
|
||||
beqz t1, 1f
|
||||
/* Get value of __OSGlobalIntMask */
|
||||
la t0, __OSGlobalIntMask /* Note: macro expansion in delay slot */
|
||||
lw t0, (t0)
|
||||
/* Bitwise-OR in the disabled RCP bits of __OSGlobalIntMask */
|
||||
srl t0, t0, RCP_IMASKSHIFT
|
||||
xor t0, t0, ~0
|
||||
andi t0, t0, (RCP_IMASK >> RCP_IMASKSHIFT)
|
||||
or t1, t1, t0
|
||||
1:
|
||||
// Shift the RCP bits to not conflict with the CPU bits
|
||||
sll $t2, $t1, RCP_IMASKSHIFT
|
||||
// OR the CPU and RCP bits together
|
||||
or $v0, $v0, $t2
|
||||
jr $ra
|
||||
/* Shift the RCP bits to not conflict with the CPU bits */
|
||||
sll t2, t1, RCP_IMASKSHIFT
|
||||
/* OR the CPU and RCP bits together */
|
||||
or v0, v0, t2
|
||||
jr ra
|
||||
nop
|
||||
.set reorder
|
||||
END(osGetIntMask)
|
||||
|
||||
@@ -1,14 +1,10 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(__osGetSR)
|
||||
mfc0 $v0, C0_SR
|
||||
jr $ra
|
||||
nop
|
||||
MFC0( v0, C0_SR)
|
||||
jr ra
|
||||
END(__osGetSR)
|
||||
|
||||
+34
-42
@@ -1,53 +1,45 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
#include "ultra64/thread.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(__osDisableInt)
|
||||
lui $t2, %hi(__OSGlobalIntMask)
|
||||
addiu $t2, $t2, %lo(__OSGlobalIntMask)
|
||||
lw $t3, ($t2)
|
||||
andi $t3, $t3, SR_IMASK
|
||||
mfc0 $t0, C0_SR
|
||||
li $at, ~SR_IE
|
||||
and $t1, $t0, $at
|
||||
mtc0 $t1, C0_SR
|
||||
andi $v0, $t0, SR_IE
|
||||
lw $t0, ($t2)
|
||||
andi $t0, $t0, SR_IMASK
|
||||
beq $t0, $t3, No_Change_Global_Int
|
||||
lui $t2, %hi(__osRunningThread)
|
||||
//! @bug this addiu should be lw, it may never come up in practice as to reach this code
|
||||
//! the CPU bits of __OSGlobalIntMask must have changed while this function is running.
|
||||
addiu $t2, $t2, %lo(__osRunningThread)
|
||||
lw $t1, THREAD_SR($t2)
|
||||
andi $t2, $t1, SR_IMASK
|
||||
and $t2, $t2, $t0
|
||||
li $at, ~SR_IMASK
|
||||
and $t1, $t1, $at
|
||||
or $t1, $t1, $t2
|
||||
li $at, ~SR_IE
|
||||
and $t1, $t1, $at
|
||||
mtc0 $t1, C0_SR
|
||||
nop
|
||||
nop
|
||||
la t2, __OSGlobalIntMask
|
||||
lw t3, (t2)
|
||||
and t3, t3, SR_IMASK
|
||||
MFC0( t0, C0_SR)
|
||||
and t1, t0, ~SR_IE
|
||||
MTC0( t1, C0_SR)
|
||||
and v0, t0, SR_IE
|
||||
lw t0, (t2)
|
||||
and t0, t0, SR_IMASK
|
||||
.set noreorder
|
||||
beq t0, t3, No_Change_Global_Int
|
||||
/*! @bug this la should be lw, it may never come up in practice as to reach this code
|
||||
*! the CPU bits of __OSGlobalIntMask must have changed while this function is running.
|
||||
*/
|
||||
la t2, __osRunningThread
|
||||
lw t1, THREAD_SR(t2)
|
||||
and t2, t1, SR_IMASK
|
||||
and t2, t2, t0
|
||||
.set reorder
|
||||
and t1, t1, ~SR_IMASK
|
||||
or t1, t1, t2
|
||||
and t1, t1, ~SR_IE
|
||||
MTC0( t1, C0_SR)
|
||||
NOP
|
||||
NOP
|
||||
No_Change_Global_Int:
|
||||
jr $ra
|
||||
nop
|
||||
jr ra
|
||||
END(__osDisableInt)
|
||||
|
||||
LEAF(__osRestoreInt)
|
||||
mfc0 $t0, C0_SR
|
||||
or $t0, $t0, $a0
|
||||
mtc0 $t0, C0_SR
|
||||
nop
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
MFC0( t0, C0_SR)
|
||||
or t0, t0, a0
|
||||
MTC0( t0, C0_SR)
|
||||
NOP
|
||||
NOP
|
||||
jr ra
|
||||
END(__osRestoreInt)
|
||||
|
||||
@@ -1,12 +1,8 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
/**
|
||||
* void osInvalDCache(void* vaddr, s32 nbytes);
|
||||
@@ -24,71 +20,67 @@
|
||||
* the entire data cache is invalidated.
|
||||
*/
|
||||
LEAF(osInvalDCache)
|
||||
// If the amount to invalidate is less than or equal to 0, return immediately
|
||||
blez $a1, 3f
|
||||
.set noreorder
|
||||
/* If the amount to invalidate is less than or equal to 0, return immediately */
|
||||
blez a1, 3f
|
||||
nop
|
||||
// If the amount to invalidate is as large as or larger than
|
||||
// the data cache size, invalidate all
|
||||
li $t3, DCACHE_SIZE
|
||||
sltu $at, $a1, $t3
|
||||
beqz $at, 4f
|
||||
/* If the amount to invalidate is as large as or larger than
|
||||
* the data cache size, invalidate all */
|
||||
li t3, DCACHE_SIZE
|
||||
bgeu a1, t3, 4f
|
||||
nop
|
||||
// Ensure end address doesn't wrap around and end up smaller
|
||||
// than the start address
|
||||
move $t0, $a0
|
||||
addu $t1, $a0, $a1
|
||||
sltu $at, $t0, $t1
|
||||
beqz $at, 3f
|
||||
/* Ensure end address doesn't wrap around and end up smaller
|
||||
* than the start address */
|
||||
move t0, a0
|
||||
addu t1, a0, a1
|
||||
bgeu t0, t1, 3f
|
||||
nop
|
||||
// Mask start with cache line
|
||||
andi $t2, $t0, DCACHE_LINEMASK
|
||||
// If mask is not zero, the start is not cache aligned
|
||||
beqz $t2, 1f
|
||||
addiu $t1, $t1, -DCACHE_LINESIZE
|
||||
// Subtract mask result to align to cache line
|
||||
subu $t0, $t0, $t2
|
||||
// Hit-Writeback-Invalidate unaligned part
|
||||
cache (CACH_PD | C_HWBINV), ($t0)
|
||||
sltu $at, $t0, $t1
|
||||
// If that's all there is to do, return early
|
||||
beqz $at, 3f
|
||||
/* Mask start with cache line */
|
||||
andi t2, t0, DCACHE_LINEMASK
|
||||
/* If mask is not zero, the start is not cache aligned */
|
||||
beqz t2, 1f
|
||||
addiu t1, t1, -DCACHE_LINESIZE
|
||||
/* Subtract mask result to align to cache line */
|
||||
subu t0, t0, t2
|
||||
/* Hit-Writeback-Invalidate unaligned part */
|
||||
cache (CACH_PD | C_HWBINV), (t0)
|
||||
/* If that's all there is to do, return early */
|
||||
bgeu t0, t1, 3f
|
||||
nop
|
||||
addiu $t0, $t0, DCACHE_LINESIZE
|
||||
addiu t0, t0, DCACHE_LINESIZE
|
||||
1:
|
||||
// Mask end with cache line
|
||||
andi $t2, $t1, DCACHE_LINEMASK
|
||||
// If mask is not zero, the end is not cache aligned
|
||||
beqz $t2, 1f
|
||||
/* Mask end with cache line */
|
||||
andi t2, t1, DCACHE_LINEMASK
|
||||
/* If mask is not zero, the end is not cache aligned */
|
||||
beqz t2, 1f
|
||||
nop
|
||||
// Subtract mask result to align to cache line
|
||||
subu $t1, $t1, $t2
|
||||
// Hit-Writeback-Invalidate unaligned part
|
||||
cache (CACH_PD | C_HWBINV), DCACHE_LINESIZE($t1)
|
||||
sltu $at, $t1, $t0
|
||||
// If that's all there is to do, return early
|
||||
bnez $at, 3f
|
||||
/* Subtract mask result to align to cache line */
|
||||
subu t1, t1, t2
|
||||
/* Hit-Writeback-Invalidate unaligned part */
|
||||
cache (CACH_PD | C_HWBINV), DCACHE_LINESIZE(t1)
|
||||
/* If that's all there is to do, return early */
|
||||
bltu t1, t0, 3f
|
||||
nop
|
||||
// Invalidate the rest
|
||||
/* Invalidate the rest */
|
||||
1:
|
||||
// Hit-Invalidate
|
||||
cache (CACH_PD | C_HINV), ($t0)
|
||||
sltu $at, $t0, $t1
|
||||
bnez $at, 1b
|
||||
addiu $t0, $t0, DCACHE_LINESIZE
|
||||
/* Hit-Invalidate */
|
||||
cache (CACH_PD | C_HINV), (t0)
|
||||
bltu t0, t1, 1b
|
||||
addiu t0, t0, DCACHE_LINESIZE
|
||||
3:
|
||||
jr $ra
|
||||
jr ra
|
||||
nop
|
||||
|
||||
4:
|
||||
li $t0, K0BASE
|
||||
addu $t1, $t0, $t3
|
||||
addiu $t1, $t1, -DCACHE_LINESIZE
|
||||
li t0, K0BASE
|
||||
addu t1, t0, t3
|
||||
addiu t1, t1, -DCACHE_LINESIZE
|
||||
5:
|
||||
// Index-Writeback-Invalidate
|
||||
cache (CACH_PD | C_IWBINV), ($t0)
|
||||
sltu $at, $t0, $t1
|
||||
bnez $at, 5b
|
||||
addiu $t0, DCACHE_LINESIZE
|
||||
jr $ra
|
||||
/* Index-Writeback-Invalidate */
|
||||
cache (CACH_PD | C_IWBINV), (t0)
|
||||
bltu t0, t1, 5b
|
||||
addiu t0, DCACHE_LINESIZE
|
||||
jr ra
|
||||
nop
|
||||
.set reorder
|
||||
END(osInvalDCache)
|
||||
|
||||
@@ -1,52 +1,46 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(osInvalICache)
|
||||
// If the amount to invalidate is less than or equal to 0, return immediately
|
||||
blez $a1, 2f
|
||||
.set noreorder
|
||||
/* If the amount to invalidate is less than or equal to 0, return immediately */
|
||||
blez a1, 2f
|
||||
nop
|
||||
// If the amount to invalidate is as large as or larger than
|
||||
// the instruction cache size, invalidate all
|
||||
li $t3, ICACHE_SIZE
|
||||
sltu $at, $a1, $t3
|
||||
beqz $at, 3f
|
||||
/* If the amount to invalidate is as large as or larger than */
|
||||
/* the instruction cache size, invalidate all */
|
||||
li t3, ICACHE_SIZE
|
||||
bgeu a1, t3, 3f
|
||||
nop
|
||||
// ensure end address doesn't wrap around and end up smaller
|
||||
// than the start address
|
||||
move $t0, $a0
|
||||
addu $t1, $a0, $a1
|
||||
sltu $at, $t0, $t1
|
||||
beqz $at, 2f
|
||||
/* ensure end address doesn't wrap around and end up smaller */
|
||||
/* than the start address */
|
||||
move t0, a0
|
||||
addu t1, a0, a1
|
||||
bgeu t0, t1, 2f
|
||||
nop
|
||||
// Mask and subtract to align to cache line
|
||||
andi $t2, $t0, ICACHE_LINEMASK
|
||||
addiu $t1, $t1, -ICACHE_LINESIZE
|
||||
subu $t0, $t0, $t2
|
||||
/* Mask and subtract to align to cache line */
|
||||
andi t2, t0, ICACHE_LINEMASK
|
||||
addiu t1, t1, -ICACHE_LINESIZE
|
||||
subu t0, t0, t2
|
||||
1:
|
||||
cache (CACH_PI | C_HINV), ($t0)
|
||||
sltu $at, $t0, $t1
|
||||
bnez $at, 1b
|
||||
addiu $t0, $t0, ICACHE_LINESIZE
|
||||
cache (CACH_PI | C_HINV), (t0)
|
||||
bltu t0, t1, 1b
|
||||
addiu t0, t0, ICACHE_LINESIZE
|
||||
2:
|
||||
jr $ra
|
||||
jr ra
|
||||
nop
|
||||
|
||||
3:
|
||||
li $t0, K0BASE
|
||||
addu $t1, $t0, $t3
|
||||
addiu $t1, $t1, -ICACHE_LINESIZE
|
||||
li t0, K0BASE
|
||||
addu t1, t0, t3
|
||||
addiu t1, t1, -ICACHE_LINESIZE
|
||||
4:
|
||||
cache (CACH_PI | C_IINV), ($t0)
|
||||
sltu $at, $t0, $t1
|
||||
bnez $at, 4b
|
||||
addiu $t0, ICACHE_LINESIZE
|
||||
jr $ra
|
||||
cache (CACH_PI | C_IINV), (t0)
|
||||
bltu t0, t1, 4b
|
||||
addiu t0, ICACHE_LINESIZE
|
||||
jr ra
|
||||
nop
|
||||
.set reorder
|
||||
END(osInvalICache)
|
||||
|
||||
+24
-29
@@ -1,36 +1,31 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
#include "ultra64/rdb.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(osMapTLBRdb)
|
||||
mfc0 $t0, C0_ENTRYHI
|
||||
li $t1, NTLBENTRIES
|
||||
mtc0 $t1, C0_INX
|
||||
mtc0 $zero, C0_PAGEMASK
|
||||
li $t2, (TLBLO_UNCACHED | TLBLO_D | TLBLO_V | TLBLO_G)
|
||||
li $t1, (RDB_BASE_REG & TLBHI_VPN2MASK)
|
||||
mtc0 $t1, C0_ENTRYHI
|
||||
// Possible bug? Virtual address instead of physical address
|
||||
// set as page frame number
|
||||
li $t1, RDB_BASE_VIRTUAL_ADDR
|
||||
srl $t3, $t1, TLBLO_PFNSHIFT
|
||||
or $t3, $t3, $t2
|
||||
mtc0 $t3, C0_ENTRYLO0
|
||||
li $t1, TLBLO_G
|
||||
mtc0 $t1, C0_ENTRYLO1
|
||||
nop
|
||||
tlbwi
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
mtc0 $t0, C0_ENTRYHI
|
||||
jr $ra
|
||||
nop
|
||||
MFC0( t0, C0_ENTRYHI)
|
||||
li t1, NTLBENTRIES
|
||||
MTC0( t1, C0_INX)
|
||||
MTC0( zero, C0_PAGEMASK)
|
||||
li t2, (TLBLO_UNCACHED | TLBLO_D | TLBLO_V | TLBLO_G)
|
||||
li t1, (RDB_BASE_REG & TLBHI_VPN2MASK)
|
||||
MTC0( t1, C0_ENTRYHI)
|
||||
/* Possible bug? Virtual address instead of physical address set as page frame number */
|
||||
li t1, RDB_BASE_VIRTUAL_ADDR
|
||||
srl t3, t1, TLBLO_PFNSHIFT
|
||||
or t3, t3, t2
|
||||
MTC0( t3, C0_ENTRYLO0)
|
||||
li t1, TLBLO_G
|
||||
MTC0( t1, C0_ENTRYLO1)
|
||||
NOP
|
||||
TLBWI
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
NOP
|
||||
MTC0( t0, C0_ENTRYHI)
|
||||
jr ra
|
||||
END(osMapTLBRdb)
|
||||
|
||||
@@ -1,22 +1,29 @@
|
||||
#include "ultra64/asm.h"
|
||||
|
||||
.section .text
|
||||
.text
|
||||
|
||||
.macro IPL_SYMBOL name, address, size
|
||||
.global \name
|
||||
.set \name, \address
|
||||
.type \name, @object
|
||||
.size \name, \size
|
||||
.endm
|
||||
#ifdef __sgi
|
||||
#define IPL_SYMBOL(name, address, size) \
|
||||
ABS(name, address)
|
||||
#else
|
||||
#define IPL_SYMBOL(name, address, sz) \
|
||||
ABS(name, address) ;\
|
||||
.type name, @object ;\
|
||||
.size name, sz
|
||||
#endif
|
||||
|
||||
IPL_SYMBOL leoBootID, 0x800001A0, 4
|
||||
IPL_SYMBOL osTvType, 0x80000300, 4
|
||||
IPL_SYMBOL osRomType, 0x80000304, 4
|
||||
IPL_SYMBOL osRomBase, 0x80000308, 4
|
||||
IPL_SYMBOL osResetType, 0x8000030C, 4
|
||||
IPL_SYMBOL osCicId, 0x80000310, 4
|
||||
IPL_SYMBOL osVersion, 0x80000314, 4
|
||||
IPL_SYMBOL osMemSize, 0x80000318, 4
|
||||
IPL_SYMBOL osAppNMIBuffer, 0x8000031C, 0x40
|
||||
|
||||
.fill 0x60
|
||||
IPL_SYMBOL(leoBootID, 0x800001A0, 4)
|
||||
IPL_SYMBOL(osTvType, 0x80000300, 4)
|
||||
IPL_SYMBOL(osRomType, 0x80000304, 4)
|
||||
IPL_SYMBOL(osRomBase, 0x80000308, 4)
|
||||
IPL_SYMBOL(osResetType, 0x8000030C, 4)
|
||||
IPL_SYMBOL(osCicId, 0x80000310, 4)
|
||||
IPL_SYMBOL(osVersion, 0x80000314, 4)
|
||||
IPL_SYMBOL(osMemSize, 0x80000318, 4)
|
||||
IPL_SYMBOL(osAppNMIBuffer, 0x8000031C, 0x40)
|
||||
|
||||
|
||||
.repeat 0x60/4
|
||||
NOP
|
||||
.endr
|
||||
|
||||
+48
-51
@@ -1,12 +1,8 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
/**
|
||||
* u32 __osProbeTLB(void* vaddr);
|
||||
@@ -17,70 +13,71 @@
|
||||
* Returns the physical address if found, or -1 if not found.
|
||||
*/
|
||||
LEAF(__osProbeTLB)
|
||||
// Set C0_ENTRYHI based on supplied vaddr
|
||||
mfc0 $t0, C0_ENTRYHI
|
||||
andi $t1, $t0, TLBHI_PIDMASK
|
||||
li $at, TLBHI_VPN2MASK
|
||||
and $t2, $a0, $at
|
||||
or $t1, $t1, $t2
|
||||
mtc0 $t1, C0_ENTRYHI
|
||||
.set noreorder
|
||||
/* Set C0_ENTRYHI based on supplied vaddr */
|
||||
mfc0 t0, C0_ENTRYHI
|
||||
and t1, t0, TLBHI_PIDMASK
|
||||
and t2, a0, TLBHI_VPN2MASK
|
||||
or t1, t1, t2
|
||||
mtc0 t1, C0_ENTRYHI
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
// TLB probe, sets C0_INX to a value matching C0_ENTRYHI.
|
||||
// If no match is found the TLBINX_PROBE bit is set to indicate this.
|
||||
/* TLB probe, sets C0_INX to a value matching C0_ENTRYHI. */
|
||||
/* If no match is found the TLBINX_PROBE bit is set to indicate this. */
|
||||
tlbp
|
||||
nop
|
||||
nop
|
||||
// Read result
|
||||
mfc0 $t3, C0_INX
|
||||
li $at, TLBINX_PROBE
|
||||
and $t3, $t3, $at
|
||||
// Branch if no match was found
|
||||
bnez $t3, 3f
|
||||
/* Read result */
|
||||
mfc0 t3, C0_INX
|
||||
and t3, t3, TLBINX_PROBE
|
||||
/* Branch if no match was found */
|
||||
bnez t3, 3f
|
||||
nop
|
||||
// Read TLB, sets C0_ENTRYHI, C0_ENTRYLO0, C0_ENTRYLO1 and C0_PAGEMASK for the TLB
|
||||
// entry indicated by C0_INX
|
||||
|
||||
/* Read TLB, sets C0_ENTRYHI, C0_ENTRYLO0, C0_ENTRYLO1 and C0_PAGEMASK for the TLB */
|
||||
/* entry indicated by C0_INX */
|
||||
tlbr
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
// Calculate page size = (page mask + 0x2000) >> 1
|
||||
mfc0 $t3, C0_PAGEMASK
|
||||
addi $t3, $t3, 0x2000
|
||||
srl $t3, $t3, 1
|
||||
// & with vaddr
|
||||
and $t4, $t3, $a0
|
||||
// Select C0_ENTRYLO0 or C0_ENTRYLO1
|
||||
bnez $t4, 1f
|
||||
addi $t3, $t3, -1 // make bitmask out of page size
|
||||
mfc0 $v0, C0_ENTRYLO0
|
||||
/* Calculate page size = (page mask + 0x2000) >> 1 */
|
||||
mfc0 t3, C0_PAGEMASK
|
||||
add t3, t3, 0x2000
|
||||
srl t3, t3, 1
|
||||
/* & with vaddr */
|
||||
and t4, t3, a0
|
||||
/* Select C0_ENTRYLO0 or C0_ENTRYLO1 */
|
||||
bnez t4, 1f
|
||||
add t3, t3, -1 /* make bitmask out of page size */
|
||||
mfc0 v0, C0_ENTRYLO0
|
||||
b 2f
|
||||
nop
|
||||
1:
|
||||
mfc0 $v0, C0_ENTRYLO1
|
||||
mfc0 v0, C0_ENTRYLO1
|
||||
2:
|
||||
// Check valid bit and branch if not valid
|
||||
andi $t5, $v0, TLBLO_V
|
||||
beqz $t5, 3f
|
||||
/* Check valid bit and branch if not valid */
|
||||
and t5, v0, TLBLO_V
|
||||
beqz t5, 3f
|
||||
nop
|
||||
// Extract the Page Frame Number from the entry
|
||||
li $at, TLBLO_PFNMASK
|
||||
and $v0, $v0, $at
|
||||
sll $v0, $v0, TLBLO_PFNSHIFT
|
||||
// Mask vaddr with page size mask
|
||||
and $t5, $a0, $t3
|
||||
// Add masked vaddr to pfn to obtain the physical address
|
||||
add $v0, $v0, $t5
|
||||
|
||||
/* Extract the Page Frame Number from the entry */
|
||||
and v0, v0, TLBLO_PFNMASK
|
||||
sll v0, v0, TLBLO_PFNSHIFT
|
||||
/* Mask vaddr with page size mask */
|
||||
and t5, a0, t3
|
||||
/* Add masked vaddr to pfn to obtain the physical address */
|
||||
add v0, v0, t5
|
||||
b 4f
|
||||
nop
|
||||
3:
|
||||
// No physical address for the supplied virtual address was found,
|
||||
// return -1
|
||||
li $v0, -1
|
||||
/* No physical address for the supplied virtual address was found, */
|
||||
/* return -1 */
|
||||
li v0, -1
|
||||
4:
|
||||
// Restore original C0_ENTRYHI value before returning
|
||||
mtc0 $t0, C0_ENTRYHI
|
||||
jr $ra
|
||||
/* Restore original C0_ENTRYHI value before returning */
|
||||
mtc0 t0, C0_ENTRYHI
|
||||
jr ra
|
||||
nop
|
||||
.set reorder
|
||||
END(__osProbeTLB)
|
||||
|
||||
@@ -1,14 +1,10 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(__osSetCompare)
|
||||
mtc0 $a0, C0_COMPARE
|
||||
jr $ra
|
||||
nop
|
||||
MTC0( a0, C0_COMPARE)
|
||||
jr ra
|
||||
END(__osSetCompare)
|
||||
|
||||
@@ -1,15 +1,11 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(__osSetFpcCsr)
|
||||
cfc1 $v0, C1_FPCSR
|
||||
ctc1 $a0, C1_FPCSR
|
||||
jr $ra
|
||||
nop
|
||||
CFC1( v0, C1_FPCSR)
|
||||
CTC1( a0, C1_FPCSR)
|
||||
jr ra
|
||||
END(__osSetFpcCsr)
|
||||
|
||||
@@ -1,14 +1,11 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
#include "ultra64/rcp.h"
|
||||
#include "ultra64/exception.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .rodata
|
||||
|
||||
.balign 16
|
||||
.rdata
|
||||
.align 2
|
||||
|
||||
/**
|
||||
* LUT to convert between an interrupt mask value and a value for MI_INTR_MASK_REG.
|
||||
@@ -82,9 +79,7 @@ DATA(__osRcpImTable)
|
||||
.half MI_INTR_MASK_SET_SP | MI_INTR_MASK_SET_SI | MI_INTR_MASK_SET_AI | MI_INTR_MASK_SET_VI | MI_INTR_MASK_SET_PI | MI_INTR_MASK_SET_DP
|
||||
ENDDATA(__osRcpImTable)
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
/**
|
||||
* OSIntMask osSetIntMask(OSIntMask);
|
||||
@@ -113,56 +108,47 @@ ENDDATA(__osRcpImTable)
|
||||
* OS_IM_ALL, so the operation is usually simply (SR | 0).
|
||||
*/
|
||||
LEAF(osSetIntMask)
|
||||
// Extract interrupt enable bits from current SR
|
||||
mfc0 $t4, C0_SR
|
||||
andi $v0, $t4, (SR_IMASK | SR_IE)
|
||||
// Get value of __OSGlobalIntMask
|
||||
lui $t0, %hi(__OSGlobalIntMask)
|
||||
addiu $t0, %lo(__OSGlobalIntMask)
|
||||
lw $t3, ($t0)
|
||||
// Bitwise-OR in the disabled CPU bits of __OSGlobalIntMask
|
||||
li $at, ~0
|
||||
xor $t0, $t3, $at
|
||||
andi $t0, $t0, SR_IMASK
|
||||
or $v0, $v0, $t0
|
||||
// Fetch MI_INTR_MASK_REG
|
||||
lui $t2, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
|
||||
lw $t2, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))($t2)
|
||||
// If there are RCP interrupts masked
|
||||
beqz $t2, 1f
|
||||
srl $t1, $t3, RCP_IMASKSHIFT
|
||||
// Bitwise-OR in the disabled RCP bits of __OSGlobalIntMask
|
||||
li $at, ~0
|
||||
xor $t1, $t1, $at
|
||||
andi $t1, $t1, (RCP_IMASK >> RCP_IMASKSHIFT)
|
||||
or $t2, $t2, $t1
|
||||
/* Extract interrupt enable bits from current SR */
|
||||
MFC0( t4, C0_SR)
|
||||
.set noreorder
|
||||
and v0, t4, (SR_IMASK | SR_IE)
|
||||
/* Get value of __OSGlobalIntMask */
|
||||
la t0, __OSGlobalIntMask
|
||||
lw t3, (t0)
|
||||
/* Bitwise-OR in the disabled CPU bits of __OSGlobalIntMask */
|
||||
xor t0, t3, ~0
|
||||
and t0, t0, SR_IMASK
|
||||
or v0, v0, t0
|
||||
/* Fetch MI_INTR_MASK_REG */
|
||||
lw t2, PHYS_TO_K1(MI_INTR_MASK_REG)
|
||||
/* If there are RCP interrupts masked */
|
||||
beqz t2, 1f
|
||||
srl t1, t3, RCP_IMASKSHIFT
|
||||
/* Bitwise-OR in the disabled RCP bits of __OSGlobalIntMask */
|
||||
xor t1, t1, ~0
|
||||
and t1, t1, (RCP_IMASK >> RCP_IMASKSHIFT)
|
||||
or t2, t2, t1
|
||||
1:
|
||||
// Shift the RCP bits to not conflict with the CPU bits
|
||||
sll $t2, $t2, RCP_IMASKSHIFT
|
||||
// OR the CPU and RCP bits together
|
||||
or $v0, $v0, $t2
|
||||
// Extract RCP interrupt enable bits from requested mask and mask with __OSGlobalIntMask
|
||||
li $at, RCP_IMASK
|
||||
and $t0, $a0, $at
|
||||
and $t0, $t0, $t3
|
||||
// Convert to a value for MI_INTR_MASK_REG and set it
|
||||
srl $t0, $t0, (RCP_IMASKSHIFT-1)
|
||||
lui $t2, %hi(__osRcpImTable)
|
||||
addu $t2, $t2, $t0
|
||||
lhu $t2, %lo(__osRcpImTable)($t2)
|
||||
lui $at, %hi(PHYS_TO_K1(MI_INTR_MASK_REG))
|
||||
sw $t2, %lo(PHYS_TO_K1(MI_INTR_MASK_REG))($at)
|
||||
// Extract CPU interrupt enable bits from requested mask and mask with __OSGlobalIntMask
|
||||
andi $t0, $a0, OS_IM_CPU
|
||||
andi $t1, $t3, SR_IMASK
|
||||
and $t0, $t0, $t1
|
||||
li $at, ~SR_IMASK
|
||||
and $t4, $t4, $at
|
||||
// Bitwise OR in the remaining bits of SR and set new SR
|
||||
or $t4, $t4, $t0
|
||||
mtc0 $t4, C0_SR
|
||||
nop
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
/* Shift the RCP bits to not conflict with the CPU bits */
|
||||
sll t2, t2, RCP_IMASKSHIFT
|
||||
/* OR the CPU and RCP bits together */
|
||||
or v0, v0, t2
|
||||
/* Extract RCP interrupt enable bits from requested mask and mask with __OSGlobalIntMask */
|
||||
and t0, a0, RCP_IMASK
|
||||
and t0, t0, t3
|
||||
/* Convert to a value for MI_INTR_MASK_REG and set it */
|
||||
srl t0, t0, (RCP_IMASKSHIFT-1)
|
||||
lhu t2, __osRcpImTable(t0)
|
||||
sw t2, PHYS_TO_K1(MI_INTR_MASK_REG)
|
||||
/* Extract CPU interrupt enable bits from requested mask and mask with __OSGlobalIntMask */
|
||||
and t0, a0, OS_IM_CPU
|
||||
and t1, t3, SR_IMASK
|
||||
and t0, t0, t1
|
||||
and t4, t4, ~SR_IMASK
|
||||
/* Bitwise OR in the remaining bits of SR and set new SR */
|
||||
or t4, t4, t0
|
||||
MTC0( t4, C0_SR)
|
||||
NOP
|
||||
NOP
|
||||
jr ra
|
||||
END(osSetIntMask)
|
||||
|
||||
@@ -1,15 +1,11 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(__osSetSR)
|
||||
mtc0 $a0, C0_SR
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
MTC0( a0, C0_SR)
|
||||
NOP
|
||||
jr ra
|
||||
END(__osSetSR)
|
||||
|
||||
@@ -1,15 +1,11 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(__osSetWatchLo)
|
||||
mtc0 $a0, C0_WATCHLO
|
||||
nop
|
||||
jr $ra
|
||||
nop
|
||||
MTC0( a0, C0_WATCHLO)
|
||||
NOP
|
||||
jr ra
|
||||
END(__osSetWatchLo)
|
||||
|
||||
@@ -1,29 +1,25 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(osUnmapTLBAll)
|
||||
mfc0 $t0, C0_ENTRYHI
|
||||
li $t1, (NTLBENTRIES - 1)
|
||||
li $t2, (K0BASE & TLBHI_VPN2MASK)
|
||||
mtc0 $t2, C0_ENTRYHI
|
||||
mtc0 $zero, C0_ENTRYLO0
|
||||
mtc0 $zero, C0_ENTRYLO1
|
||||
MFC0( t0, C0_ENTRYHI)
|
||||
li t1, (NTLBENTRIES - 1)
|
||||
li t2, (K0BASE & TLBHI_VPN2MASK)
|
||||
MTC0( t2, C0_ENTRYHI)
|
||||
MTC0( zero, C0_ENTRYLO0)
|
||||
MTC0( zero, C0_ENTRYLO1)
|
||||
1:
|
||||
mtc0 $t1, C0_INX
|
||||
nop
|
||||
tlbwi
|
||||
nop
|
||||
nop
|
||||
addi $t1, $t1, -1
|
||||
bgez $t1, 1b
|
||||
nop
|
||||
mtc0 $t0, C0_ENTRYHI
|
||||
jr $ra
|
||||
nop
|
||||
MTC0( t1, C0_INX)
|
||||
NOP
|
||||
TLBWI
|
||||
NOP
|
||||
NOP
|
||||
addi t1, t1, -1
|
||||
bgez t1, 1b
|
||||
|
||||
MTC0( t0, C0_ENTRYHI)
|
||||
jr ra
|
||||
END(osUnmapTLBAll)
|
||||
|
||||
@@ -1,12 +1,8 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
/**
|
||||
* void osWritebackDCache(void* vaddr, s32 nbytes);
|
||||
@@ -16,45 +12,43 @@
|
||||
* written back.
|
||||
*/
|
||||
LEAF(osWritebackDCache)
|
||||
// If the amount to write back is less than or equal to 0, return immediately
|
||||
blez $a1, .ret
|
||||
nop
|
||||
// If the amount to write back is as large as or larger than
|
||||
// the data cache size, write back all
|
||||
li $t3, DCACHE_SIZE
|
||||
sltu $at, $a1, $t3
|
||||
beqz $at, .all
|
||||
nop
|
||||
// ensure end address doesn't wrap around and end up smaller
|
||||
// than the start address
|
||||
move $t0, $a0
|
||||
addu $t1, $a0, $a1
|
||||
sltu $at, $t0, $t1
|
||||
beqz $at, .ret
|
||||
nop
|
||||
// Mask and subtract to align to cache line
|
||||
andi $t2, $t0, DCACHE_LINEMASK
|
||||
addiu $t1, $t1, -DCACHE_LINESIZE
|
||||
subu $t0, $t0, $t2
|
||||
1:
|
||||
cache (CACH_PD | C_HWB), ($t0)
|
||||
sltu $at, $t0, $t1
|
||||
bnez $at, 1b
|
||||
addiu $t0, $t0, DCACHE_LINESIZE
|
||||
.ret:
|
||||
jr $ra
|
||||
nop
|
||||
/* If the amount to write back is less than or equal to 0, return immediately */
|
||||
blez a1, .ret
|
||||
|
||||
// same as osWritebackDCacheAll in operation
|
||||
.all:
|
||||
li $t0, K0BASE
|
||||
addu $t1, $t0, $t3
|
||||
addiu $t1, $t1, -DCACHE_LINESIZE
|
||||
/* If the amount to write back is as large as or larger than */
|
||||
/* the data cache size, write back all */
|
||||
li t3, DCACHE_SIZE
|
||||
bgeu a1, t3, .all
|
||||
|
||||
/* ensure end address doesn't wrap around and end up smaller */
|
||||
/* than the start address */
|
||||
move t0, a0
|
||||
addu t1, a0, a1
|
||||
bgeu t0, t1, .ret
|
||||
|
||||
/* Mask and subtract to align to cache line */
|
||||
andi t2, t0, DCACHE_LINEMASK
|
||||
addiu t1, t1, -DCACHE_LINESIZE
|
||||
subu t0, t0, t2
|
||||
1:
|
||||
cache (CACH_PD | C_IWBINV), ($t0)
|
||||
sltu $at, $t0, $t1
|
||||
bnez $at, 1b
|
||||
addiu $t0, DCACHE_LINESIZE
|
||||
jr $ra
|
||||
nop
|
||||
.set noreorder
|
||||
cache (CACH_PD | C_HWB), (t0)
|
||||
bltu t0, t1, 1b
|
||||
addiu t0, t0, DCACHE_LINESIZE
|
||||
.set reorder
|
||||
.ret:
|
||||
jr ra
|
||||
|
||||
/* same as osWritebackDCacheAll in operation */
|
||||
.all:
|
||||
li t0, K0BASE
|
||||
addu t1, t0, t3
|
||||
addiu t1, t1, -DCACHE_LINESIZE
|
||||
1:
|
||||
.set noreorder
|
||||
cache (CACH_PD | C_IWBINV), (t0)
|
||||
bltu t0, t1, 1b
|
||||
addiu t0, DCACHE_LINESIZE
|
||||
.set reorder
|
||||
jr ra
|
||||
END(osWritebackDCache)
|
||||
|
||||
@@ -1,23 +1,19 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "ultra64/R4300.h"
|
||||
|
||||
.set noat
|
||||
.set noreorder
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
.text
|
||||
|
||||
LEAF(osWritebackDCacheAll)
|
||||
li $t0, K0BASE
|
||||
li $t2, DCACHE_SIZE
|
||||
addu $t1, $t0, $t2
|
||||
addiu $t1, $t1, -DCACHE_LINESIZE
|
||||
li t0, K0BASE
|
||||
li t2, DCACHE_SIZE
|
||||
addu t1, t0, t2
|
||||
addiu t1, t1, -DCACHE_LINESIZE
|
||||
1:
|
||||
cache (CACH_PD | C_IWBINV), ($t0)
|
||||
sltu $at, $t0, $t1
|
||||
bnez $at, 1b
|
||||
addiu $t0, DCACHE_LINESIZE
|
||||
jr $ra
|
||||
nop
|
||||
.set noreorder
|
||||
cache (CACH_PD | C_IWBINV), (t0)
|
||||
bltu t0, t1, 1b
|
||||
addiu t0, DCACHE_LINESIZE
|
||||
.set reorder
|
||||
jr ra
|
||||
END(osWritebackDCacheAll)
|
||||
|
||||
+34
-24
@@ -1,34 +1,44 @@
|
||||
#include "ultra64/asm.h"
|
||||
#include "ultra64/regdef.h"
|
||||
#include "boot.h"
|
||||
|
||||
.set noreorder
|
||||
.text
|
||||
|
||||
.section .text
|
||||
|
||||
.balign 16
|
||||
#if defined(__sgi) && !defined(AVOID_UB)
|
||||
/* IDO assembler workaround: The makerom tool in the N64 SDK was given the bss segment size as a const
|
||||
* literal, and since this literal was < 0x10000 it was loaded in one instruction. We don't have access
|
||||
* to the bss segment size until we link everything so we cannot do the same thing. Instead we must load
|
||||
* only the lower 16 bits of the bss size for matching.
|
||||
* When AVOID_UB is enabled, don't do this and instead load the full symbol value, otherwise not all of
|
||||
* bss may be cleared. */
|
||||
#define LOAD_BSS_SIZE(reg) li reg, %half(_bootSegmentBssSize)
|
||||
#else
|
||||
#define LOAD_BSS_SIZE(reg) la reg, _bootSegmentBssSize
|
||||
#endif
|
||||
|
||||
LEAF(entrypoint)
|
||||
// Clear boot segment .bss
|
||||
la $t0, _bootSegmentBssStart
|
||||
#ifndef AVOID_UB
|
||||
// UB: li only loads the lower 16 bits of _bootSegmentBssSize when it may be larger than this,
|
||||
// so not all of bss may be cleared if it is too large
|
||||
li $t1, _bootSegmentBssSize
|
||||
#else
|
||||
la $t1, _bootSegmentBssSize
|
||||
#endif
|
||||
/* Clear boot segment .bss */
|
||||
la t0, _bootSegmentBssStart
|
||||
LOAD_BSS_SIZE(t1)
|
||||
.clear_bss:
|
||||
addi $t1, $t1, -8
|
||||
sw $zero, ($t0)
|
||||
sw $zero, 4($t0)
|
||||
bnez $t1, .clear_bss
|
||||
addi $t0, $t0, 8
|
||||
// Set up stack and enter program code
|
||||
lui $t2, %hi(bootproc)
|
||||
lui $sp, %hi(sBootThreadStack + BOOT_STACK_SIZE)
|
||||
addiu $t2, %lo(bootproc)
|
||||
jr $t2
|
||||
addiu $sp, %lo(sBootThreadStack + BOOT_STACK_SIZE)
|
||||
sw zero, 0(t0)
|
||||
sw zero, 4(t0)
|
||||
addi t0, t0, 8
|
||||
addi t1, t1, -8
|
||||
bnez t1, .clear_bss
|
||||
|
||||
/* Set up stack and enter program code */
|
||||
la sp, sBootThreadStack + BOOT_STACK_SIZE
|
||||
la t2, bootproc
|
||||
jr t2
|
||||
END(entrypoint)
|
||||
|
||||
#ifdef __GNUC__
|
||||
/* Pad to a total size of 0x60 */
|
||||
.fill 0x60 - (. - entrypoint)
|
||||
#else
|
||||
/* IDO can't take absolute differences of symbols.. */
|
||||
.repeat (0x60 - 0x34)
|
||||
.byte 0
|
||||
.endr
|
||||
#endif
|
||||
|
||||
@@ -1,4 +0,0 @@
|
||||
|
||||
.section .text
|
||||
|
||||
.incbin "incbin/ipl3"
|
||||
Reference in New Issue
Block a user