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move asm to inline asm (consolidate gcc functions)

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fig02
2022-02-12 00:00:41 -05:00
parent cbddf7146d
commit 82ba5da981
13 changed files with 153 additions and 150 deletions
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asm/llmuldiv_gcc.s
-103
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@@ -1,103 +0,0 @@
.include "macro.inc"
# assembler directives
.set noat # allow manual use of $at
.set noreorder # don't insert nops after branches
.set gp=64 # allow use of 64-bit general purpose registers
.section .text
.balign 16
/* Copied from Super Mario 64 decomp project */
/* -------------------------------------------------------------------------------------- */
/* need to asm these functions because lib32gcc-7-dev-mips-cross does not exist so we */
/* cannot naturally link a libgcc variant for this target given this architecture and */
/* compiler. Until we have a good workaround with a gcc target that doesn't involve */
/* assuming a 32-bit to 64-bit change, we have to encode these functions as raw assembly */
/* for it to compile. */
/* -------------------------------------------------------------------------------------- */
/* TODO: Is there a non-insane way to fix this hack that doesn't involve the user compiling */
/* a library themselves? */
glabel __umoddi3
sw $a0, ($sp)
sw $a1, 4($sp)
sw $a2, 8($sp)
sw $a3, 0xc($sp)
ld $t7, 8($sp)
ld $t6, ($sp)
ddivu $zero, $t6, $t7
bnez $t7, .L80324144
nop
break 7
.L80324144:
mfhi $v0
dsll32 $v1, $v0, 0
dsra32 $v1, $v1, 0
jr $ra
dsra32 $v0, $v0, 0
glabel __udivdi3
sw $a0, ($sp)
sw $a1, 4($sp)
sw $a2, 8($sp)
sw $a3, 0xc($sp)
ld $t7, 8($sp)
ld $t6, ($sp)
ddivu $zero, $t6, $t7
bnez $t7, .L80324180
nop
break 7
.L80324180:
mflo $v0
dsll32 $v1, $v0, 0
dsra32 $v1, $v1, 0
jr $ra
dsra32 $v0, $v0, 0
glabel __moddi3
sw $a0, ($sp)
sw $a1, 4($sp)
sw $a2, 8($sp)
sw $a3, 0xc($sp)
ld $t7, 8($sp)
ld $t6, ($sp)
ddivu $zero, $t6, $t7
bnez $t7, .L803241E8
nop
break 7
.L803241E8:
mfhi $v0
dsll32 $v1, $v0, 0
dsra32 $v1, $v1, 0
jr $ra
dsra32 $v0, $v0, 0
glabel __divdi3
sw $a0, ($sp)
sw $a1, 4($sp)
sw $a2, 8($sp)
sw $a3, 0xc($sp)
ld $t7, 8($sp)
ld $t6, ($sp)
ddiv $zero, $t6, $t7
nop
bnez $t7, .L80324228
nop
break 7
.L80324228:
daddiu $at, $zero, -1
bne $t7, $at, .L80324244
daddiu $at, $zero, 1
dsll32 $at, $at, 0x1f
bne $t6, $at, .L80324244
nop
break 6
.L80324244:
mflo $v0
dsll32 $v1, $v0, 0
dsra32 $v1, $v1, 0
jr $ra
dsra32 $v0, $v0, 0