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Improve rcp.h, remove HW_REG macro (#1425)

Browse Source 
* Real rcp.h

* Correction to comment in initialize.c

* Try fix R4300.h

* Adjust rcp.h formatting, remove defines in other headers that are now in rcp.h

* Suggested changes, document a bug in the modified osAiSetNextBuffer

* More rcp.h formatting changes
This commit is contained in:
Tharo
2022-11-13 07:16:01 +00:00
committed by GitHub
parent d8175501ad
commit efe485f017
62 changed files with 1058 additions and 477 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/code/graph.c
+4 -4
View File
@@ -175,8 +175,8 @@ void Graph_TaskSet00(GraphicsContext* gfxCtx) {
osSyncPrintf("RCPが帰ってきませんでした。"); // "RCP did not return."
osSyncPrintf(VT_RST);
LogUtils_LogHexDump((void*)&HW_REG(SP_MEM_ADDR_REG, u32), 0x20);
LogUtils_LogHexDump((void*)&DPC_START_REG, 0x20);
LogUtils_LogHexDump((void*)PHYS_TO_K1(SP_BASE_REG), 0x20);
LogUtils_LogHexDump((void*)PHYS_TO_K1(DPC_BASE_REG), 0x20);
LogUtils_LogHexDump(gGfxSPTaskYieldBuffer, sizeof(gGfxSPTaskYieldBuffer));
SREG(6) = -1;
@@ -321,8 +321,8 @@ void Graph_Update(GraphicsContext* gfxCtx, GameState* gameState) {
}
if (HREG(81) < 0) {
LogUtils_LogHexDump((void*)&HW_REG(SP_MEM_ADDR_REG, u32), 0x20);
LogUtils_LogHexDump((void*)&DPC_START_REG, 0x20);
LogUtils_LogHexDump((void*)PHYS_TO_K1(SP_BASE_REG), 0x20);
LogUtils_LogHexDump((void*)PHYS_TO_K1(DPC_BASE_REG), 0x20);
}
if (HREG(81) < 0) {
src/code/rcp_utils.c
+1 -1
View File
@@ -50,6 +50,6 @@ void RcpUtils_Reset(void) {
// Flush the RDP pipeline and freeze clock counter
osDpSetStatus(DPC_SET_FREEZE | DPC_SET_FLUSH);
// Halt the RSP, disable interrupt on break and set "task done" signal
__osSpSetStatus(SP_SET_HALT | SP_SET_SIG2 | SP_CLR_INTR_BREAK);
__osSpSetStatus(SP_SET_HALT | SP_SET_TASKDONE | SP_CLR_INTR_BREAK);
RcpUtils_PrintRegisterStatus();
}
src/libultra/gu/sintable.inc.c
+1 -1
View File
@@ -1,4 +1,4 @@
#include "ultra64/types.h"
#include "ultra64/ultratypes.h"
static s16 sintable[0x400] = {
0x0000, 0x0032, 0x0064, 0x0096, 0x00C9, 0x00FB, 0x012D, 0x0160, 0x0192, 0x01C4, 0x01F7, 0x0229, 0x025B, 0x028E,
src/libultra/io/aigetlen.c
+7 -1
View File
@@ -1,5 +1,11 @@
#include "global.h"
/**
* Returns the number of bytes remaining in a currently ongoing audio DMA.
*
* Note that audio DMA is double-buffered, a DMA can be queued while another is in-progress. This only returns
* information about the currently in-progress DMA.
*/
u32 osAiGetLength(void) {
return HW_REG(AI_LEN_REG, u32);
return IO_READ(AI_LEN_REG);
}
src/libultra/io/aisetfreq.c
+21 -6
View File
@@ -1,20 +1,35 @@
#include "global.h"
/**
* Programs the operating frequency of the Audio DAC.
*
* @param frequency Target Playback frequency.
* @return The actual playback frequency, or -1 if the supplied frequency cannot be used.
*/
s32 osAiSetFrequency(u32 frequency) {
u8 bitrate;
// Calculate the DAC sample period ("dperiod") (dperiod + 1 = vid_clock / frequency)
f32 dacRateF = ((f32)osViClock / frequency) + 0.5f;
u8 bitrate;
u32 dacRate = dacRateF;
if (dacRate < 132) {
// Upcoming division by 66. If dacRate is smaller than 2 * 66 = 132, bitrate will be 1 and AI_BITRATE_REG will be
// programmed with 0, which results in no audio output. Return -1 to indicate an unusable frequency.
if (dacRate < AI_MIN_DAC_RATE) {
return -1;
}
// Calculate the largest "bitrate" (ABUS clock half period, "aclockhp") supported for this dacrate. These two
// quantities must satisfy (dperiod + 1) >= 66 * (aclockhp + 1), here this is taken as equality.
bitrate = (dacRate / 66);
if (bitrate > 16) {
bitrate = 16;
// Clamp to max value
if (bitrate > AI_MAX_BIT_RATE) {
bitrate = AI_MAX_BIT_RATE;
}
HW_REG(AI_DACRATE_REG, u32) = dacRate - 1;
HW_REG(AI_BITRATE_REG, u32) = bitrate - 1;
IO_WRITE(AI_DACRATE_REG, dacRate - 1);
IO_WRITE(AI_BITRATE_REG, bitrate - 1);
// Return the true playback frequency (frequency = vid_clock / (dperiod + 1)), which may differ from the target
// frequency.
return osViClock / (s32)dacRate;
}
src/libultra/io/aisetnextbuf.c
+27 -14
View File
@@ -1,31 +1,44 @@
#include "global.h"
//! Note that this is not the same as the original libultra
//! osAiSetNextBuffer, see comments in the function
/**
* Submits an audio buffer to be consumed by the Audio DAC. The audio interface can queue a second DMA while another
* is in progress and automatically begin the next one as soon as the current DMA completes. If there is already a
* second DMA queued (DMA is full), -1 is returned to indicate the buffer could not be submitted.
*
* Note that this is not the same as the original libultra osAiSetNextBuffer, see comments in the function.
*
* @param buf Next audio buffer. Must be an 8-byte aligned KSEG0 (0x80XXXXXX) address.
* @param size Length of next audio buffer in bytes, maximum size 0x40000 bytes / 256 KiB. Should be a multiple of 8.
* @return 0 if the DMA was enqueued successfully, -1 if the DMA could not yet be queued.
*/
s32 osAiSetNextBuffer(void* buf, u32 size) {
static u8 D_80130500 = false;
static u8 hdwrBugFlag = false;
u32 bufAdjusted = (u32)buf;
s32 status;
if (D_80130500) {
bufAdjusted = (u32)buf - 0x2000;
// Workaround for a hardware bug. If the end of the previous buffer was on an 0x2000 byte boundary, adjust the
// start of the next buffer.
if (hdwrBugFlag) {
bufAdjusted -= 0x2000;
}
// Current buffer ends on an 0x2000 byte boundary, set flag to account for this in next buffer.
if ((((u32)buf + size) & 0x1FFF) == 0) {
D_80130500 = true;
hdwrBugFlag = true;
} else {
D_80130500 = false;
hdwrBugFlag = false;
}
// Originally a call to __osAiDeviceBusy
status = HW_REG(AI_STATUS_REG, s32);
if (status & AI_STATUS_AI_FULL) {
//! @bug The original __osAiDeviceBusy call was above the hardware bug workaround to ensure that it was only
//! performed when a transfer was guaranteed to start. If this condition passes and this function returns without
//! submitting a buffer for DMA, the code above will lose track of when to apply the workaround.
status = IO_READ(AI_STATUS_REG);
if (status & AI_STATUS_FIFO_FULL) {
return -1;
}
// OS_K0_TO_PHYSICAL replaces osVirtualToPhysical, this replacement
// assumes that only KSEG0 addresses are given
HW_REG(AI_DRAM_ADDR_REG, u32) = OS_K0_TO_PHYSICAL(bufAdjusted);
HW_REG(AI_LEN_REG, u32) = size;
// OS_K0_TO_PHYSICAL replaces osVirtualToPhysical, this replacement assumes that only KSEG0 addresses are given.
IO_WRITE(AI_DRAM_ADDR_REG, OS_K0_TO_PHYSICAL(bufAdjusted));
IO_WRITE(AI_LEN_REG, size);
return 0;
}
src/libultra/io/cartrominit.c
+29 -30
View File
@@ -3,55 +3,54 @@
OSPiHandle __CartRomHandle;
OSPiHandle* osCartRomInit(void) {
register u32 a;
static u32 first = true;
register u32 value;
register s32 status;
register u32 prevInt;
register u32 lastLatency;
register u32 lastPageSize;
register u32 lastRelDuration;
register u32 lastPulse;
static u32 D_8000AF10 = 1;
register u32 latency;
register u32 pageSize;
register u32 relDuration;
register u32 pulse;
__osPiGetAccess();
if (!D_8000AF10) {
if (!first) {
__osPiRelAccess();
return &__CartRomHandle;
}
D_8000AF10 = 0;
first = false;
__CartRomHandle.type = DEVICE_TYPE_CART;
__CartRomHandle.baseAddress = 0xB0000000;
__CartRomHandle.baseAddress = PHYS_TO_K1(PI_DOM1_ADDR2);
__CartRomHandle.domain = PI_DOMAIN1;
__CartRomHandle.speed = 0;
bzero(&__CartRomHandle.transferInfo, sizeof(__OSTranxInfo));
status = HW_REG(PI_STATUS_REG, u32);
while (status & (PI_STATUS_BUSY | PI_STATUS_IOBUSY)) {
status = HW_REG(PI_STATUS_REG, u32);
status = IO_READ(PI_STATUS_REG);
while (status & (PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY)) {
status = IO_READ(PI_STATUS_REG);
}
lastLatency = HW_REG(PI_BSD_DOM1_LAT_REG, u32);
lastPageSize = HW_REG(PI_BSD_DOM1_PGS_REG, u32);
lastRelDuration = HW_REG(PI_BSD_DOM1_RLS_REG, u32);
lastPulse = HW_REG(PI_BSD_DOM1_PWD_REG, u32);
latency = IO_READ(PI_BSD_DOM1_LAT_REG);
pageSize = IO_READ(PI_BSD_DOM1_PGS_REG);
relDuration = IO_READ(PI_BSD_DOM1_RLS_REG);
pulse = IO_READ(PI_BSD_DOM1_PWD_REG);
HW_REG(PI_BSD_DOM1_LAT_REG, u32) = 0xFF;
HW_REG(PI_BSD_DOM1_PGS_REG, u32) = 0;
HW_REG(PI_BSD_DOM1_RLS_REG, u32) = 3;
HW_REG(PI_BSD_DOM1_PWD_REG, u32) = 0xFF;
IO_WRITE(PI_BSD_DOM1_LAT_REG, 255);
IO_WRITE(PI_BSD_DOM1_PGS_REG, 0);
IO_WRITE(PI_BSD_DOM1_RLS_REG, 3);
IO_WRITE(PI_BSD_DOM1_PWD_REG, 255);
a = HW_REG(__CartRomHandle.baseAddress, u32);
__CartRomHandle.latency = a & 0xFF;
__CartRomHandle.pageSize = (a >> 0x10) & 0xF;
__CartRomHandle.relDuration = (a >> 0x14) & 0xF;
__CartRomHandle.pulse = (a >> 8) & 0xFF;
value = IO_READ(__CartRomHandle.baseAddress);
__CartRomHandle.latency = value & 0xFF;
__CartRomHandle.pageSize = (value >> 0x10) & 0xF;
__CartRomHandle.relDuration = (value >> 0x14) & 0xF;
__CartRomHandle.pulse = (value >> 8) & 0xFF;
HW_REG(PI_BSD_DOM1_LAT_REG, u32) = lastLatency;
HW_REG(PI_BSD_DOM1_PGS_REG, u32) = lastPageSize;
HW_REG(PI_BSD_DOM1_RLS_REG, u32) = lastRelDuration;
HW_REG(PI_BSD_DOM1_PWD_REG, u32) = lastPulse;
IO_WRITE(PI_BSD_DOM1_LAT_REG, latency);
IO_WRITE(PI_BSD_DOM1_PGS_REG, pageSize);
IO_WRITE(PI_BSD_DOM1_RLS_REG, relDuration);
IO_WRITE(PI_BSD_DOM1_PWD_REG, pulse);
prevInt = __osDisableInt();
__CartRomHandle.next = __osPiTable;
src/libultra/io/devmgr.c
+1 -1
View File
@@ -43,7 +43,7 @@ void __osDevMgrMain(void* arg) {
__osEPiRawWriteIo(ioMesg->piHandle, 0x05000510, transfer->bmCtlShadow | 0x1000000);
}
block->errStatus = 4;
HW_REG(PI_STATUS_REG, u32) = PI_STATUS_CLR_INTR;
IO_WRITE(PI_STATUS_REG, PI_STATUS_CLR_INTR);
__osSetGlobalIntMask(OS_IM_CART | OS_IM_PI);
}
osSendMesg(ioMesg->hdr.retQueue, (OSMesg)ioMesg, OS_MESG_NOBLOCK);
src/libultra/io/dpgetstat.c
+1 -1
View File
@@ -1,5 +1,5 @@
#include "global.h"
u32 osDpGetStatus(void) {
return DPC_STATUS_REG;
return IO_READ(DPC_STATUS_REG);
}
src/libultra/io/dpsetstat.c
+1 -1
View File
@@ -1,5 +1,5 @@
#include "global.h"
void osDpSetStatus(u32 status) {
DPC_STATUS_REG = status;
IO_WRITE(DPC_STATUS_REG, status);
}
src/libultra/io/driverominit.c
+21 -21
View File
@@ -3,45 +3,45 @@
OSPiHandle __DriveRomHandle;
OSPiHandle* osDriveRomInit(void) {
static u32 first = true;
register s32 status;
register u32 a;
register u32 value;
register u32 prevInt;
static u32 D_8000AC70 = 1;
__osPiGetAccess();
if (!D_8000AC70) {
if (!first) {
__osPiRelAccess();
return &__DriveRomHandle;
}
D_8000AC70 = 0;
first = false;
__DriveRomHandle.type = DEVICE_TYPE_BULK;
__DriveRomHandle.baseAddress = 0xA6000000;
__DriveRomHandle.baseAddress = PHYS_TO_K1(PI_DOM1_ADDR1);
__DriveRomHandle.domain = PI_DOMAIN1;
__DriveRomHandle.speed = 0;
bzero(&__DriveRomHandle.transferInfo, sizeof(__OSTranxInfo));
status = HW_REG(PI_STATUS_REG, u32);
while (status & (PI_STATUS_BUSY | PI_STATUS_IOBUSY)) {
status = HW_REG(PI_STATUS_REG, u32);
status = IO_READ(PI_STATUS_REG);
while (status & (PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY)) {
status = IO_READ(PI_STATUS_REG);
}
HW_REG(PI_BSD_DOM1_LAT_REG, u32) = 0xFF;
HW_REG(PI_BSD_DOM1_PGS_REG, u32) = 0;
HW_REG(PI_BSD_DOM1_RLS_REG, u32) = 3;
HW_REG(PI_BSD_DOM1_PWD_REG, u32) = 0xFF;
IO_WRITE(PI_BSD_DOM1_LAT_REG, 255);
IO_WRITE(PI_BSD_DOM1_PGS_REG, 0);
IO_WRITE(PI_BSD_DOM1_RLS_REG, 3);
IO_WRITE(PI_BSD_DOM1_PWD_REG, 255);
a = HW_REG(__DriveRomHandle.baseAddress, u32);
__DriveRomHandle.latency = a & 0xFF;
__DriveRomHandle.pulse = (a >> 8) & 0xFF;
__DriveRomHandle.pageSize = (a >> 0x10) & 0xF;
__DriveRomHandle.relDuration = (a >> 0x14) & 0xF;
value = IO_READ(__DriveRomHandle.baseAddress);
__DriveRomHandle.latency = value & 0xFF;
__DriveRomHandle.pulse = (value >> 8) & 0xFF;
__DriveRomHandle.pageSize = (value >> 0x10) & 0xF;
__DriveRomHandle.relDuration = (value >> 0x14) & 0xF;
HW_REG(PI_BSD_DOM1_LAT_REG, u32) = (u8)a;
HW_REG(PI_BSD_DOM1_PGS_REG, u32) = __DriveRomHandle.pageSize;
HW_REG(PI_BSD_DOM1_RLS_REG, u32) = __DriveRomHandle.relDuration;
HW_REG(PI_BSD_DOM1_PWD_REG, u32) = __DriveRomHandle.pulse;
IO_WRITE(PI_BSD_DOM1_LAT_REG, __DriveRomHandle.latency);
IO_WRITE(PI_BSD_DOM1_PGS_REG, __DriveRomHandle.pageSize);
IO_WRITE(PI_BSD_DOM1_RLS_REG, __DriveRomHandle.relDuration);
IO_WRITE(PI_BSD_DOM1_PWD_REG, __DriveRomHandle.pulse);
__osCurrentHandle[__DriveRomHandle.domain]->type = __DriveRomHandle.type;
__osCurrentHandle[__DriveRomHandle.domain]->latency = __DriveRomHandle.latency;
src/libultra/io/epirawdma.c
+15 -17
View File
@@ -4,9 +4,9 @@ s32 __osEPiRawStartDma(OSPiHandle* handle, s32 direction, u32 cartAddr, void* dr
s32 status;
OSPiHandle* curHandle;
status = HW_REG(PI_STATUS_REG, u32);
while (status & (PI_STATUS_BUSY | PI_STATUS_IOBUSY)) {
status = HW_REG(PI_STATUS_REG, u32);
status = IO_READ(PI_STATUS_REG);
while (status & (PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY)) {
status = IO_READ(PI_STATUS_REG);
}
if (__osCurrentHandle[handle->domain]->type != handle->type) {
@@ -14,35 +14,35 @@ s32 __osEPiRawStartDma(OSPiHandle* handle, s32 direction, u32 cartAddr, void* dr
if (handle->domain == 0) {
if (curHandle->latency != handle->latency) {
HW_REG(PI_BSD_DOM1_LAT_REG, u32) = handle->latency;
IO_WRITE(PI_BSD_DOM1_LAT_REG, handle->latency);
}
if (curHandle->pageSize != handle->pageSize) {
HW_REG(PI_BSD_DOM1_PGS_REG, u32) = handle->pageSize;
IO_WRITE(PI_BSD_DOM1_PGS_REG, handle->pageSize);
}
if (curHandle->relDuration != handle->relDuration) {
HW_REG(PI_BSD_DOM1_RLS_REG, u32) = handle->relDuration;
IO_WRITE(PI_BSD_DOM1_RLS_REG, handle->relDuration);
}
if (curHandle->pulse != handle->pulse) {
HW_REG(PI_BSD_DOM1_PWD_REG, u32) = handle->pulse;
IO_WRITE(PI_BSD_DOM1_PWD_REG, handle->pulse);
}
} else {
if (curHandle->latency != handle->latency) {
HW_REG(PI_BSD_DOM2_LAT_REG, u32) = handle->latency;
IO_WRITE(PI_BSD_DOM2_LAT_REG, handle->latency);
}
if (curHandle->pageSize != handle->pageSize) {
HW_REG(PI_BSD_DOM2_PGS_REG, u32) = handle->pageSize;
IO_WRITE(PI_BSD_DOM2_PGS_REG, handle->pageSize);
}
if (curHandle->relDuration != handle->relDuration) {
HW_REG(PI_BSD_DOM2_RLS_REG, u32) = handle->relDuration;
IO_WRITE(PI_BSD_DOM2_RLS_REG, handle->relDuration);
}
if (curHandle->pulse != handle->pulse) {
HW_REG(PI_BSD_DOM2_PWD_REG, u32) = handle->pulse;
IO_WRITE(PI_BSD_DOM2_PWD_REG, handle->pulse);
}
}
@@ -53,20 +53,18 @@ s32 __osEPiRawStartDma(OSPiHandle* handle, s32 direction, u32 cartAddr, void* dr
curHandle->pulse = handle->pulse;
}
HW_REG(PI_DRAM_ADDR_REG, void*) = (void*)osVirtualToPhysical(dramAddr);
HW_REG(PI_CART_ADDR_REG, void*) = (void*)((handle->baseAddress | cartAddr) & 0x1FFFFFFF);
IO_WRITE(PI_DRAM_ADDR_REG, osVirtualToPhysical(dramAddr));
IO_WRITE(PI_CART_ADDR_REG, K1_TO_PHYS(handle->baseAddress | cartAddr));
switch (direction) {
case OS_READ:
HW_REG(PI_WR_LEN_REG, u32) = size - 1;
IO_WRITE(PI_WR_LEN_REG, size - 1);
break;
case OS_WRITE:
HW_REG(PI_RD_LEN_REG, u32) = size - 1;
IO_WRITE(PI_RD_LEN_REG, size - 1);
break;
default:
return -1;
break;
}
return 0;
}
src/libultra/io/epirawread.c
+12 -12
View File
@@ -4,9 +4,9 @@ s32 __osEPiRawReadIo(OSPiHandle* handle, u32 devAddr, u32* data) {
s32 status;
OSPiHandle* curHandle;
status = HW_REG(PI_STATUS_REG, u32);
while (status & (PI_STATUS_BUSY | PI_STATUS_IOBUSY)) {
status = HW_REG(PI_STATUS_REG, u32);
status = IO_READ(PI_STATUS_REG);
while (status & (PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY)) {
status = IO_READ(PI_STATUS_REG);
}
if (__osCurrentHandle[handle->domain]->type != handle->type) {
@@ -14,35 +14,35 @@ s32 __osEPiRawReadIo(OSPiHandle* handle, u32 devAddr, u32* data) {
if (handle->domain == 0) {
if (curHandle->latency != handle->latency) {
HW_REG(PI_BSD_DOM1_LAT_REG, u32) = handle->latency;
IO_WRITE(PI_BSD_DOM1_LAT_REG, handle->latency);
}
if (curHandle->pageSize != handle->pageSize) {
HW_REG(PI_BSD_DOM1_PGS_REG, u32) = handle->pageSize;
IO_WRITE(PI_BSD_DOM1_PGS_REG, handle->pageSize);
}
if (curHandle->relDuration != handle->relDuration) {
HW_REG(PI_BSD_DOM1_RLS_REG, u32) = handle->relDuration;
IO_WRITE(PI_BSD_DOM1_RLS_REG, handle->relDuration);
}
if (curHandle->pulse != handle->pulse) {
HW_REG(PI_BSD_DOM1_PWD_REG, u32) = handle->pulse;
IO_WRITE(PI_BSD_DOM1_PWD_REG, handle->pulse);
}
} else {
if (curHandle->latency != handle->latency) {
HW_REG(PI_BSD_DOM2_LAT_REG, u32) = handle->latency;
IO_WRITE(PI_BSD_DOM2_LAT_REG, handle->latency);
}
if (curHandle->pageSize != handle->pageSize) {
HW_REG(PI_BSD_DOM2_PGS_REG, u32) = handle->pageSize;
IO_WRITE(PI_BSD_DOM2_PGS_REG, handle->pageSize);
}
if (curHandle->relDuration != handle->relDuration) {
HW_REG(PI_BSD_DOM2_RLS_REG, u32) = handle->relDuration;
IO_WRITE(PI_BSD_DOM2_RLS_REG, handle->relDuration);
}
if (curHandle->pulse != handle->pulse) {
HW_REG(PI_BSD_DOM2_PWD_REG, u32) = handle->pulse;
IO_WRITE(PI_BSD_DOM2_PWD_REG, handle->pulse);
}
}
@@ -53,6 +53,6 @@ s32 __osEPiRawReadIo(OSPiHandle* handle, u32 devAddr, u32* data) {
curHandle->pulse = handle->pulse;
}
*data = HW_REG(handle->baseAddress | devAddr | 0, u32);
*data = IO_READ(handle->baseAddress | devAddr);
return 0;
}
src/libultra/io/epirawwrite.c
+12 -12
View File
@@ -4,9 +4,9 @@ s32 __osEPiRawWriteIo(OSPiHandle* handle, u32 devAddr, u32 data) {
s32 status;
OSPiHandle* curHandle;
status = HW_REG(PI_STATUS_REG, u32);
while (status & (PI_STATUS_BUSY | PI_STATUS_IOBUSY)) {
status = HW_REG(PI_STATUS_REG, u32);
status = IO_READ(PI_STATUS_REG);
while (status & (PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY)) {
status = IO_READ(PI_STATUS_REG);
}
if (__osCurrentHandle[handle->domain]->type != handle->type) {
@@ -14,35 +14,35 @@ s32 __osEPiRawWriteIo(OSPiHandle* handle, u32 devAddr, u32 data) {
if (handle->domain == 0) {
if (curHandle->latency != handle->latency) {
HW_REG(PI_BSD_DOM1_LAT_REG, u32) = handle->latency;
IO_WRITE(PI_BSD_DOM1_LAT_REG, handle->latency);
}
if (curHandle->pageSize != handle->pageSize) {
HW_REG(PI_BSD_DOM1_PGS_REG, u32) = handle->pageSize;
IO_WRITE(PI_BSD_DOM1_PGS_REG, handle->pageSize);
}
if (curHandle->relDuration != handle->relDuration) {
HW_REG(PI_BSD_DOM1_RLS_REG, u32) = handle->relDuration;
IO_WRITE(PI_BSD_DOM1_RLS_REG, handle->relDuration);
}
if (curHandle->pulse != handle->pulse) {
HW_REG(PI_BSD_DOM1_PWD_REG, u32) = handle->pulse;
IO_WRITE(PI_BSD_DOM1_PWD_REG, handle->pulse);
}
} else {
if (curHandle->latency != handle->latency) {
HW_REG(PI_BSD_DOM2_LAT_REG, u32) = handle->latency;
IO_WRITE(PI_BSD_DOM2_LAT_REG, handle->latency);
}
if (curHandle->pageSize != handle->pageSize) {
HW_REG(PI_BSD_DOM2_PGS_REG, u32) = handle->pageSize;
IO_WRITE(PI_BSD_DOM2_PGS_REG, handle->pageSize);
}
if (curHandle->relDuration != handle->relDuration) {
HW_REG(PI_BSD_DOM2_RLS_REG, u32) = handle->relDuration;
IO_WRITE(PI_BSD_DOM2_RLS_REG, handle->relDuration);
}
if (curHandle->pulse != handle->pulse) {
HW_REG(PI_BSD_DOM2_PWD_REG, u32) = handle->pulse;
IO_WRITE(PI_BSD_DOM2_PWD_REG, handle->pulse);
}
}
@@ -53,6 +53,6 @@ s32 __osEPiRawWriteIo(OSPiHandle* handle, u32 devAddr, u32 data) {
curHandle->pulse = handle->pulse;
}
HW_REG(handle->baseAddress | devAddr, u32) = data;
IO_WRITE(handle->baseAddress | devAddr, data);
return 0;
}
src/libultra/io/pirawdma.c
+7 -8
View File
@@ -3,21 +3,20 @@
s32 __osPiRawStartDma(s32 dir, u32 cartAddr, void* dramAddr, size_t size) {
s32 status;
status = HW_REG(PI_STATUS_REG, u32);
while (status & (PI_STATUS_BUSY | PI_STATUS_IOBUSY)) {
status = HW_REG(PI_STATUS_REG, u32);
status = IO_READ(PI_STATUS_REG);
while (status & (PI_STATUS_DMA_BUSY | PI_STATUS_IO_BUSY)) {
status = IO_READ(PI_STATUS_REG);
}
HW_REG(PI_DRAM_ADDR_REG, void*) = (void*)osVirtualToPhysical(dramAddr);
HW_REG(PI_CART_ADDR_REG, void*) = (void*)((osRomBase | cartAddr) & 0x1FFFFFFF);
IO_WRITE(PI_DRAM_ADDR_REG, osVirtualToPhysical(dramAddr));
IO_WRITE(PI_CART_ADDR_REG, K1_TO_PHYS(osRomBase | cartAddr));
switch (dir) {
case OS_READ:
HW_REG(PI_WR_LEN_REG, u32) = size - 1;
IO_WRITE(PI_WR_LEN_REG, size - 1);
break;
case OS_WRITE:
HW_REG(PI_RD_LEN_REG, u32) = size - 1;
IO_WRITE(PI_RD_LEN_REG, size - 1);
break;
default:
return -1;
src/libultra/io/si.c
+3 -4
View File
@@ -1,11 +1,10 @@
#include "global.h"
s32 __osSiDeviceBusy(void) {
register u32 status = HW_REG(SI_STATUS_REG, u32);
register u32 status = IO_READ(SI_STATUS_REG);
if (status & (SI_STATUS_DMA_BUSY | SI_STATUS_IO_READ_BUSY)) {
if (status & (SI_STATUS_DMA_BUSY | SI_STATUS_RD_BUSY)) {
return true;
} else {
return false;
}
return false;
}
src/libultra/io/sirawdma.c
+8 -6
View File
@@ -1,20 +1,22 @@
#include "global.h"
#define PIF_RAM_SIZE (PIF_RAM_END + 1 - PIF_RAM_START)
s32 __osSiRawStartDma(s32 dir, void* addr) {
if (HW_REG(SI_STATUS_REG, u32) & (SI_STATUS_DMA_BUSY | SI_STATUS_IO_READ_BUSY)) {
if (IO_READ(SI_STATUS_REG) & (SI_STATUS_DMA_BUSY | SI_STATUS_RD_BUSY)) {
return -1;
}
if (dir == OS_WRITE) {
osWritebackDCache(addr, 0x40);
osWritebackDCache(addr, PIF_RAM_SIZE);
}
HW_REG(SI_DRAM_ADDR_REG, void*) = (void*)osVirtualToPhysical(addr);
IO_WRITE(SI_DRAM_ADDR_REG, osVirtualToPhysical(addr));
if (dir == OS_READ) {
HW_REG(SI_PIF_ADDR_RD64B_REG, void*) = (void*)PIF_RAM_START;
IO_WRITE(SI_PIF_ADDR_RD64B_REG, PIF_RAM_START);
} else {
HW_REG(SI_PIF_ADDR_WR64B_REG, void*) = (void*)PIF_RAM_START;
IO_WRITE(SI_PIF_ADDR_WR64B_REG, PIF_RAM_START);
}
if (dir == OS_READ) {
osInvalDCache(addr, 0x40);
osInvalDCache(addr, PIF_RAM_SIZE);
}
return 0;
}
src/libultra/io/sirawread.c
+1 -1
View File
@@ -4,6 +4,6 @@ s32 __osSiRawReadIo(void* devAddr, u32* dst) {
if (__osSiDeviceBusy()) {
return -1;
}
*dst = HW_REG((u32)devAddr, u32);
*dst = IO_READ(devAddr);
return 0;
}
src/libultra/io/sirawwrite.c
+1 -1
View File
@@ -4,6 +4,6 @@ s32 __osSiRawWriteIo(void* devAddr, u32 val) {
if (__osSiDeviceBusy()) {
return -1;
}
HW_REG((u32)devAddr, u32) = val;
IO_WRITE(devAddr, val);
return 0;
}
src/libultra/io/sp.c
+1 -1
View File
@@ -1,7 +1,7 @@
#include "global.h"
u32 __osSpDeviceBusy(void) {
register u32 status = HW_REG(SP_STATUS_REG, u32);
register u32 status = IO_READ(SP_STATUS_REG);
if (status & (SP_STATUS_DMA_BUSY | SP_STATUS_DMA_FULL | SP_STATUS_IO_FULL)) {
return 1;
src/libultra/io/spgetstat.c
+1 -1
View File
@@ -1,5 +1,5 @@
#include "global.h"
u32 __osSpGetStatus(void) {
return HW_REG(SP_STATUS_REG, u32);
return IO_READ(SP_STATUS_REG);
}
src/libultra/io/sprawdma.c
+4 -4
View File
@@ -4,12 +4,12 @@ s32 __osSpRawStartDma(s32 direction, void* devAddr, void* dramAddr, u32 size) {
if (__osSpDeviceBusy()) {
return -1;
}
HW_REG(SP_MEM_ADDR_REG, u32) = (u32)devAddr;
HW_REG(SP_DRAM_ADDR_REG, u32) = osVirtualToPhysical(dramAddr);
IO_WRITE(SP_MEM_ADDR_REG, devAddr);
IO_WRITE(SP_DRAM_ADDR_REG, osVirtualToPhysical(dramAddr));
if (direction == OS_READ) {
HW_REG(SP_WR_LEN_REG, u32) = size - 1;
IO_WRITE(SP_WR_LEN_REG, size - 1);
} else {
HW_REG(SP_RD_LEN_REG, u32) = size - 1;
IO_WRITE(SP_RD_LEN_REG, size - 1);
}
return 0;
}
src/libultra/io/spsetpc.c
+2 -3
View File
@@ -1,13 +1,12 @@
#include "global.h"
s32 __osSpSetPc(void* pc) {
register u32 spStatus = HW_REG(SP_STATUS_REG, u32);
register u32 spStatus = IO_READ(SP_STATUS_REG);
if (!(spStatus & SP_STATUS_HALT)) {
return -1;
} else {
HW_REG(SP_PC_REG, void*) = pc;
}
IO_WRITE(SP_PC_REG, pc);
return 0;
}
src/libultra/io/spsetstat.c
+1 -1
View File
@@ -1,5 +1,5 @@
#include "global.h"
void __osSpSetStatus(u32 status) {
HW_REG(SP_STATUS_REG, u32) = status;
IO_WRITE(SP_STATUS_REG, status);
}
src/libultra/io/sptask.c
+1 -1
View File
@@ -32,7 +32,7 @@ void osSpTaskLoad(OSTask* intp) {
intp->t.flags &= ~OS_TASK_YIELDED;
if (tp->t.flags & OS_TASK_LOADABLE) {
tp->t.ucode = (u64*)HW_REG((u32)intp->t.yield_data_ptr + OS_YIELD_DATA_SIZE - 4, u32);
tp->t.ucode = (u64*)IO_READ((u32)intp->t.yield_data_ptr + OS_YIELD_DATA_SIZE - 4);
}
}
osWritebackDCache(tp, sizeof(OSTask));
src/libultra/io/vi.c
+4 -5
View File
@@ -11,8 +11,8 @@ void __osViInit(void) {
__osViNext->retraceCount = 1;
__osViCurr->retraceCount = 1;
__osViNext->buffer = (void*)0x80000000;
__osViCurr->buffer = (void*)0x80000000;
__osViNext->buffer = (void*)K0BASE;
__osViCurr->buffer = (void*)K0BASE;
if (osTvType == OS_TV_PAL) {
__osViNext->modep = &osViModePalLan1;
@@ -25,10 +25,9 @@ void __osViInit(void) {
__osViNext->state = 0x20;
__osViNext->features = __osViNext->modep->comRegs.ctrl;
while (HW_REG(VI_CURRENT_REG, u32) > 10) {
while (IO_READ(VI_CURRENT_REG) > 10) {
;
}
HW_REG(VI_CONTROL_REG, u32) = 0;
IO_WRITE(VI_CONTROL_REG, 0);
__osViSwapContext();
}
src/libultra/io/viswapcontext.c
+14 -14
View File
@@ -13,7 +13,7 @@ void __osViSwapContext(void) {
field = 0;
viNext = __osViNext;
viMode = viNext->modep;
field = HW_REG(VI_V_CURRENT_LINE_REG, u32) & 1;
field = IO_READ(VI_V_CURRENT_LINE_REG) & 1;
s2 = osVirtualToPhysical(viNext->buffer);
origin = (viMode->fldRegs[field].origin) + s2;
if (viNext->state & 2) {
@@ -43,19 +43,19 @@ void __osViSwapContext(void) {
viNext->y.scale = (viNext->y.offset << 0x10) & 0x3FF0000;
origin = osVirtualToPhysical(viNext->buffer);
}
HW_REG(VI_ORIGIN_REG, u32) = origin;
HW_REG(VI_WIDTH_REG, u32) = viMode->comRegs.width;
HW_REG(VI_BURST_REG, u32) = viMode->comRegs.burst;
HW_REG(VI_V_SYNC_REG, u32) = viMode->comRegs.vSync;
HW_REG(VI_H_SYNC_REG, u32) = viMode->comRegs.hSync;
HW_REG(VI_LEAP_REG, u32) = viMode->comRegs.leap;
HW_REG(VI_H_START_REG, u32) = hStart;
HW_REG(VI_V_START_REG, u32) = vstart;
HW_REG(VI_V_BURST_REG, u32) = viMode->fldRegs[field].vBurst;
HW_REG(VI_INTR_REG, u32) = viMode->fldRegs[field].vIntr;
HW_REG(VI_X_SCALE_REG, u32) = viNext->x.scale;
HW_REG(VI_Y_SCALE_REG, u32) = viNext->y.scale;
HW_REG(VI_CONTROL_REG, u32) = viNext->features;
IO_WRITE(VI_ORIGIN_REG, origin);
IO_WRITE(VI_WIDTH_REG, viMode->comRegs.width);
IO_WRITE(VI_BURST_REG, viMode->comRegs.burst);
IO_WRITE(VI_V_SYNC_REG, viMode->comRegs.vSync);
IO_WRITE(VI_H_SYNC_REG, viMode->comRegs.hSync);
IO_WRITE(VI_LEAP_REG, viMode->comRegs.leap);
IO_WRITE(VI_H_START_REG, hStart);
IO_WRITE(VI_V_START_REG, vstart);
IO_WRITE(VI_V_BURST_REG, viMode->fldRegs[field].vBurst);
IO_WRITE(VI_INTR_REG, viMode->fldRegs[field].vIntr);
IO_WRITE(VI_X_SCALE_REG, viNext->x.scale);
IO_WRITE(VI_Y_SCALE_REG, viNext->y.scale);
IO_WRITE(VI_CONTROL_REG, viNext->features);
__osViNext = __osViCurr;
__osViCurr = viNext;
*__osViNext = *__osViCurr;
src/libultra/os/exceptasm.s
+1 -2
View File
@@ -1,7 +1,6 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
#include "ultra64/rcp.h"
#include "ultra64/rsp.h"
#include "ultra64/message.h"
#include "ultra64/thread.h"
#include "ultra64/exception.h"
src/libultra/os/getcause.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noreorder
src/libultra/os/getcount.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noreorder
src/libultra/os/getfpccsr.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noreorder
src/libultra/os/getsr.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noreorder
src/libultra/os/initialize.c
+34 -35
View File
@@ -1,63 +1,62 @@
#include "global.h"
typedef struct {
u32 ins_00; // lui k0, 0x8000
u32 ins_04; // addiu k0, k0, 0x39E0
u32 ins_08; // jr k0 ; __osException
u32 ins_0C; // nop
} struct_exceptionPreamble;
u32 inst1; // lui $k0, %hi(__osException)
u32 inst2; // addiu $k0, $k0, %lo(__osException)
u32 inst3; // jr $k0
u32 inst4; // nop
} __osExceptionVector;
void __osExceptionPreamble(void);
extern __osExceptionVector __osExceptionPreamble;
u64 osClockRate = OS_CLOCK_RATE;
s32 osViClock = VI_NTSC_CLOCK;
u32 __osShutdown = 0;
u32 __osShutdown = false;
OSHWIntr __OSGlobalIntMask = OS_IM_ALL;
u32 D_800145C0;
u32 __osFinalrom;
void __createSpeedParam(void) {
__Dom1SpeedParam.type = DEVICE_TYPE_INIT;
__Dom1SpeedParam.latency = HW_REG(PI_BSD_DOM1_LAT_REG, u32);
__Dom1SpeedParam.pulse = HW_REG(PI_BSD_DOM1_PWD_REG, u32);
__Dom1SpeedParam.pageSize = HW_REG(PI_BSD_DOM1_PGS_REG, u32);
__Dom1SpeedParam.relDuration = HW_REG(PI_BSD_DOM1_RLS_REG, u32);
__Dom1SpeedParam.latency = IO_READ(PI_BSD_DOM1_LAT_REG);
__Dom1SpeedParam.pulse = IO_READ(PI_BSD_DOM1_PWD_REG);
__Dom1SpeedParam.pageSize = IO_READ(PI_BSD_DOM1_PGS_REG);
__Dom1SpeedParam.relDuration = IO_READ(PI_BSD_DOM1_RLS_REG);
__Dom2SpeedParam.type = DEVICE_TYPE_INIT;
__Dom2SpeedParam.latency = HW_REG(PI_BSD_DOM2_LAT_REG, u32);
__Dom2SpeedParam.pulse = HW_REG(PI_BSD_DOM2_PWD_REG, u32);
__Dom2SpeedParam.pageSize = HW_REG(PI_BSD_DOM2_PGS_REG, u32);
__Dom2SpeedParam.relDuration = HW_REG(PI_BSD_DOM2_RLS_REG, u32);
__Dom2SpeedParam.latency = IO_READ(PI_BSD_DOM2_LAT_REG);
__Dom2SpeedParam.pulse = IO_READ(PI_BSD_DOM2_PWD_REG);
__Dom2SpeedParam.pageSize = IO_READ(PI_BSD_DOM2_PGS_REG);
__Dom2SpeedParam.relDuration = IO_READ(PI_BSD_DOM2_RLS_REG);
}
void __osInitialize_common(void) {
u32 sp2C;
u32 pifdata;
D_800145C0 = 1;
__osFinalrom = true;
__osSetSR(__osGetSR() | SR_CU1);
__osSetFpcCsr(FPCSR_FS | FPCSR_EV);
__osSetWatchLo(0x4900000);
__osSetWatchLo(0x04900000);
while (__osSiRawReadIo((void*)(PIF_RAM_START + 0x3C), &sp2C)) {
while (__osSiRawReadIo((void*)(PIF_RAM_END - 3), &pifdata)) {
;
}
while (__osSiRawWriteIo((void*)(PIF_RAM_END - 3), pifdata | 8)) {
;
}
while (__osSiRawWriteIo((void*)(PIF_RAM_START + 0x3C), sp2C | 8)) {
;
}
*(__osExceptionVector*)UT_VEC = __osExceptionPreamble; // TLB miss
*(__osExceptionVector*)XUT_VEC = __osExceptionPreamble; // XTLB miss
*(__osExceptionVector*)ECC_VEC = __osExceptionPreamble; // cache errors
*(__osExceptionVector*)E_VEC = __osExceptionPreamble; // general exceptions
*(struct_exceptionPreamble*)UT_VEC = *(struct_exceptionPreamble*)__osExceptionPreamble; // TLB miss
*(struct_exceptionPreamble*)XUT_VEC = *(struct_exceptionPreamble*)__osExceptionPreamble; // XTLB miss
*(struct_exceptionPreamble*)ECC_VEC = *(struct_exceptionPreamble*)__osExceptionPreamble; // cache errors
*(struct_exceptionPreamble*)E_VEC = *(struct_exceptionPreamble*)__osExceptionPreamble; // general exceptions
osWritebackDCache((void*)K0BASE, E_VEC - K0BASE + sizeof(struct_exceptionPreamble));
osInvalICache((void*)K0BASE, E_VEC - K0BASE + sizeof(struct_exceptionPreamble));
osWritebackDCache((void*)K0BASE, E_VEC - K0BASE + sizeof(__osExceptionVector));
osInvalICache((void*)K0BASE, E_VEC - K0BASE + sizeof(__osExceptionVector));
__createSpeedParam();
osUnmapTLBAll();
osMapTLBRdb();
osClockRate = (u64)((osClockRate * 3ll) / 4ull);
osClockRate = osClockRate * 3 / 4;
if (!osResetType) {
bzero(osAppNMIBuffer, sizeof(osAppNMIBuffer));
@@ -71,16 +70,16 @@ void __osInitialize_common(void) {
osViClock = VI_NTSC_CLOCK;
}
// Wait until there are no RCP interrupts
// If PreNMI is pending, loop until reset
if (__osGetCause() & CAUSE_IP5) {
while (true) {
;
}
}
HW_REG(AI_CONTROL_REG, u32) = 1;
HW_REG(AI_DACRATE_REG, u32) = 0x3FFF;
HW_REG(AI_BITRATE_REG, u32) = 0xF;
IO_WRITE(AI_CONTROL_REG, AI_CONTROL_DMA_ON);
IO_WRITE(AI_DACRATE_REG, AI_MAX_DAC_RATE - 1);
IO_WRITE(AI_BITRATE_REG, AI_MAX_BIT_RATE - 1);
}
void __osInitialize_autodetect(void) {
src/libultra/os/interrupt.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
#include "ultra64/thread.h"
.set noat
src/libultra/os/invaldcache.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noat
.set noreorder
src/libultra/os/invalicache.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noat
.set noreorder
src/libultra/os/maptlbrdb.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
#include "ultra64/rdb.h"
.set noreorder
src/libultra/os/probetlb.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noat
.set noreorder
src/libultra/os/setcompare.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noreorder
src/libultra/os/setfpccsr.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noreorder
src/libultra/os/setintmask.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
#include "ultra64/rcp.h"
#include "ultra64/exception.h"
src/libultra/os/setsr.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noreorder
src/libultra/os/setwatchlo.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noreorder
src/libultra/os/unmaptlball.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noreorder
src/libultra/os/writebackdcache.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noat
.set noreorder
src/libultra/os/writebackdcacheall.s
+1 -1
View File
@@ -1,5 +1,5 @@
#include "ultra64/asm.h"
#include "ultra64/r4300.h"
#include "ultra64/R4300.h"
.set noat
.set noreorder