mirror of
https://github.com/zeldaret/oot
synced 2026-08-04 09:09:22 -04:00
Tharo
da4a1f661c
* [rsp] Introduce microcode build process, disassemble and build both rspboot versions * Suggested changes * Check-in tool for generating armips.cpp from upstream sources, regen armips.cpp against a newer commit * License armips_gen.py, add notice that armips.cpp is automatically generated * Qualify comment with X105 * Clarify the assumed purpose of rspboot releasing SP_SEMAPHORE
128 lines
4.0 KiB
ArmAsm
128 lines
4.0 KiB
ArmAsm
/**
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* @file rspboot.s
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*
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* This RSP microcode program acts as a loader for other microcodes. This ucode:
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* - (Optionally) Waits for the RDP to go idle
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* - Loads a ucode's .data section to the start of DMEM
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* - Loads a ucode's .text section to RSPBOOT_ENTRYPOINT
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* - Jumps to the loaded ucode
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*
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* Along the way it also checks whether the task scheduler running on the CPU has
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* requested a yield and, if so, halts the RSP.
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*/
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.rsp
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#include "rcp.h"
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#include "sptask.h"
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#include "rspboot.h"
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// $1 is expected to contain the OSTask pointer by many ucodes
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OSTask_reg equ $1
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.create CODE_FILE, IMEM_START_VA
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entry:
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j start
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addi OSTask_reg, $zero, OSTASK_ADDR
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load_ucode_text_and_enter:
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// Read the ucode .text DRAM address from the OSTask
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lw $2, OS_TASK_OFF_UCODE(OSTask_reg)
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// Always DMA as much as will fit in IMEM to RSPBOOT_ENTRYPOINT
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addi $3, $zero, (IMEM_SIZE - (RSPBOOT_ENTRYPOINT - IMEM_START)) - 1
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addi $7, $zero, RSPBOOT_ENTRYPOINT
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// Start the DMA, assuming it's not busy having waited for it while
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// loading the ucode .data
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mtc0 $7, SP_MEM_ADDR
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mtc0 $2, SP_DRAM_ADDR
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mtc0 $3, SP_RD_LEN
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// Wait for .text to load
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@@while_dma_busy:
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mfc0 $4, SP_DMA_BUSY
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bnez $4, @@while_dma_busy
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nop
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// Check yield one more time
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jal check_yield
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nop
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// Release the semaphore just in case a prior task or the CPU failed to release it
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// and jump to the ucode that was loaded
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jr $7
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mtc0 $zero, SP_SEMAPHORE
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check_yield:
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// Check the YIELD bit in SP_STATUS: if it is set enter yield_break,
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// otherwise return
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mfc0 $8, SP_STATUS
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andi $8, $8, SP_STATUS_YIELD
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bnez $8, yield_break
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nop
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// No need to yield, return to caller
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jr $ra
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yield_break:
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// Release the semaphore (note this happens even if there is no yield as it
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// is in the delay slot of the above instruction)
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mtc0 $zero, SP_SEMAPHORE
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// Update the RSP status to signal task complete and yielded, clear the
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// yield request
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li $8, (SP_SET_TASKDONE | SP_SET_YIELDED | SP_CLR_YIELD)
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mtc0 $8, SP_STATUS
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// Halt the RSP
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break
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nop
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// Everything up to here needs to end before RSPBOOT_ENTRYPOINT so it's not overwritten by the .text loader
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.if . > RSPBOOT_ENTRYPOINT_VA
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.error "Not enough reserved IMEM for .text bootstrapper"
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.endif
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start:
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// Check the DP_WAIT flag, if not set branch straight to loading ucode .data
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lw $2, OS_TASK_OFF_FLAGS(OSTask_reg)
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andi $2, $2, OS_TASK_DP_WAIT
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beqz $2, load_ucode_data
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nop
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// If the flag is set, we need to wait for the RDP to become idle just in case
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// it's still reading commands from DMEM in XBUS mode. First check if we need
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// to yield to another task.
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jal check_yield
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nop
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// Now poll RDP DMA busy
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mfc0 $2, DPC_STATUS
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andi $2, $2, DPC_STATUS_DMA_BUSY
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// If the RDP is still busy, check yield again. This will return to the same
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// return address as the above jal since $ra has not been clobbered since then.
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bgtz $2, check_yield
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nop
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load_ucode_data:
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// Load the DRAM address and size of the ucode .data from the OSTask
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lw $2, OS_TASK_OFF_UDATA(OSTask_reg)
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lw $3, OS_TASK_OFF_UDATA_SZ(OSTask_reg)
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addi $3, $3, -1
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// Wait for a DMA slot to free
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@@while_dma_full:
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mfc0 $30, SP_DMA_FULL
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bnez $30, @@while_dma_full
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nop
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// Submit the DMA transfer for the ucode .data, targeting the start of DMEM
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mtc0 $zero, SP_MEM_ADDR
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mtc0 $2, SP_DRAM_ADDR
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mtc0 $3, SP_RD_LEN
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// Wait for the transfer to complete
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@@while_dma_busy:
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mfc0 $4, SP_DMA_BUSY
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bnez $4, @@while_dma_busy
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nop
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// Check whether we need to yield, does not return if we do
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jal check_yield
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nop
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// Jump to ucode .text loader
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j load_ucode_text_and_enter
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nop
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.align 0x10
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.if . > IMEM_END_VA
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.error "Not enough room in IMEM"
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.endif
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.close
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