From fa26127a43a411e600ef9ae22e8824ce048bf7cb Mon Sep 17 00:00:00 2001
From: Aetias <aetias@outlook.com>
Date: Sun, 4 Feb 2024 14:32:16 +0100
Subject: [PATCH] Match USA location of `func_ov00_020d59f0` and others

---
 asm/ov00/include/ov00_020d1870.inc            |   7 -
 .../{ov00_020d5458.inc => ov00_020d5284.inc}  |   7 +
 asm/ov00/ov00_020d1870.s                      | 144 ----
 asm/ov00/{ov00_020d5458.s => ov00_020d5284.s} | 670 ++++--------------
 asm/ov00/ov00_020d59f0.inc                    | 515 ++++++++++++++
 tools/lcf.py                                  |   2 +-
 6 files changed, 677 insertions(+), 668 deletions(-)
 rename asm/ov00/include/{ov00_020d5458.inc => ov00_020d5284.inc} (96%)
 rename asm/ov00/{ov00_020d5458.s => ov00_020d5284.s} (91%)
 create mode 100644 asm/ov00/ov00_020d59f0.inc

diff --git a/asm/ov00/include/ov00_020d1870.inc b/asm/ov00/include/ov00_020d1870.inc
index e0fd872e..0cd08f79 100644
--- a/asm/ov00/include/ov00_020d1870.inc
+++ b/asm/ov00/include/ov00_020d1870.inc
@@ -348,10 +348,3 @@
 .extern func_020078d8
 .extern _ZN9SysObjectnwEmPjj
 .extern func_ov00_020d556c
-.extern data_027e0fe0
-.extern func_ov00_020a956c
-.extern data_ov00_020e92c8
-.extern func_ov00_020a9998
-.extern func_ov00_020a19fc
-.extern data_027e0f88
-.extern data_027e0f78
diff --git a/asm/ov00/include/ov00_020d5458.inc b/asm/ov00/include/ov00_020d5284.inc
similarity index 96%
rename from asm/ov00/include/ov00_020d5458.inc
rename to asm/ov00/include/ov00_020d5284.inc
index 53da0759..1a3a18c0 100644
--- a/asm/ov00/include/ov00_020d5458.inc
+++ b/asm/ov00/include/ov00_020d5284.inc
@@ -234,3 +234,10 @@
 .extern data_027e0ce0
 .extern func_0202a5c0
 .extern _ZN9SysObjectdlEPv
+.extern data_027e0fe0
+.extern func_ov00_020a956c
+.extern data_ov00_020e92c8
+.extern func_ov00_020a9998
+.extern func_ov00_020a19fc
+.extern data_027e0f88
+.extern data_027e0f78
diff --git a/asm/ov00/ov00_020d1870.s b/asm/ov00/ov00_020d1870.s
index 64c5053c..cc256a47 100644
--- a/asm/ov00/ov00_020d1870.s
+++ b/asm/ov00/ov00_020d1870.s
@@ -4532,150 +4532,6 @@ _020d5278:
 	bx lr
 	arm_func_end func_ov00_020d5204
 
-	.global func_ov00_020d5284
-	arm_func_start func_ov00_020d5284
-func_ov00_020d5284: ; 0x020d5284
-	stmdb sp!, {r3, lr}
-	ldr r1, _020d52b0 ; =data_027e0fe0
-	ldr r0, _020d52b4 ; =0x00000488
-	ldr r1, [r1]
-	mov r2, #4
-	ldr r1, [r1]
-	bl _ZN9SysObjectnwEmPjj
-	cmp r0, #0
-	ldmeqia sp!, {r3, pc}
-	bl func_ov00_020d556c
-	ldmia sp!, {r3, pc}
-	.align 2, 0
-	arm_func_end func_ov00_020d5284
-_020d52b0: .word data_027e0fe0
-_020d52b4: .word 0x00000488
-
-	.global func_ov00_020d52b8
-	arm_func_start func_ov00_020d52b8
-func_ov00_020d52b8: ; 0x020d52b8
-	stmdb sp!, {r4, lr}
-	mov r1, #0
-	mov r4, r0
-	blx func_ov00_020a956c
-	ldr r0, _020d52e0 ; =data_ov00_020e92c8
-	mov r1, #0
-	str r0, [r4]
-	mov r0, r4
-	strb r1, [r4, #0x5c]
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-	arm_func_end func_ov00_020d52b8
-_020d52e0: .word data_ov00_020e92c8
-
-	.global func_ov00_020d52e4
-	arm_func_start func_ov00_020d52e4
-func_ov00_020d52e4: ; 0x020d52e4
-	ldr ip, _020d52f4 ; =func_ov00_020a9998
-	mov r1, #4
-	mov r2, #2
-	bx ip
-	.align 2, 0
-	arm_func_end func_ov00_020d52e4
-_020d52f4: .word func_ov00_020a9998
-
-	.global func_ov00_020d52f8
-	arm_func_start func_ov00_020d52f8
-func_ov00_020d52f8: ; 0x020d52f8
-	stmdb sp!, {r3, r4, r5, r6, r7, lr}
-	sub sp, sp, #8
-	ldr r4, [r1, #0xb0]
-	ldr r1, [r4, #0xc]
-	bic r1, r1, #0x3f000000
-	str r1, [r4, #0xc]
-	ldrb r0, [r0, #0x5c]
-	cmp r0, #0
-	addeq sp, sp, #8
-	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
-	ldr r0, _020d5450 ; =data_027e0f88
-	mov r1, #0
-	ldr r0, [r0]
-	bl func_ov00_020a19fc
-	ldrh r1, [r0, #2]
-	ldrh r2, [r0]
-	ldrh r0, [r0, #4]
-	strh r1, [sp, #2]
-	ldrsh r3, [sp, #2]
-	strh r0, [sp, #4]
-	strh r2, [sp]
-	cmp r3, #0
-	rsblt r0, r3, #0
-	movlt r0, r0, lsl #0x10
-	movlt r3, r0, asr #0x10
-	ldr r0, _020d5454 ; =data_027e0f78
-	mov ip, #0
-	ldr r0, [r0]
-	ldrh r5, [r0, #0x1e]
-	ldrh r2, [r0, #0x1c]
-	and r1, r5, #0x3e0
-	and r0, r5, #0x7c00
-	mov r5, r5, lsl #0x1b
-	mov r1, r1, asr #0x5
-	mov r0, r0, asr #0xa
-	mov r1, r1, lsl #0xc
-	mov r5, r5, lsr #0xf
-	mov lr, r0, lsl #0xc
-	smull r5, r0, r3, r5
-	adds r5, r5, #0x800
-	smull r1, r6, r3, r1
-	adc r0, r0, #0
-	adds r7, r1, #0x800
-	mov r1, r5, lsr #0xc
-	smull r5, lr, r3, lr
-	adc r3, r6, #0
-	mov r6, r7, lsr #0xc
-	adds r5, r5, #0x800
-	orr r6, r6, r3, lsl #20
-	adc r3, lr, #0
-	mov r5, r5, lsr #0xc
-	orr r5, r5, r3, lsl #20
-	orr r1, r1, r0, lsl #20
-	and r3, r2, #0x1f
-	adds lr, r3, r1, asr #12
-	and r7, r2, #0x3e0
-	mov r3, r6, asr #0xc
-	and r1, r2, #0x7c00
-	mov r0, r5, asr #0xc
-	add r2, r3, r7, asr #5
-	add r3, r0, r1, asr #10
-	movmi lr, ip
-	bmi _020d53fc
-	cmp lr, #0x1f
-	movgt lr, #0x1f
-_020d53fc:
-	cmp r2, #0
-	movlt r2, #0
-	blt _020d5410
-	cmp r2, #0x1f
-	movgt r2, #0x1f
-_020d5410:
-	cmp r3, #0
-	movlt r3, #0
-	blt _020d5424
-	cmp r3, #0x1f
-	movgt r3, #0x1f
-_020d5424:
-	orr r1, lr, r2, lsl #5
-	mov r0, #0x8000
-	ldr r2, [r4, #4]
-	rsb r0, r0, #0
-	orr r1, r1, r3, lsl #10
-	and r2, r2, r0
-	mov r0, r1, lsl #0x10
-	orr r0, r2, r0, lsr #16
-	str r0, [r4, #4]
-	add sp, sp, #8
-	ldmia sp!, {r3, r4, r5, r6, r7, pc}
-	.align 2, 0
-	arm_func_end func_ov00_020d52f8
-_020d5450: .word data_027e0f88
-_020d5454: .word data_027e0f78
-
     .rodata
 	.global data_ov00_020df28c
 data_ov00_020df28c: ; 0x020df28c
diff --git a/asm/ov00/ov00_020d5458.s b/asm/ov00/ov00_020d5284.s
similarity index 91%
rename from asm/ov00/ov00_020d5458.s
rename to asm/ov00/ov00_020d5284.s
index 49d1caa7..b12c9a55 100644
--- a/asm/ov00/ov00_020d5458.s
+++ b/asm/ov00/ov00_020d5284.s
@@ -1,8 +1,157 @@
     .include "macros/function.inc"
-    .include "ov00/include/ov00_020d5458.inc"
+    .include "ov00/include/ov00_020d5284.inc"
     
     .text
 
+.ifdef USA
+; This was moved down in EUR
+.include "ov00/ov00_020d59f0.inc"
+.endif
+
+	.global func_ov00_020d5284
+	arm_func_start func_ov00_020d5284
+func_ov00_020d5284: ; 0x020d5284
+	stmdb sp!, {r3, lr}
+	ldr r1, _020d52b0 ; =data_027e0fe0
+	ldr r0, _020d52b4 ; =0x00000488
+	ldr r1, [r1]
+	mov r2, #4
+	ldr r1, [r1]
+	bl _ZN9SysObjectnwEmPjj
+	cmp r0, #0
+	ldmeqia sp!, {r3, pc}
+	bl func_ov00_020d556c
+	ldmia sp!, {r3, pc}
+	.align 2, 0
+	arm_func_end func_ov00_020d5284
+_020d52b0: .word data_027e0fe0
+_020d52b4: .word 0x00000488
+
+	.global func_ov00_020d52b8
+	arm_func_start func_ov00_020d52b8
+func_ov00_020d52b8: ; 0x020d52b8
+	stmdb sp!, {r4, lr}
+	mov r1, #0
+	mov r4, r0
+	blx func_ov00_020a956c
+	ldr r0, _020d52e0 ; =data_ov00_020e92c8
+	mov r1, #0
+	str r0, [r4]
+	mov r0, r4
+	strb r1, [r4, #0x5c]
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+	arm_func_end func_ov00_020d52b8
+_020d52e0: .word data_ov00_020e92c8
+
+	.global func_ov00_020d52e4
+	arm_func_start func_ov00_020d52e4
+func_ov00_020d52e4: ; 0x020d52e4
+	ldr ip, _020d52f4 ; =func_ov00_020a9998
+	mov r1, #4
+	mov r2, #2
+	bx ip
+	.align 2, 0
+	arm_func_end func_ov00_020d52e4
+_020d52f4: .word func_ov00_020a9998
+
+	.global func_ov00_020d52f8
+	arm_func_start func_ov00_020d52f8
+func_ov00_020d52f8: ; 0x020d52f8
+	stmdb sp!, {r3, r4, r5, r6, r7, lr}
+	sub sp, sp, #8
+	ldr r4, [r1, #0xb0]
+	ldr r1, [r4, #0xc]
+	bic r1, r1, #0x3f000000
+	str r1, [r4, #0xc]
+	ldrb r0, [r0, #0x5c]
+	cmp r0, #0
+	addeq sp, sp, #8
+	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
+	ldr r0, _020d5450 ; =data_027e0f88
+	mov r1, #0
+	ldr r0, [r0]
+	bl func_ov00_020a19fc
+	ldrh r1, [r0, #2]
+	ldrh r2, [r0]
+	ldrh r0, [r0, #4]
+	strh r1, [sp, #2]
+	ldrsh r3, [sp, #2]
+	strh r0, [sp, #4]
+	strh r2, [sp]
+	cmp r3, #0
+	rsblt r0, r3, #0
+	movlt r0, r0, lsl #0x10
+	movlt r3, r0, asr #0x10
+	ldr r0, _020d5454 ; =data_027e0f78
+	mov ip, #0
+	ldr r0, [r0]
+	ldrh r5, [r0, #0x1e]
+	ldrh r2, [r0, #0x1c]
+	and r1, r5, #0x3e0
+	and r0, r5, #0x7c00
+	mov r5, r5, lsl #0x1b
+	mov r1, r1, asr #0x5
+	mov r0, r0, asr #0xa
+	mov r1, r1, lsl #0xc
+	mov r5, r5, lsr #0xf
+	mov lr, r0, lsl #0xc
+	smull r5, r0, r3, r5
+	adds r5, r5, #0x800
+	smull r1, r6, r3, r1
+	adc r0, r0, #0
+	adds r7, r1, #0x800
+	mov r1, r5, lsr #0xc
+	smull r5, lr, r3, lr
+	adc r3, r6, #0
+	mov r6, r7, lsr #0xc
+	adds r5, r5, #0x800
+	orr r6, r6, r3, lsl #20
+	adc r3, lr, #0
+	mov r5, r5, lsr #0xc
+	orr r5, r5, r3, lsl #20
+	orr r1, r1, r0, lsl #20
+	and r3, r2, #0x1f
+	adds lr, r3, r1, asr #12
+	and r7, r2, #0x3e0
+	mov r3, r6, asr #0xc
+	and r1, r2, #0x7c00
+	mov r0, r5, asr #0xc
+	add r2, r3, r7, asr #5
+	add r3, r0, r1, asr #10
+	movmi lr, ip
+	bmi _020d53fc
+	cmp lr, #0x1f
+	movgt lr, #0x1f
+_020d53fc:
+	cmp r2, #0
+	movlt r2, #0
+	blt _020d5410
+	cmp r2, #0x1f
+	movgt r2, #0x1f
+_020d5410:
+	cmp r3, #0
+	movlt r3, #0
+	blt _020d5424
+	cmp r3, #0x1f
+	movgt r3, #0x1f
+_020d5424:
+	orr r1, lr, r2, lsl #5
+	mov r0, #0x8000
+	ldr r2, [r4, #4]
+	rsb r0, r0, #0
+	orr r1, r1, r3, lsl #10
+	and r2, r2, r0
+	mov r0, r1, lsl #0x10
+	orr r0, r2, r0, lsr #16
+	str r0, [r4, #4]
+	add sp, sp, #8
+	ldmia sp!, {r3, r4, r5, r6, r7, pc}
+	.align 2, 0
+	arm_func_end func_ov00_020d52f8
+_020d5450: .word data_027e0f88
+_020d5454: .word data_027e0f78
+
 	.global func_ov00_020d5458
 	arm_func_start func_ov00_020d5458
 func_ov00_020d5458: ; 0x020d5458
@@ -439,521 +588,10 @@ func_ov00_020d59d4: ; 0x020d59d4
 	ldmia sp!, {r4, pc}
 	arm_func_end func_ov00_020d59d4
 
-	.global func_ov00_020d59f0
-	arm_func_start func_ov00_020d59f0
-func_ov00_020d59f0: ; 0x020d59f0
-	stmdb sp!, {r3, lr}
-	ldr lr, [r0]
-	ldr r3, [r1]
-	sub r3, r3, lr
-	mul ip, r3, r2
-	add r3, ip, #0x800
-	add r3, lr, r3, asr #12
-	str r3, [r0]
-	ldr lr, [r0, #4]
-	ldr r3, [r1, #4]
-	sub r3, r3, lr
-	mul ip, r3, r2
-	add r3, ip, #0x800
-	add r3, lr, r3, asr #12
-	str r3, [r0, #4]
-	ldr lr, [r0, #8]
-	ldr r3, [r1, #8]
-	sub r3, r3, lr
-	mul ip, r3, r2
-	add r3, ip, #0x800
-	add r3, lr, r3, asr #12
-	str r3, [r0, #8]
-	ldr r3, [r0, #0xc]
-	ldr r1, [r1, #0xc]
-	sub r1, r1, r3
-	mul r2, r1, r2
-	add r1, r2, #0x800
-	add r1, r3, r1, asr #12
-	str r1, [r0, #0xc]
-	ldmia sp!, {r3, pc}
-	arm_func_end func_ov00_020d59f0
-
-	.global func_ov00_020d5a68
-	arm_func_start func_ov00_020d5a68
-func_ov00_020d5a68: ; 0x020d5a68
-	stmdb sp!, {r4, r5, r6, r7, r8, lr}
-	sub sp, sp, #0x20
-	mov r8, r0
-	ldr r3, [r8]
-	mov r7, r2
-	str r3, [sp, #0x10]
-	ldr r3, [r8, #4]
-	add r0, sp, #0x10
-	str r3, [sp, #0x14]
-	ldr r2, [r8, #8]
-	str r2, [sp, #0x18]
-	ldr r2, [r8, #0xc]
-	str r2, [sp, #0x1c]
-	ldr r2, [r1]
-	str r2, [sp]
-	ldr r2, [r1, #4]
-	str r2, [sp, #4]
-	ldr r2, [r1, #8]
-	str r2, [sp, #8]
-	ldr r1, [r1, #0xc]
-	str r1, [sp, #0xc]
-	bl func_ov00_020d5c54
-	add r0, sp, #0
-	bl func_ov00_020d5c54
-	ldr r1, [sp, #0x14]
-	ldr r0, [sp, #4]
-	ldr r2, [sp, #0x10]
-	smull r4, r3, r1, r0
-	ldr r0, [sp]
-	ldr r1, [sp, #0x18]
-	smlal r4, r3, r2, r0
-	ldr r0, [sp, #8]
-	ldr r2, [sp, #0x1c]
-	smlal r4, r3, r1, r0
-	ldr r0, [sp, #0xc]
-	mov r5, #0
-	smlal r4, r3, r2, r0
-	adds r1, r4, #0x800
-	adc r0, r3, #0
-	mov r4, r1, lsr #0xc
-	orrs r4, r4, r0, lsl #20
-	rsbmi r4, r4, #0
-	rsb r0, r4, #0x1000
-	movmi r5, #1
-	cmp r0, #0x80000000
-	rsble r4, r7, #0x1000
-	ble _020d5bac
-	mul r0, r4, r4
-	add r0, r0, #0x800
-	mov r0, r0, asr #0xc
-	sub r0, r0, #0x1000
-	bl func_01ff9958
-	mov r1, r0
-	mov r0, r4
-	bl func_01ff9f3c
-	mov r4, r0
-	mov r0, #0x1000
-	bl func_020037b8
-	add r4, r4, r0, lsl #1
-	rsb r0, r7, #0x1000
-	mul r1, r0, r4
-	mov r2, r4, asr #0x4
-	add r0, r1, #0x800
-	mov r0, r0, asr #0x10
-	ldr r1, _020d5c4c ; =data_02050f54
-	mov r2, r2, lsl #0x2
-	mov r0, r0, lsl #0x2
-	ldrsh r6, [r1, r2]
-	ldrsh r0, [r1, r0]
-	mov r1, r6
-	bl func_01ff98e0
-	mul r1, r7, r4
-	add r1, r1, #0x800
-	mov r1, r1, asr #0x10
-	ldr r2, _020d5c4c ; =data_02050f54
-	mov r3, r1, lsl #0x2
-	mov r1, r6
-	mov r4, r0
-	ldrsh r0, [r2, r3]
-	bl func_01ff98e0
-	mov r7, r0
-_020d5bac:
-	ldr r0, [sp]
-	cmp r5, #0
-	rsbne r7, r7, #0
-	ldr r1, [sp, #0x10]
-	mul r0, r7, r0
-	mul r1, r4, r1
-	add r0, r0, #0x800
-	add r1, r1, #0x800
-	mov r0, r0, asr #0xc
-	add r0, r0, r1, asr #12
-	str r0, [r8]
-	ldr r0, [sp, #4]
-	ldr r1, [sp, #0x14]
-	mul r0, r7, r0
-	mul r1, r4, r1
-	add r0, r0, #0x800
-	add r1, r1, #0x800
-	mov r0, r0, asr #0xc
-	add r0, r0, r1, asr #12
-	str r0, [r8, #4]
-	ldr r0, [sp, #8]
-	ldr r1, [sp, #0x18]
-	mul r0, r7, r0
-	mul r1, r4, r1
-	add r0, r0, #0x800
-	add r1, r1, #0x800
-	mov r0, r0, asr #0xc
-	add r0, r0, r1, asr #12
-	str r0, [r8, #8]
-	ldr r0, [sp, #0xc]
-	ldr r1, [sp, #0x1c]
-	mul r0, r7, r0
-	mul r1, r4, r1
-	add r0, r0, #0x800
-	add r1, r1, #0x800
-	mov r0, r0, asr #0xc
-	add r0, r0, r1, asr #12
-	str r0, [r8, #0xc]
-	add sp, sp, #0x20
-	ldmia sp!, {r4, r5, r6, r7, r8, pc}
-	.align 2, 0
-	arm_func_end func_ov00_020d5a68
-_020d5c4c: .word data_02050f54
-
-	.global func_ov00_020d5c50
-	arm_func_start func_ov00_020d5c50
-func_ov00_020d5c50: ; 0x020d5c50
-	bx lr
-	arm_func_end func_ov00_020d5c50
-
-	.global func_ov00_020d5c54
-	arm_func_start func_ov00_020d5c54
-func_ov00_020d5c54: ; 0x020d5c54
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	ldr r1, [r4, #4]
-	ldr r2, [r4]
-	mul r0, r1, r1
-	mla r0, r2, r2, r0
-	ldr r2, [r4, #8]
-	ldr r1, [r4, #0xc]
-	mla r0, r2, r2, r0
-	mla r0, r1, r1, r0
-	mov r0, r0, asr #0xc
-	bl func_01ff998c
-	ldr r1, [r4]
-	mul r1, r0, r1
-	add r1, r1, #0x800
-	mov r1, r1, asr #0xc
-	str r1, [r4]
-	ldr r1, [r4, #4]
-	mul r1, r0, r1
-	add r1, r1, #0x800
-	mov r1, r1, asr #0xc
-	str r1, [r4, #4]
-	ldr r1, [r4, #8]
-	mul r1, r0, r1
-	add r1, r1, #0x800
-	mov r1, r1, asr #0xc
-	str r1, [r4, #8]
-	ldr r1, [r4, #0xc]
-	mul r1, r0, r1
-	add r0, r1, #0x800
-	mov r0, r0, asr #0xc
-	str r0, [r4, #0xc]
-	ldmia sp!, {r4, pc}
-	arm_func_end func_ov00_020d5c54
-
-	.global func_ov00_020d5cd8
-	arm_func_start func_ov00_020d5cd8
-func_ov00_020d5cd8: ; 0x020d5cd8
-	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
-	ldr r3, [r0, #4]
-	ldr r2, [r0, #8]
-	ldr r4, [r0, #0xc]
-	ldr lr, [r0]
-	mul r0, r3, r3
-	mul r5, r2, r2
-	mul ip, r4, r2
-	mul r7, lr, r3
-	mul sb, r4, r3
-	mul r6, lr, r2
-	mul r8, lr, lr
-	add sl, r0, #0x800
-	mul r0, r4, lr
-	add lr, r5, #0x800
-	mul r5, r2, r3
-	mov r4, sl, asr #0xc
-	add r3, ip, #0x800
-	add r2, r4, lr, asr #12
-	add ip, sb, #0x800
-	mov r2, r2, lsl #0x1
-	rsb r2, r2, #0x1000
-	add r8, r8, #0x800
-	mov sb, lr, asr #0xc
-	add lr, r0, #0x800
-	add r0, sb, r8, asr #12
-	mov r0, r0, lsl #0x1
-	add r4, r4, r8, asr #12
-	mov r4, r4, lsl #0x1
-	add r7, r7, #0x800
-	mov r3, r3, asr #0xc
-	add r8, r3, r7, asr #12
-	rsb r7, r3, r7, asr #12
-	add sb, r6, #0x800
-	mov r3, ip, asr #0xc
-	rsb r6, r3, sb, asr #12
-	add r3, r3, sb, asr #12
-	str r2, [r1]
-	mov r2, r8, lsl #0x1
-	str r2, [r1, #4]
-	mov r2, r6, lsl #0x1
-	str r2, [r1, #8]
-	mov r6, r7, lsl #0x1
-	add r7, r5, #0x800
-	mov r2, lr, asr #0xc
-	add r5, r2, r7, asr #12
-	rsb r2, r2, r7, asr #12
-	str r6, [r1, #0xc]
-	rsb r0, r0, #0x1000
-	str r0, [r1, #0x10]
-	mov r0, r5, lsl #0x1
-	str r0, [r1, #0x14]
-	mov r0, r3, lsl #0x1
-	str r0, [r1, #0x18]
-	mov r0, r2, lsl #0x1
-	str r0, [r1, #0x1c]
-	rsb r0, r4, #0x1000
-	str r0, [r1, #0x20]
-	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
-	arm_func_end func_ov00_020d5cd8
-
-	.global func_ov00_020d5dc4
-	arm_func_start func_ov00_020d5dc4
-func_ov00_020d5dc4: ; 0x020d5dc4
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
-	ldr r4, [r0]
-	ldr r5, [r1]
-	ldmib r1, {r3, fp, lr}
-	ldmib r0, {r2, sl, ip}
-	mul sb, r4, lr
-	mul r1, ip, r5
-	mul r6, r2, fp
-	add sb, sb, #0x800
-	mul r7, r2, lr
-	mul r8, ip, r3
-	add r7, r7, #0x800
-	add r1, r1, #0x800
-	mov sb, sb, asr #0xc
-	add sb, sb, r1, asr #12
-	add r6, r6, #0x800
-	add r6, sb, r6, asr #12
-	mul sb, sl, r3
-	add sb, sb, #0x800
-	sub r6, r6, sb, asr #12
-	mul sb, sl, r5
-	mul r1, sl, lr
-	str r6, [r0]
-	add r8, r8, #0x800
-	mov r7, r7, asr #0xc
-	add r7, r7, r8, asr #12
-	add sb, sb, #0x800
-	add sb, r7, sb, asr #12
-	mul r7, r4, r3
-	mul r3, r2, r3
-	mul r6, ip, fp
-	mul lr, ip, lr
-	mul ip, r4, r5
-	mul r8, r4, fp
-	mul r4, r2, r5
-	mul r2, sl, fp
-	add sl, r1, #0x800
-	add r1, r8, #0x800
-	sub r1, sb, r1, asr #12
-	add r5, ip, #0x800
-	add r8, r6, #0x800
-	str r1, [r0, #4]
-	mov r6, sl, asr #0xc
-	add sb, r7, #0x800
-	add r7, r6, r8, asr #12
-	add r8, r7, sb, asr #12
-	add r6, lr, #0x800
-	mov r5, r5, asr #0xc
-	add r7, r4, #0x800
-	rsb r4, r5, r6, asr #12
-	add r3, r3, #0x800
-	sub r5, r8, r7, asr #12
-	sub r3, r4, r3, asr #12
-	add r1, r2, #0x800
-	str r5, [r0, #8]
-	sub r1, r3, r1, asr #12
-	str r1, [r0, #0xc]
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	arm_func_end func_ov00_020d5dc4
-
-	.global func_ov00_020d5eac
-	arm_func_start func_ov00_020d5eac
-func_ov00_020d5eac: ; 0x020d5eac
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
-	ldr r5, [r1]
-	ldr r4, [r0, #0xc]
-	ldr r2, [r0, #8]
-	ldmib r1, {r3, fp, lr}
-	ldmia r0, {r6, ip}
-	mul sl, r5, r4
-	mul r1, lr, r6
-	mul r7, r3, r2
-	add sl, sl, #0x800
-	mul r8, r3, r4
-	mul sb, lr, ip
-	add r8, r8, #0x800
-	add r1, r1, #0x800
-	mov sl, sl, asr #0xc
-	add sl, sl, r1, asr #12
-	add r7, r7, #0x800
-	add r7, sl, r7, asr #12
-	mul sl, fp, ip
-	add sl, sl, #0x800
-	sub r7, r7, sl, asr #12
-	mul sl, fp, r6
-	mul r1, fp, r4
-	str r7, [r0]
-	mul r4, lr, r4
-	mul r7, lr, r2
-	mul lr, r5, r6
-	mul r6, r3, r6
-	add sb, sb, #0x800
-	mov r8, r8, asr #0xc
-	add r8, r8, sb, asr #12
-	add sl, sl, #0x800
-	mul sb, r5, r2
-	add sl, r8, sl, asr #12
-	mul r8, r5, ip
-	mul r5, r3, ip
-	mul r2, fp, r2
-	add fp, r1, #0x800
-	add r1, sb, #0x800
-	add r3, lr, #0x800
-	add sb, r7, #0x800
-	mov r7, fp, asr #0xc
-	sub r1, sl, r1, asr #12
-	str r1, [r0, #4]
-	add r8, r8, #0x800
-	add r7, r7, sb, asr #12
-	add r4, r4, #0x800
-	mov r3, r3, asr #0xc
-	rsb r4, r3, r4, asr #12
-	add r3, r5, #0x800
-	add r7, r7, r8, asr #12
-	add r6, r6, #0x800
-	sub r5, r7, r6, asr #12
-	sub r3, r4, r3, asr #12
-	add r1, r2, #0x800
-	str r5, [r0, #8]
-	sub r1, r3, r1, asr #12
-	str r1, [r0, #0xc]
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	arm_func_end func_ov00_020d5eac
-
-	.global func_ov00_020d5f98
-	arm_func_start func_ov00_020d5f98
-func_ov00_020d5f98: ; 0x020d5f98
-	stmdb sp!, {r3, r4, r5, r6, lr}
-	sub sp, sp, #0x24
-	ldr r3, _020d6134 ; =data_ov00_020ee6e8
-	mov r6, r0
-	ldr r0, [r3]
-	mov r5, r1
-	mov r4, r2
-	tst r0, #1
-	bne _020d5ff8
-	ldr r3, _020d6138 ; =data_ov00_020e9308
-	mov ip, #0
-	str ip, [r3]
-	str ip, [r3, #4]
-	ldr r0, _020d613c ; =data_ov00_020e9308
-	ldr r1, _020d6140 ; =func_ov00_020d5c50
-	ldr r2, _020d6144 ; =data_ov00_020ee6ec
-	str ip, [r3, #8]
-	mov ip, #0x1000
-	str ip, [r3, #0xc]
-	bl func_0204f8d4
-	ldr r0, _020d6134 ; =data_ov00_020ee6e8
-	ldr r1, [r0]
-	orr r1, r1, #1
-	str r1, [r0]
-_020d5ff8:
-	ldmia r4, {r0, r1, r2}
-	add r4, sp, #0x18
-	stmia r4, {r0, r1, r2}
-	add r3, sp, #0xc
-	ldmia r5, {r0, r1, r2}
-	stmia r3, {r0, r1, r2}
-	mov r0, r4
-	bl func_01fffb4c
-	cmp r0, #0
-	beq _020d6108
-	add r0, sp, #0xc
-	bl func_01fffb4c
-	cmp r0, #0
-	beq _020d6108
-	add r0, sp, #0xc
-	mov r1, r4
-	bl func_01ff9c2c
-	add r0, r0, #0x1000
-	mov r0, r0, lsl #0x1
-	bl func_01ff9958
-	mov r4, r0
-	add r0, sp, #0xc
-	add r1, sp, #0x18
-	add r2, sp, #0
-	bl func_01ff9c68
-	cmp r4, #0
-	rsblt r0, r4, #0
-	movge r0, r4
-	cmp r0, #4
-	ble _020d60dc
-	mov r0, r4
-	bl func_01ff991c
-	ldr r2, [sp]
-	mov r1, r4, asr #0x1
-	smull r4, r3, r2, r0
-	adds r4, r4, #0x800
-	adc r2, r3, #0
-	mov r3, r4, lsr #0xc
-	orr r3, r3, r2, lsl #20
-	str r3, [r6]
-	ldr r2, [sp, #4]
-	smull r4, r3, r2, r0
-	adds r4, r4, #0x800
-	adc r2, r3, #0
-	mov r3, r4, lsr #0xc
-	orr r3, r3, r2, lsl #20
-	str r3, [r6, #4]
-	ldr r2, [sp, #8]
-	add sp, sp, #0x24
-	smull r3, r0, r2, r0
-	adds r2, r3, #0x800
-	adc r0, r0, #0
-	mov r2, r2, lsr #0xc
-	orr r2, r2, r0, lsl #20
-	str r2, [r6, #8]
-	str r1, [r6, #0xc]
-	ldmia sp!, {r3, r4, r5, r6, pc}
-_020d60dc:
-	ldr r0, _020d6138 ; =data_ov00_020e9308
-	add sp, sp, #0x24
-	ldr r1, [r0]
-	str r1, [r6]
-	ldr r1, [r0, #4]
-	str r1, [r6, #4]
-	ldr r1, [r0, #8]
-	str r1, [r6, #8]
-	ldr r0, [r0, #0xc]
-	str r0, [r6, #0xc]
-	ldmia sp!, {r3, r4, r5, r6, pc}
-_020d6108:
-	ldr r0, _020d6138 ; =data_ov00_020e9308
-	ldr r1, [r0]
-	str r1, [r6]
-	ldr r1, [r0, #4]
-	str r1, [r6, #4]
-	ldr r1, [r0, #8]
-	str r1, [r6, #8]
-	ldr r0, [r0, #0xc]
-	str r0, [r6, #0xc]
-	add sp, sp, #0x24
-	ldmia sp!, {r3, r4, r5, r6, pc}
-	.align 2, 0
-	arm_func_end func_ov00_020d5f98
-_020d6134: .word data_ov00_020ee6e8
-_020d6138: .word data_ov00_020e9308
-_020d613c: .word data_ov00_020e9308
-_020d6140: .word func_ov00_020d5c50
-_020d6144: .word data_ov00_020ee6ec
+.ifdef EUR
+; This used to be higher up in USA
+.include "ov00/ov00_020d59f0.inc"
+.endif
 
 	.global func_ov00_020d6148
 	arm_func_start func_ov00_020d6148
diff --git a/asm/ov00/ov00_020d59f0.inc b/asm/ov00/ov00_020d59f0.inc
new file mode 100644
index 00000000..00ea55b9
--- /dev/null
+++ b/asm/ov00/ov00_020d59f0.inc
@@ -0,0 +1,515 @@
+	.global func_ov00_020d59f0
+	arm_func_start func_ov00_020d59f0
+func_ov00_020d59f0: ; 0x020d59f0
+	stmdb sp!, {r3, lr}
+	ldr lr, [r0]
+	ldr r3, [r1]
+	sub r3, r3, lr
+	mul ip, r3, r2
+	add r3, ip, #0x800
+	add r3, lr, r3, asr #12
+	str r3, [r0]
+	ldr lr, [r0, #4]
+	ldr r3, [r1, #4]
+	sub r3, r3, lr
+	mul ip, r3, r2
+	add r3, ip, #0x800
+	add r3, lr, r3, asr #12
+	str r3, [r0, #4]
+	ldr lr, [r0, #8]
+	ldr r3, [r1, #8]
+	sub r3, r3, lr
+	mul ip, r3, r2
+	add r3, ip, #0x800
+	add r3, lr, r3, asr #12
+	str r3, [r0, #8]
+	ldr r3, [r0, #0xc]
+	ldr r1, [r1, #0xc]
+	sub r1, r1, r3
+	mul r2, r1, r2
+	add r1, r2, #0x800
+	add r1, r3, r1, asr #12
+	str r1, [r0, #0xc]
+	ldmia sp!, {r3, pc}
+	arm_func_end func_ov00_020d59f0
+
+	.global func_ov00_020d5a68
+	arm_func_start func_ov00_020d5a68
+func_ov00_020d5a68: ; 0x020d5a68
+	stmdb sp!, {r4, r5, r6, r7, r8, lr}
+	sub sp, sp, #0x20
+	mov r8, r0
+	ldr r3, [r8]
+	mov r7, r2
+	str r3, [sp, #0x10]
+	ldr r3, [r8, #4]
+	add r0, sp, #0x10
+	str r3, [sp, #0x14]
+	ldr r2, [r8, #8]
+	str r2, [sp, #0x18]
+	ldr r2, [r8, #0xc]
+	str r2, [sp, #0x1c]
+	ldr r2, [r1]
+	str r2, [sp]
+	ldr r2, [r1, #4]
+	str r2, [sp, #4]
+	ldr r2, [r1, #8]
+	str r2, [sp, #8]
+	ldr r1, [r1, #0xc]
+	str r1, [sp, #0xc]
+	bl func_ov00_020d5c54
+	add r0, sp, #0
+	bl func_ov00_020d5c54
+	ldr r1, [sp, #0x14]
+	ldr r0, [sp, #4]
+	ldr r2, [sp, #0x10]
+	smull r4, r3, r1, r0
+	ldr r0, [sp]
+	ldr r1, [sp, #0x18]
+	smlal r4, r3, r2, r0
+	ldr r0, [sp, #8]
+	ldr r2, [sp, #0x1c]
+	smlal r4, r3, r1, r0
+	ldr r0, [sp, #0xc]
+	mov r5, #0
+	smlal r4, r3, r2, r0
+	adds r1, r4, #0x800
+	adc r0, r3, #0
+	mov r4, r1, lsr #0xc
+	orrs r4, r4, r0, lsl #20
+	rsbmi r4, r4, #0
+	rsb r0, r4, #0x1000
+	movmi r5, #1
+	cmp r0, #0x80000000
+	rsble r4, r7, #0x1000
+	ble _020d5bac
+	mul r0, r4, r4
+	add r0, r0, #0x800
+	mov r0, r0, asr #0xc
+	sub r0, r0, #0x1000
+	bl func_01ff9958
+	mov r1, r0
+	mov r0, r4
+	bl func_01ff9f3c
+	mov r4, r0
+	mov r0, #0x1000
+	bl func_020037b8
+	add r4, r4, r0, lsl #1
+	rsb r0, r7, #0x1000
+	mul r1, r0, r4
+	mov r2, r4, asr #0x4
+	add r0, r1, #0x800
+	mov r0, r0, asr #0x10
+	ldr r1, _020d5c4c ; =data_02050f54
+	mov r2, r2, lsl #0x2
+	mov r0, r0, lsl #0x2
+	ldrsh r6, [r1, r2]
+	ldrsh r0, [r1, r0]
+	mov r1, r6
+	bl func_01ff98e0
+	mul r1, r7, r4
+	add r1, r1, #0x800
+	mov r1, r1, asr #0x10
+	ldr r2, _020d5c4c ; =data_02050f54
+	mov r3, r1, lsl #0x2
+	mov r1, r6
+	mov r4, r0
+	ldrsh r0, [r2, r3]
+	bl func_01ff98e0
+	mov r7, r0
+_020d5bac:
+	ldr r0, [sp]
+	cmp r5, #0
+	rsbne r7, r7, #0
+	ldr r1, [sp, #0x10]
+	mul r0, r7, r0
+	mul r1, r4, r1
+	add r0, r0, #0x800
+	add r1, r1, #0x800
+	mov r0, r0, asr #0xc
+	add r0, r0, r1, asr #12
+	str r0, [r8]
+	ldr r0, [sp, #4]
+	ldr r1, [sp, #0x14]
+	mul r0, r7, r0
+	mul r1, r4, r1
+	add r0, r0, #0x800
+	add r1, r1, #0x800
+	mov r0, r0, asr #0xc
+	add r0, r0, r1, asr #12
+	str r0, [r8, #4]
+	ldr r0, [sp, #8]
+	ldr r1, [sp, #0x18]
+	mul r0, r7, r0
+	mul r1, r4, r1
+	add r0, r0, #0x800
+	add r1, r1, #0x800
+	mov r0, r0, asr #0xc
+	add r0, r0, r1, asr #12
+	str r0, [r8, #8]
+	ldr r0, [sp, #0xc]
+	ldr r1, [sp, #0x1c]
+	mul r0, r7, r0
+	mul r1, r4, r1
+	add r0, r0, #0x800
+	add r1, r1, #0x800
+	mov r0, r0, asr #0xc
+	add r0, r0, r1, asr #12
+	str r0, [r8, #0xc]
+	add sp, sp, #0x20
+	ldmia sp!, {r4, r5, r6, r7, r8, pc}
+	.align 2, 0
+	arm_func_end func_ov00_020d5a68
+_020d5c4c: .word data_02050f54
+
+	.global func_ov00_020d5c50
+	arm_func_start func_ov00_020d5c50
+func_ov00_020d5c50: ; 0x020d5c50
+	bx lr
+	arm_func_end func_ov00_020d5c50
+
+	.global func_ov00_020d5c54
+	arm_func_start func_ov00_020d5c54
+func_ov00_020d5c54: ; 0x020d5c54
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	ldr r1, [r4, #4]
+	ldr r2, [r4]
+	mul r0, r1, r1
+	mla r0, r2, r2, r0
+	ldr r2, [r4, #8]
+	ldr r1, [r4, #0xc]
+	mla r0, r2, r2, r0
+	mla r0, r1, r1, r0
+	mov r0, r0, asr #0xc
+	bl func_01ff998c
+	ldr r1, [r4]
+	mul r1, r0, r1
+	add r1, r1, #0x800
+	mov r1, r1, asr #0xc
+	str r1, [r4]
+	ldr r1, [r4, #4]
+	mul r1, r0, r1
+	add r1, r1, #0x800
+	mov r1, r1, asr #0xc
+	str r1, [r4, #4]
+	ldr r1, [r4, #8]
+	mul r1, r0, r1
+	add r1, r1, #0x800
+	mov r1, r1, asr #0xc
+	str r1, [r4, #8]
+	ldr r1, [r4, #0xc]
+	mul r1, r0, r1
+	add r0, r1, #0x800
+	mov r0, r0, asr #0xc
+	str r0, [r4, #0xc]
+	ldmia sp!, {r4, pc}
+	arm_func_end func_ov00_020d5c54
+
+	.global func_ov00_020d5cd8
+	arm_func_start func_ov00_020d5cd8
+func_ov00_020d5cd8: ; 0x020d5cd8
+	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
+	ldr r3, [r0, #4]
+	ldr r2, [r0, #8]
+	ldr r4, [r0, #0xc]
+	ldr lr, [r0]
+	mul r0, r3, r3
+	mul r5, r2, r2
+	mul ip, r4, r2
+	mul r7, lr, r3
+	mul sb, r4, r3
+	mul r6, lr, r2
+	mul r8, lr, lr
+	add sl, r0, #0x800
+	mul r0, r4, lr
+	add lr, r5, #0x800
+	mul r5, r2, r3
+	mov r4, sl, asr #0xc
+	add r3, ip, #0x800
+	add r2, r4, lr, asr #12
+	add ip, sb, #0x800
+	mov r2, r2, lsl #0x1
+	rsb r2, r2, #0x1000
+	add r8, r8, #0x800
+	mov sb, lr, asr #0xc
+	add lr, r0, #0x800
+	add r0, sb, r8, asr #12
+	mov r0, r0, lsl #0x1
+	add r4, r4, r8, asr #12
+	mov r4, r4, lsl #0x1
+	add r7, r7, #0x800
+	mov r3, r3, asr #0xc
+	add r8, r3, r7, asr #12
+	rsb r7, r3, r7, asr #12
+	add sb, r6, #0x800
+	mov r3, ip, asr #0xc
+	rsb r6, r3, sb, asr #12
+	add r3, r3, sb, asr #12
+	str r2, [r1]
+	mov r2, r8, lsl #0x1
+	str r2, [r1, #4]
+	mov r2, r6, lsl #0x1
+	str r2, [r1, #8]
+	mov r6, r7, lsl #0x1
+	add r7, r5, #0x800
+	mov r2, lr, asr #0xc
+	add r5, r2, r7, asr #12
+	rsb r2, r2, r7, asr #12
+	str r6, [r1, #0xc]
+	rsb r0, r0, #0x1000
+	str r0, [r1, #0x10]
+	mov r0, r5, lsl #0x1
+	str r0, [r1, #0x14]
+	mov r0, r3, lsl #0x1
+	str r0, [r1, #0x18]
+	mov r0, r2, lsl #0x1
+	str r0, [r1, #0x1c]
+	rsb r0, r4, #0x1000
+	str r0, [r1, #0x20]
+	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
+	arm_func_end func_ov00_020d5cd8
+
+	.global func_ov00_020d5dc4
+	arm_func_start func_ov00_020d5dc4
+func_ov00_020d5dc4: ; 0x020d5dc4
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
+	ldr r4, [r0]
+	ldr r5, [r1]
+	ldmib r1, {r3, fp, lr}
+	ldmib r0, {r2, sl, ip}
+	mul sb, r4, lr
+	mul r1, ip, r5
+	mul r6, r2, fp
+	add sb, sb, #0x800
+	mul r7, r2, lr
+	mul r8, ip, r3
+	add r7, r7, #0x800
+	add r1, r1, #0x800
+	mov sb, sb, asr #0xc
+	add sb, sb, r1, asr #12
+	add r6, r6, #0x800
+	add r6, sb, r6, asr #12
+	mul sb, sl, r3
+	add sb, sb, #0x800
+	sub r6, r6, sb, asr #12
+	mul sb, sl, r5
+	mul r1, sl, lr
+	str r6, [r0]
+	add r8, r8, #0x800
+	mov r7, r7, asr #0xc
+	add r7, r7, r8, asr #12
+	add sb, sb, #0x800
+	add sb, r7, sb, asr #12
+	mul r7, r4, r3
+	mul r3, r2, r3
+	mul r6, ip, fp
+	mul lr, ip, lr
+	mul ip, r4, r5
+	mul r8, r4, fp
+	mul r4, r2, r5
+	mul r2, sl, fp
+	add sl, r1, #0x800
+	add r1, r8, #0x800
+	sub r1, sb, r1, asr #12
+	add r5, ip, #0x800
+	add r8, r6, #0x800
+	str r1, [r0, #4]
+	mov r6, sl, asr #0xc
+	add sb, r7, #0x800
+	add r7, r6, r8, asr #12
+	add r8, r7, sb, asr #12
+	add r6, lr, #0x800
+	mov r5, r5, asr #0xc
+	add r7, r4, #0x800
+	rsb r4, r5, r6, asr #12
+	add r3, r3, #0x800
+	sub r5, r8, r7, asr #12
+	sub r3, r4, r3, asr #12
+	add r1, r2, #0x800
+	str r5, [r0, #8]
+	sub r1, r3, r1, asr #12
+	str r1, [r0, #0xc]
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	arm_func_end func_ov00_020d5dc4
+
+	.global func_ov00_020d5eac
+	arm_func_start func_ov00_020d5eac
+func_ov00_020d5eac: ; 0x020d5eac
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
+	ldr r5, [r1]
+	ldr r4, [r0, #0xc]
+	ldr r2, [r0, #8]
+	ldmib r1, {r3, fp, lr}
+	ldmia r0, {r6, ip}
+	mul sl, r5, r4
+	mul r1, lr, r6
+	mul r7, r3, r2
+	add sl, sl, #0x800
+	mul r8, r3, r4
+	mul sb, lr, ip
+	add r8, r8, #0x800
+	add r1, r1, #0x800
+	mov sl, sl, asr #0xc
+	add sl, sl, r1, asr #12
+	add r7, r7, #0x800
+	add r7, sl, r7, asr #12
+	mul sl, fp, ip
+	add sl, sl, #0x800
+	sub r7, r7, sl, asr #12
+	mul sl, fp, r6
+	mul r1, fp, r4
+	str r7, [r0]
+	mul r4, lr, r4
+	mul r7, lr, r2
+	mul lr, r5, r6
+	mul r6, r3, r6
+	add sb, sb, #0x800
+	mov r8, r8, asr #0xc
+	add r8, r8, sb, asr #12
+	add sl, sl, #0x800
+	mul sb, r5, r2
+	add sl, r8, sl, asr #12
+	mul r8, r5, ip
+	mul r5, r3, ip
+	mul r2, fp, r2
+	add fp, r1, #0x800
+	add r1, sb, #0x800
+	add r3, lr, #0x800
+	add sb, r7, #0x800
+	mov r7, fp, asr #0xc
+	sub r1, sl, r1, asr #12
+	str r1, [r0, #4]
+	add r8, r8, #0x800
+	add r7, r7, sb, asr #12
+	add r4, r4, #0x800
+	mov r3, r3, asr #0xc
+	rsb r4, r3, r4, asr #12
+	add r3, r5, #0x800
+	add r7, r7, r8, asr #12
+	add r6, r6, #0x800
+	sub r5, r7, r6, asr #12
+	sub r3, r4, r3, asr #12
+	add r1, r2, #0x800
+	str r5, [r0, #8]
+	sub r1, r3, r1, asr #12
+	str r1, [r0, #0xc]
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	arm_func_end func_ov00_020d5eac
+
+	.global func_ov00_020d5f98
+	arm_func_start func_ov00_020d5f98
+func_ov00_020d5f98: ; 0x020d5f98
+	stmdb sp!, {r3, r4, r5, r6, lr}
+	sub sp, sp, #0x24
+	ldr r3, _020d6134 ; =data_ov00_020ee6e8
+	mov r6, r0
+	ldr r0, [r3]
+	mov r5, r1
+	mov r4, r2
+	tst r0, #1
+	bne _020d5ff8
+	ldr r3, _020d6138 ; =data_ov00_020e9308
+	mov ip, #0
+	str ip, [r3]
+	str ip, [r3, #4]
+	ldr r0, _020d613c ; =data_ov00_020e9308
+	ldr r1, _020d6140 ; =func_ov00_020d5c50
+	ldr r2, _020d6144 ; =data_ov00_020ee6ec
+	str ip, [r3, #8]
+	mov ip, #0x1000
+	str ip, [r3, #0xc]
+	bl func_0204f8d4
+	ldr r0, _020d6134 ; =data_ov00_020ee6e8
+	ldr r1, [r0]
+	orr r1, r1, #1
+	str r1, [r0]
+_020d5ff8:
+	ldmia r4, {r0, r1, r2}
+	add r4, sp, #0x18
+	stmia r4, {r0, r1, r2}
+	add r3, sp, #0xc
+	ldmia r5, {r0, r1, r2}
+	stmia r3, {r0, r1, r2}
+	mov r0, r4
+	bl func_01fffb4c
+	cmp r0, #0
+	beq _020d6108
+	add r0, sp, #0xc
+	bl func_01fffb4c
+	cmp r0, #0
+	beq _020d6108
+	add r0, sp, #0xc
+	mov r1, r4
+	bl func_01ff9c2c
+	add r0, r0, #0x1000
+	mov r0, r0, lsl #0x1
+	bl func_01ff9958
+	mov r4, r0
+	add r0, sp, #0xc
+	add r1, sp, #0x18
+	add r2, sp, #0
+	bl func_01ff9c68
+	cmp r4, #0
+	rsblt r0, r4, #0
+	movge r0, r4
+	cmp r0, #4
+	ble _020d60dc
+	mov r0, r4
+	bl func_01ff991c
+	ldr r2, [sp]
+	mov r1, r4, asr #0x1
+	smull r4, r3, r2, r0
+	adds r4, r4, #0x800
+	adc r2, r3, #0
+	mov r3, r4, lsr #0xc
+	orr r3, r3, r2, lsl #20
+	str r3, [r6]
+	ldr r2, [sp, #4]
+	smull r4, r3, r2, r0
+	adds r4, r4, #0x800
+	adc r2, r3, #0
+	mov r3, r4, lsr #0xc
+	orr r3, r3, r2, lsl #20
+	str r3, [r6, #4]
+	ldr r2, [sp, #8]
+	add sp, sp, #0x24
+	smull r3, r0, r2, r0
+	adds r2, r3, #0x800
+	adc r0, r0, #0
+	mov r2, r2, lsr #0xc
+	orr r2, r2, r0, lsl #20
+	str r2, [r6, #8]
+	str r1, [r6, #0xc]
+	ldmia sp!, {r3, r4, r5, r6, pc}
+_020d60dc:
+	ldr r0, _020d6138 ; =data_ov00_020e9308
+	add sp, sp, #0x24
+	ldr r1, [r0]
+	str r1, [r6]
+	ldr r1, [r0, #4]
+	str r1, [r6, #4]
+	ldr r1, [r0, #8]
+	str r1, [r6, #8]
+	ldr r0, [r0, #0xc]
+	str r0, [r6, #0xc]
+	ldmia sp!, {r3, r4, r5, r6, pc}
+_020d6108:
+	ldr r0, _020d6138 ; =data_ov00_020e9308
+	ldr r1, [r0]
+	str r1, [r6]
+	ldr r1, [r0, #4]
+	str r1, [r6, #4]
+	ldr r1, [r0, #8]
+	str r1, [r6, #8]
+	ldr r0, [r0, #0xc]
+	str r0, [r6, #0xc]
+	add sp, sp, #0x24
+	ldmia sp!, {r3, r4, r5, r6, pc}
+	.align 2, 0
+	arm_func_end func_ov00_020d5f98
+_020d6134: .word data_ov00_020ee6e8
+_020d6138: .word data_ov00_020e9308
+_020d613c: .word data_ov00_020e9308
+_020d6140: .word func_ov00_020d5c50
+_020d6144: .word data_ov00_020ee6ec
diff --git a/tools/lcf.py b/tools/lcf.py
index 538c8085..c7c63b32 100644
--- a/tools/lcf.py
+++ b/tools/lcf.py
@@ -42,7 +42,7 @@ ov00 = Overlay(name='ov00', after='ARM9', objects=[
     'asm/ov00/ov00_020c9a68.s',
     'asm/ov00/ov00_020d0000.s',
     'asm/ov00/ov00_020d1870.s',
-    'asm/ov00/ov00_020d5458.s',
+    'asm/ov00/ov00_020d5284.s',
     'asm/ov00/ov00_init.s'
 ])
 ov01 = Overlay(name='ov01', after=[ov00], objects=[