mirror of
https://github.com/RetroPortingToolKit/psxrecomp
synced 2026-10-26 10:19:47 -04:00
chore: stop tracking BIOS-derivative generated/ output
The `generated/` tree contains C and JSON produced by the recompiler from SCPH1001.BIN — derivative of copyrighted Sony BIOS code. It is regenerated from a user-supplied BIOS on local build; not committed. Mirrors the convention used by nesrecomp and snesrecomp. Also covers release-stage/ and *.zip so local release packaging artifacts stay out of the tree. Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
This commit is contained in:
Matthew Stanley
+7
-2
@@ -19,8 +19,13 @@ recompiler/build-checked/
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runtime/build/
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runtime/build-msvc/
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test_msvc/
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generated/*.o
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generated/*.obj
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# Recompiler output (derivative of copyrighted Sony BIOS, regenerate locally)
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generated/
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# Release packaging artifacts
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release-stage/
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*.zip
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# Vendored upstream sources (cloned locally, not checked in)
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beetle-psx/
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File diff suppressed because it is too large
Load Diff
-291091
File diff suppressed because it is too large
Load Diff
@@ -1,82 +0,0 @@
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{
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"schema": "psxrecomp-v4 phase1e address_aliases v1",
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"normalization_rule": "Two-step: (1) KSEG strip: phys = addr & 0x1FFFFFFF. (2) ROM-to-RAM mapping: if phys in [0x1FC10000, 0x1FC18BEF], map to phys - 0x1FC10000 + 0x00000500. Result is the canonical physical address.",
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"source_proof": "generated/relocation_proofs/primary_copy/proof.json",
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"copy_mapping": {
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"rom_range": "0xBFC10000..0xBFC18BEF",
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"ram_range": "0x80000500..0x800090EF",
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"formula": "ram_addr = rom_addr - 0xBFC10000 + 0x80000500"
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},
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"total_aliases": 69,
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"aliases": {
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"0xBFC10C74": "0x80001174",
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"0xBFC11008": "0x80001508",
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"0xBFC11294": "0x80001794",
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"0xBFC112F4": "0x800017F4",
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"0xBFC11358": "0x80001858",
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"0xBFC113BC": "0x800018BC",
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"0xBFC11420": "0x80001920",
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"0xBFC11458": "0x80001958",
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"0xBFC11490": "0x80001990",
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"0xBFC114C8": "0x800019C8",
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"0xBFC11500": "0x80001A00",
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"0xBFC11620": "0x80001B20",
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"0xBFC1188C": "0x80001D8C",
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"0xBFC11B18": "0x80002018",
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"0xBFC11C8C": "0x8000218C",
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"0xBFC11F58": "0x80002458",
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"0xBFC122C0": "0x800027C0",
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"0xBFC12370": "0x80002870",
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"0xBFC12408": "0x80002908",
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"0xBFC12458": "0x80002958",
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"0xBFC12564": "0x80002A64",
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"0xBFC12628": "0x80002B28",
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"0xBFC12794": "0x80002C94",
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"0xBFC12900": "0x80002E00",
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"0xBFC12998": "0x80002E98",
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"0xBFC129FC": "0x80002EFC",
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"0xBFC12AC8": "0x80002FC8",
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"0xBFC12B00": "0x80003000",
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"0xBFC12B60": "0x80003060",
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"0xBFC12C08": "0x80003108",
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"0xBFC12CE8": "0x800031E8",
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"0xBFC12F6C": "0x8000346C",
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"0xBFC12FB4": "0x800034B4",
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"0xBFC13070": "0x80003570",
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"0xBFC130AC": "0x800035AC",
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"0xBFC13178": "0x80003678",
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"0xBFC13244": "0x80003744",
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"0xBFC13310": "0x80003810",
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"0xBFC133D8": "0x800038D8",
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"0xBFC134A4": "0x800039A4",
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"0xBFC135AC": "0x80003AAC",
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"0xBFC137E0": "0x80003CE0",
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"0xBFC13980": "0x80003E80",
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"0xBFC13AF0": "0x80003FF0",
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"0xBFC13B24": "0x80004024",
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"0xBFC13B6C": "0x8000406C",
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"0xBFC13C34": "0x80004134",
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"0xBFC13C64": "0x80004164",
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"0xBFC13E04": "0x80004304",
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"0xBFC13E60": "0x80004360",
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"0xBFC13EE8": "0x800043E8",
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"0xBFC13F98": "0x80004498",
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"0xBFC144BC": "0x800049BC",
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"0xBFC145C8": "0x80004AC8",
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"0xBFC14690": "0x80004B90",
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"0xBFC14710": "0x80004C10",
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"0xBFC14770": "0x80004C70",
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"0xBFC147F4": "0x80004CF4",
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"0xBFC14A90": "0x80004F90",
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"0xBFC14B00": "0x80005000",
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"0xBFC14CF4": "0x800051F4",
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"0xBFC158A8": "0x80005DA8",
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"0xBFC15B9C": "0x8000609C",
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"0xBFC16170": "0x80006670",
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"0xBFC18254": "0x80008754",
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"0xBFC18684": "0x80008B84",
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"0xBFC18798": "0x80008C98",
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"0xBFC188F0": "0x80008DF0",
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"0xBFC18990": "0x80008E90"
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}
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}
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@@ -1,75 +0,0 @@
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/* AUTO-GENERATED by psxrecomp-bios. DO NOT EDIT.
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*
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* Source: bios/SCPH1001.BIN sha256=71af94d1e47a68c11e8fdb9f8368040601514a42a5a399cda48c7d3bff1e99d3
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* Slice: 0xBFC00000 .. 0xBFC00074 (30 instructions)
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* Termination: j -> 0xBFC00150
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*
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* This file is a Phase 1a proof artifact. It is intended to compile
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* with `gcc -c` against generated/cpu_state.h. It is NOT linkable into
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* a runnable binary by design — see cpu_state.h for the rationale.
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*/
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#include "cpu_state.h"
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void boot_slice(CPUState* cpu) {
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/* 0xBFC00000: 3C080013 lui $t0, 0x13 */
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cpu->gpr[8] = 0x00130000u;
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/* 0xBFC00004: 3508243F ori $t0, $t0, 0x243F */
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cpu->gpr[8] = cpu->gpr[8] | 0x243Fu;
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/* 0xBFC00008: 3C011F80 lui $at, 0x1F80 */
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cpu->gpr[1] = 0x1F800000u;
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/* 0xBFC0000C: AC281010 sw $t0, 4112($at) */
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{ uint32_t psx_addr = (uint32_t)((int32_t)cpu->gpr[1] + (4112)); if (psx_addr & 3u) { psx_unaligned_access(cpu, psx_addr, 0xBFC0000Cu); return; } cpu->write_word(psx_addr, cpu->gpr[8]); }
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/* 0xBFC00010: 00000000 nop */
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/* nop */
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/* 0xBFC00014: 24080B88 addiu $t0, $zero, 2952 */
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cpu->gpr[8] = (uint32_t)((int32_t)cpu->gpr[0] + (2952));
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/* 0xBFC00018: 3C011F80 lui $at, 0x1F80 */
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cpu->gpr[1] = 0x1F800000u;
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/* 0xBFC0001C: AC281060 sw $t0, 4192($at) */
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{ uint32_t psx_addr = (uint32_t)((int32_t)cpu->gpr[1] + (4192)); if (psx_addr & 3u) { psx_unaligned_access(cpu, psx_addr, 0xBFC0001Cu); return; } cpu->write_word(psx_addr, cpu->gpr[8]); }
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/* 0xBFC00020: 00000000 nop */
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/* nop */
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/* 0xBFC00024: 00000000 nop */
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/* nop */
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/* 0xBFC00028: 00000000 nop */
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/* nop */
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/* 0xBFC0002C: 00000000 nop */
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/* nop */
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/* 0xBFC00030: 00000000 nop */
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/* nop */
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/* 0xBFC00034: 00000000 nop */
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/* nop */
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/* 0xBFC00038: 00000000 nop */
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/* nop */
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/* 0xBFC0003C: 00000000 nop */
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/* nop */
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/* 0xBFC00040: 00000000 nop */
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/* nop */
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/* 0xBFC00044: 00000000 nop */
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/* nop */
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/* 0xBFC00048: 00000000 nop */
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/* nop */
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/* 0xBFC0004C: 00000000 nop */
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/* nop */
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/* 0xBFC00050: 00000000 nop */
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/* nop */
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/* 0xBFC00054: 00000000 nop */
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/* nop */
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/* 0xBFC00058: 00000000 nop */
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/* nop */
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/* 0xBFC0005C: 00000000 nop */
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/* nop */
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/* 0xBFC00060: 00000000 nop */
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/* nop */
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/* 0xBFC00064: 00000000 nop */
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/* nop */
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/* 0xBFC00068: 00000000 nop */
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/* nop */
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/* 0xBFC0006C: 00000000 nop */
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/* nop */
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/* 0xBFC00074: 00000000 [delay slot of 0xBFC00070] nop */
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/* nop */
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/* 0xBFC00070: 0BF00054 j 0xBFC00150 */
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cpu->pc = 0xBFC00150u; /* j 0xBFC00150 -- slice terminator (direct) */ return;
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}
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@@ -1,19 +0,0 @@
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{
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"schema_version": 1,
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"bios_image": {
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"path": "bios/SCPH1001.BIN",
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"size": 524288,
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"sha256": "71af94d1e47a68c11e8fdb9f8368040601514a42a5a399cda48c7d3bff1e99d3"
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},
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"slices": [
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{
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"address": "0xBFC00000",
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"type": "function_entry",
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"discovered_by": "reset_vector",
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"instructions": 30,
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"ends_at": "0xBFC00074",
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"termination_reason": "j",
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"terminator_target": "0xBFC00150"
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}
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]
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}
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File diff suppressed because it is too large
Load Diff
@@ -1,107 +0,0 @@
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/* ============================================================================
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* cpu_state.h
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* ----------------------------------------------------------------------------
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* COMPILE-ONLY ARTIFACT FOR PHASE 1a PROOF.
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*
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* This header exists so that `generated/boot_slice.c` can be type-checked by
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* a C compiler with `-c` (object emission only). It is NOT a runtime, it is
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* NOT a stub set, and it is NOT the start of the v4 runtime.
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*
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* Linking any translation unit that includes this header into a runnable
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* binary is a build error BY DESIGN: the function-pointer fields in CPUState
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* are unset, and `psx_syscall` has no implementation anywhere in the tree.
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* If your linker fails on `psx_syscall` or on undefined memory accessors,
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* that is the intended behavior. DO NOT add stubs. DO NOT add a default
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* implementation. The runtime is Phase 2 work and will land in `runtime/`
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* with real hardware-simulation backends.
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*
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* The Phase 1a recompiler self-validates `boot_slice.c` with `gcc -c` only.
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* If you find yourself wanting to write `cpu_state.c` to make linking work,
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* stop. Re-read CLAUDE.md sections 0 and 7. Stubs are how every prior
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* version of this project failed.
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* ========================================================================== */
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#ifndef PSXRECOMP_V4_CPU_STATE_H
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#define PSXRECOMP_V4_CPU_STATE_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* PS1 R3000A architectural state.
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*
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* Layout matches recompiler/include/code_generator.h `CPUState` so that
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* Phase 2's runtime can drop in without renaming. The cop0 array is added
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* here because Phase 1a's strict translator emits MFC0/MTC0/RFE in cop0[N]
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* form (matching salvaged codegen convention); Phase 2 may revisit per
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* PLAN.md HP1.
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*/
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typedef struct CPUState {
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uint32_t gpr[32]; /* $0..$31; gpr[0] is hardwired zero, never written */
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uint32_t pc; /* program counter */
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uint32_t hi, lo; /* mult/div result registers */
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uint32_t cop0[32]; /* COP0 system control registers (SR, Cause, EPC, ...) */
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uint32_t gte_data[32]; /* COP2 (GTE) data registers */
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uint32_t gte_ctrl[32]; /* COP2 (GTE) control registers */
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/* Memory access function pointers. Phase 1a leaves these NULL.
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* The recompiled boot_slice.c calls them via cpu->write_word(...);
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* dereferencing a NULL function pointer at runtime crashes loudly,
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* which is the desired failure mode if anyone tries to RUN this
|
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* artifact (vs. only compile it). */
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uint32_t (*read_word)(uint32_t addr);
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void (*write_word)(uint32_t addr, uint32_t value);
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uint16_t (*read_half)(uint32_t addr);
|
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void (*write_half)(uint32_t addr, uint16_t value);
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uint8_t (*read_byte)(uint32_t addr);
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void (*write_byte)(uint32_t addr, uint8_t value);
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} CPUState;
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/* Syscall trampoline. Declared, never defined.
|
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* Any TU that calls this and then links will fail with an unresolved symbol.
|
||||
* That is intentional. The Phase 2 runtime will provide a real definition
|
||||
* that routes through the recompiled BIOS exception vector. */
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extern void psx_syscall(CPUState* cpu, uint32_t code);
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|
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/* Arithmetic-overflow trap trampoline. Declared, never defined.
|
||||
* Real R3000A raises an Overflow exception (Cause.ExcCode = 0xC) when a
|
||||
* signed ADD/ADDI/SUB result does not fit in 32 bits. The recompiled C
|
||||
* for those instructions checks for overflow and calls this function on
|
||||
* trap; the Phase 2 runtime will define it to deliver the exception
|
||||
* through the recompiled exception vector. Until then, calling this
|
||||
* symbol fails to link, which is the intended behavior. DO NOT add a
|
||||
* default definition. */
|
||||
extern void psx_arith_overflow(CPUState* cpu);
|
||||
|
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/* Unaligned-access fail-loud. Declared, never defined.
|
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* Phase 1b loads (LW/LH/LHU) and stores (SW/SH) check the effective
|
||||
* address alignment before performing the access. On misalignment the
|
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* recompiled C calls this function with the offending address and the
|
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* PC of the load/store instruction, then returns from the slice. Real
|
||||
* R3000A would raise AdEL (load) or AdES (store) exceptions; we are
|
||||
* NOT modeling exception delivery in Phase 1b. The intent here is to
|
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* fail loud so that any unaligned access is surfaced rather than
|
||||
* silently producing the wrong bytes. The Phase 2 runtime will define
|
||||
* this function (probably as `abort()` with a diagnostic, or as a
|
||||
* proper exception delivery once the exception path exists). DO NOT
|
||||
* add a default definition. */
|
||||
extern void psx_unaligned_access(CPUState* cpu, uint32_t addr, uint32_t pc);
|
||||
|
||||
/* BREAK trap fail-loud. Declared, never defined.
|
||||
* Phase 1b B(10) translates the BREAK instruction (SPECIAL funct 0x0D)
|
||||
* to a call to this function. `code` is the 20-bit immediate in
|
||||
* bits [25:6] of the BREAK instruction, `pc` is the address of the
|
||||
* BREAK itself. After the call the recompiled C `return`s from the
|
||||
* slice — the strict translator does NOT model R3000A's BREAK
|
||||
* exception (Cause.ExcCode = 0x9) or the resumption back through
|
||||
* RFE. That is Phase 2 work. Until the Phase 2 runtime provides this
|
||||
* symbol, linking fails by design. DO NOT add a default definition. */
|
||||
extern void psx_break(CPUState* cpu, uint32_t code, uint32_t pc);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PSXRECOMP_V4_CPU_STATE_H */
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,87 +0,0 @@
|
||||
{
|
||||
"program": "SCPH1001.BIN",
|
||||
"source": "Ghidra MCP list_functions, paginated 4x200 over offsets 0/200/400/600",
|
||||
"function_count": 666,
|
||||
"image_base": "0xbfc00000",
|
||||
"image_end": "0xbfc7ffff",
|
||||
"verified_function_bodies": [
|
||||
{"name": "FUN_bfc00420", "entry": "0xbfc00420", "end": "0xbfc0045b", "source": "mcp__ghidra__get_function_info", "ranges": 1},
|
||||
{"name": "FUN_bfc00678", "entry": "0xbfc00678", "end": "0xbfc006a7", "source": "mcp__ghidra__get_function_info", "ranges": 1},
|
||||
{"name": "FUN_bfc006a8", "entry": "0xbfc006a8", "end": "0xbfc006d7", "source": "mcp__ghidra__get_function_info", "ranges": 1},
|
||||
{"name": "FUN_bfc00b7c", "entry": "0xbfc00b7c", "end": "0xbfc00d9f", "source": "mcp__ghidra__get_function_info", "ranges": 1},
|
||||
{"name": "FUN_bfc02324", "entry": "0xbfc02324", "end": "0xbfc0258f", "source": "mcp__ghidra__get_function_info", "ranges": 4, "note": "atof-style routine using COP1 FPU instructions"},
|
||||
{"name": "FUN_bfc04dec", "entry": "0xbfc04dec", "end": "0xbfc04fbb", "source": "mcp__ghidra__get_function_info", "ranges": 2},
|
||||
{"name": "FUN_bfc18254", "entry": "0xbfc18254", "end": "0xbfc18683", "source": "mcp__ghidra__get_function_info", "ranges": 1},
|
||||
{"name": "FUN_bfc34160", "entry": "0xbfc34160", "end": "0xbfc34303", "source": "mcp__ghidra__get_function_info", "ranges": 1},
|
||||
{"name": "FUN_bfc4270c", "entry": "0xbfc4270c", "end": "0xbfc42843", "source": "mcp__ghidra__get_function_info", "ranges": 1}
|
||||
],
|
||||
"function_starts": [
|
||||
"0xbfc00420","0xbfc00678","0xbfc006a8","0xbfc006d8","0xbfc00778","0xbfc00810","0xbfc008a0","0xbfc00944","0xbfc00b7c","0xbfc00da0",
|
||||
"0xbfc018e0","0xbfc01920","0xbfc01a60","0xbfc01a90","0xbfc01acc","0xbfc01b80","0xbfc01c8c","0xbfc01e5c","0xbfc020f0","0xbfc02104",
|
||||
"0xbfc02240","0xbfc0227c","0xbfc022c0","0xbfc02324","0xbfc02590","0xbfc025b0","0xbfc02738","0xbfc02950","0xbfc02af0","0xbfc02b10",
|
||||
"0xbfc02b50","0xbfc02cc0","0xbfc02d20","0xbfc02dac","0xbfc02ea0","0xbfc02edc","0xbfc02f20","0xbfc03098","0xbfc03104","0xbfc03190",
|
||||
"0xbfc03288","0xbfc03310","0xbfc033c8","0xbfc03418","0xbfc03494","0xbfc03764","0xbfc03910","0xbfc03968","0xbfc03978","0xbfc03990",
|
||||
"0xbfc039b0","0xbfc03a18","0xbfc03aa4","0xbfc03c90","0xbfc03cf0","0xbfc03d80","0xbfc03ea0","0xbfc03f8c","0xbfc03fac","0xbfc03fe0",
|
||||
"0xbfc0403c","0xbfc040ec","0xbfc04138","0xbfc04260","0xbfc042a0","0xbfc042d0","0xbfc04610","0xbfc04678","0xbfc0472c","0xbfc048d0",
|
||||
"0xbfc04abc","0xbfc04bc4","0xbfc04c38","0xbfc04d50","0xbfc04dec","0xbfc04fbc","0xbfc0506c","0xbfc050a4","0xbfc050fc","0xbfc05120",
|
||||
"0xbfc05194","0xbfc05558","0xbfc057b0","0xbfc0593c","0xbfc05a44","0xbfc05c18","0xbfc05c50","0xbfc05d04","0xbfc05db0","0xbfc05df4",
|
||||
"0xbfc05e58","0xbfc05f08","0xbfc06010","0xbfc06038","0xbfc060dc","0xbfc0615c","0xbfc061a0","0xbfc061d4","0xbfc06218","0xbfc06288",
|
||||
"0xbfc062cc","0xbfc063cc","0xbfc064d8","0xbfc06548","0xbfc065c0","0xbfc0661c","0xbfc06680","0xbfc06700","0xbfc06784","0xbfc067e8",
|
||||
"0xbfc06ca4","0xbfc06ec4","0xbfc06f28","0xbfc06fa4","0xbfc06ff0","0xbfc0703c","0xbfc070ac","0xbfc0711c","0xbfc07148","0xbfc071a0",
|
||||
"0xbfc072b8","0xbfc07330","0xbfc07370","0xbfc073a0","0xbfc07410","0xbfc07664","0xbfc07700","0xbfc078a4","0xbfc07a04","0xbfc07b88",
|
||||
"0xbfc07c1c","0xbfc07f28","0xbfc08020","0xbfc08098","0xbfc081fc","0xbfc08354","0xbfc083cc","0xbfc085b0","0xbfc085d4","0xbfc086b0",
|
||||
"0xbfc086ec","0xbfc08720","0xbfc087c4","0xbfc0884c","0xbfc088a0","0xbfc0895c","0xbfc089c0","0xbfc08b3c","0xbfc08ffc","0xbfc09144",
|
||||
"0xbfc091cc","0xbfc092ec","0xbfc09540","0xbfc09598","0xbfc09720","0xbfc098a8","0xbfc09914","0xbfc0994c","0xbfc0996c","0xbfc09cdc",
|
||||
"0xbfc09d3c","0xbfc0a080","0xbfc0a3d4","0xbfc0a43c","0xbfc0a4b4","0xbfc0a5e4","0xbfc0a754","0xbfc0a8bc","0xbfc0ab60","0xbfc0ad08",
|
||||
"0xbfc0b0d0","0xbfc0b170","0xbfc0b394","0xbfc0b54c","0xbfc0b5a0","0xbfc0b5f4","0xbfc0b648","0xbfc0bff0","0xbfc0c048","0xbfc0c0dc",
|
||||
"0xbfc0c140","0xbfc0c1fc","0xbfc0c220","0xbfc0c248","0xbfc0c270","0xbfc0c298","0xbfc0c2c0","0xbfc0c2e8","0xbfc0c318","0xbfc0c354",
|
||||
"0xbfc0c580","0xbfc0c720","0xbfc0c830","0xbfc0c890","0xbfc0c9cc","0xbfc0cab4","0xbfc0cc68","0xbfc0cd80","0xbfc0cf84","0xbfc0d0cc",
|
||||
"0xbfc0d11c","0xbfc0d34c","0xbfc0d4cc","0xbfc0d570","0xbfc0d600","0xbfc0d640","0xbfc0d664","0xbfc0d688","0xbfc0d72c","0xbfc0d7bc",
|
||||
"0xbfc0d850","0xbfc0d880","0xbfc0d890","0xbfc0d8a0","0xbfc0d8b0","0xbfc0d8c0","0xbfc0d8d0","0xbfc0d950","0xbfc0d960","0xbfc0d970",
|
||||
"0xbfc0d980","0xbfc0d990","0xbfc0d9a0","0xbfc0d9b0","0xbfc0d9c0","0xbfc0d9d0","0xbfc0d9e0","0xbfc0d9f0","0xbfc0da00","0xbfc0da10",
|
||||
"0xbfc0da20","0xbfc0da30","0xbfc0da40","0xbfc0da50","0xbfc0da60","0xbfc0daa0","0xbfc0dab0","0xbfc0dac0","0xbfc0dad0","0xbfc0dae0",
|
||||
"0xbfc0daf0","0xbfc0db00","0xbfc0db10","0xbfc0db20","0xbfc0db30","0xbfc0db40","0xbfc0db50","0xbfc0db60","0xbfc0db70","0xbfc0db80",
|
||||
"0xbfc0db90","0xbfc0dba0","0xbfc0dbb0","0xbfc0dbc0","0xbfc0dbd0","0xbfc0dbe0","0xbfc0dbf0","0xbfc0dc00","0xbfc0dc10","0xbfc0dc20",
|
||||
"0xbfc0dc30","0xbfc0dc40","0xbfc0dc50","0xbfc10c74","0xbfc11008","0xbfc11294","0xbfc112f4","0xbfc11358","0xbfc113bc","0xbfc11420",
|
||||
"0xbfc11458","0xbfc11490","0xbfc114c8","0xbfc11500","0xbfc11620","0xbfc1188c","0xbfc11b18","0xbfc11c8c","0xbfc11f58","0xbfc122c0",
|
||||
"0xbfc12370","0xbfc12408","0xbfc12458","0xbfc12564","0xbfc12628","0xbfc12794","0xbfc12900","0xbfc12998","0xbfc129fc","0xbfc12ac8",
|
||||
"0xbfc12b00","0xbfc12b60","0xbfc12c08","0xbfc12ce8","0xbfc12f6c","0xbfc12fb4","0xbfc13070","0xbfc130ac","0xbfc13178","0xbfc13244",
|
||||
"0xbfc13310","0xbfc133d8","0xbfc134a4","0xbfc135ac","0xbfc137e0","0xbfc13980","0xbfc13af0","0xbfc13b24","0xbfc13b6c","0xbfc13c34",
|
||||
"0xbfc13c64","0xbfc13e04","0xbfc13e60","0xbfc13ee8","0xbfc13f98","0xbfc144bc","0xbfc145c8","0xbfc14690","0xbfc14710","0xbfc14770",
|
||||
"0xbfc147f4","0xbfc14a90","0xbfc14b00","0xbfc14cf4","0xbfc158a8","0xbfc15b9c","0xbfc16170","0xbfc18254","0xbfc18684","0xbfc18798",
|
||||
"0xbfc188f0","0xbfc18990","0xbfc18d10","0xbfc192e4","0xbfc193c0","0xbfc1952c","0xbfc19630","0xbfc196d4","0xbfc19a58","0xbfc19df4",
|
||||
"0xbfc1a15c","0xbfc1a17c","0xbfc1a19c","0xbfc1a430","0xbfc1a5b0","0xbfc1a6ec","0xbfc1aa90","0xbfc1ac68","0xbfc1ae68","0xbfc1b7e0",
|
||||
"0xbfc1bd68","0xbfc1bee0","0xbfc1bf44","0xbfc1c130","0xbfc1c4c0","0xbfc1c78c","0xbfc1c8ec","0xbfc1c9b4","0xbfc1caf0","0xbfc1cbac",
|
||||
"0xbfc1cdd8","0xbfc1dbf4","0xbfc1ddd8","0xbfc1df50","0xbfc1e0c4","0xbfc1e10c","0xbfc1e3cc","0xbfc1f6ac","0xbfc1f980","0xbfc1ffa8",
|
||||
"0xbfc20338","0xbfc2069c","0xbfc20be4","0xbfc20c64","0xbfc20ce4","0xbfc20d4c","0xbfc20db4","0xbfc20e10","0xbfc20e6c","0xbfc20ec8",
|
||||
"0xbfc20f24","0xbfc20f8c","0xbfc20fe8","0xbfc21044","0xbfc210c0","0xbfc21128","0xbfc21184","0xbfc21200","0xbfc2125c","0xbfc212c4",
|
||||
"0xbfc21320","0xbfc213a4","0xbfc213fc","0xbfc214b0","0xbfc218cc","0xbfc2193c","0xbfc21a9c","0xbfc22164","0xbfc226d0","0xbfc228d8",
|
||||
"0xbfc22b80","0xbfc22e1c","0xbfc22e90","0xbfc23078","0xbfc230c4","0xbfc2311c","0xbfc232dc","0xbfc23500","0xbfc23524","0xbfc23d3c",
|
||||
"0xbfc24288","0xbfc24418","0xbfc24640","0xbfc24a48","0xbfc24f00","0xbfc251a8","0xbfc25200","0xbfc252bc","0xbfc2531c","0xbfc25390",
|
||||
"0xbfc254b0","0xbfc25558","0xbfc25754","0xbfc25b74","0xbfc25cc0","0xbfc25d8c","0xbfc25e8c","0xbfc25ef8","0xbfc2632c","0xbfc2644c",
|
||||
"0xbfc264a0","0xbfc26550","0xbfc265c0","0xbfc26610","0xbfc26670","0xbfc266b0","0xbfc268ec","0xbfc26c10","0xbfc26e64","0xbfc27190",
|
||||
"0xbfc273e4","0xbfc27868","0xbfc27910","0xbfc27a2c","0xbfc27b24","0xbfc27bdc","0xbfc27cc8","0xbfc27db0","0xbfc27e68","0xbfc27e88",
|
||||
"0xbfc27eb4","0xbfc28064","0xbfc28490","0xbfc284f0","0xbfc2886c","0xbfc28b84","0xbfc29770","0xbfc29ae0","0xbfc29fe8","0xbfc2a31c",
|
||||
"0xbfc2acd0","0xbfc2bf1c","0xbfc2bf74","0xbfc2c2f0","0xbfc2c3e0","0xbfc2ca9c","0xbfc2cae0","0xbfc2cb24","0xbfc2cb80","0xbfc2cc10",
|
||||
"0xbfc2ccc4","0xbfc2ce08","0xbfc2cf54","0xbfc2d0e0","0xbfc2e44c","0xbfc2e600","0xbfc2e65c","0xbfc2ed1c","0xbfc2ee6c","0xbfc2ef40",
|
||||
"0xbfc2f210","0xbfc2f618","0xbfc2f65c","0xbfc2f718","0xbfc2f808","0xbfc2f85c","0xbfc2f8ac","0xbfc2fcc4","0xbfc2fe6c","0xbfc3010c",
|
||||
"0xbfc3015c","0xbfc301ac","0xbfc3022c","0xbfc3029c","0xbfc302bc","0xbfc3031c","0xbfc30350","0xbfc3079c","0xbfc30868","0xbfc30960",
|
||||
"0xbfc30a80","0xbfc30df0","0xbfc31194","0xbfc31380","0xbfc313ec","0xbfc31448","0xbfc31580","0xbfc31638","0xbfc317d0","0xbfc31968",
|
||||
"0xbfc31c64","0xbfc31d14","0xbfc31dc4","0xbfc31e74","0xbfc322e4","0xbfc32410","0xbfc32450","0xbfc3255c","0xbfc32724","0xbfc32820",
|
||||
"0xbfc328f4","0xbfc329f0","0xbfc32ccc","0xbfc33138","0xbfc331a0","0xbfc33358","0xbfc33400","0xbfc34160","0xbfc34304","0xbfc344a4",
|
||||
"0xbfc345f4","0xbfc34748","0xbfc34898","0xbfc34b58","0xbfc36cf0","0xbfc36d1c","0xbfc36ec0","0xbfc36f90","0xbfc37028","0xbfc37070",
|
||||
"0xbfc370a0","0xbfc370f4","0xbfc37130","0xbfc3716c","0xbfc37334","0xbfc37368","0xbfc373e0","0xbfc37434","0xbfc374bc","0xbfc374ec",
|
||||
"0xbfc37838","0xbfc37868","0xbfc378b4","0xbfc37908","0xbfc37998","0xbfc37a4c","0xbfc37ac4","0xbfc38204","0xbfc382e0","0xbfc38524",
|
||||
"0xbfc387d4","0xbfc38a7c","0xbfc38be8","0xbfc38c68","0xbfc38dac","0xbfc39080","0xbfc39410","0xbfc394ec","0xbfc3954c","0xbfc39630",
|
||||
"0xbfc396e8","0xbfc39d38","0xbfc39e84","0xbfc39fe4","0xbfc3a094","0xbfc3a228","0xbfc3a2c0","0xbfc3aac4","0xbfc3ad68","0xbfc3b054",
|
||||
"0xbfc3b30c","0xbfc3b368","0xbfc3b85c","0xbfc3b93c","0xbfc3ba74","0xbfc3bd78","0xbfc3bd98","0xbfc3be6c","0xbfc3bf10","0xbfc3c060",
|
||||
"0xbfc3c140","0xbfc3c428","0xbfc3c4e0","0xbfc3c710","0xbfc3d810","0xbfc3d8c0","0xbfc3df20","0xbfc3e020","0xbfc3e110","0xbfc3e980",
|
||||
"0xbfc3ed40","0xbfc3edb4","0xbfc3eff0","0xbfc3f1b8","0xbfc3f2b4","0xbfc3f484","0xbfc3f4f0","0xbfc3f570","0xbfc3f5d8","0xbfc3f6f0",
|
||||
"0xbfc3f7e8","0xbfc3f8e4","0xbfc3f9ac","0xbfc3fa10","0xbfc3faec","0xbfc3fb74","0xbfc3fc50","0xbfc3fd0c","0xbfc3fdc8","0xbfc3fe60",
|
||||
"0xbfc3ff40","0xbfc40034","0xbfc400dc","0xbfc40184","0xbfc40260","0xbfc402dc","0xbfc40484","0xbfc40628","0xbfc406e0","0xbfc40700",
|
||||
"0xbfc407b8","0xbfc40b68","0xbfc40de8","0xbfc40f34","0xbfc4102c","0xbfc41200","0xbfc41258","0xbfc413b0","0xbfc413f4","0xbfc41458",
|
||||
"0xbfc41520","0xbfc41648","0xbfc41670","0xbfc41708","0xbfc417cc","0xbfc41848","0xbfc418c4","0xbfc4192c","0xbfc41a44","0xbfc41c80",
|
||||
"0xbfc41da4","0xbfc42014","0xbfc4203c","0xbfc42060","0xbfc42090","0xbfc420c0","0xbfc420f0","0xbfc42120","0xbfc42160","0xbfc42424",
|
||||
"0xbfc424a8","0xbfc42540","0xbfc425fc","0xbfc42640","0xbfc426dc","0xbfc4270c"
|
||||
]
|
||||
}
|
||||
@@ -1,22 +0,0 @@
|
||||
{
|
||||
"schema": "psxrecomp-v4 phase1d indirect_jump_classes v1",
|
||||
"total_sites": 196,
|
||||
"classes": {
|
||||
"a0_b0_c0_dispatch": {
|
||||
"count": 77,
|
||||
"sites": ["0xBFC0D884", "0xBFC0D894", "0xBFC0D8A4", "0xBFC0D8B4", "0xBFC0D8D4", "0xBFC0D954", "0xBFC0D974", "0xBFC0D984", "0xBFC0D994", "0xBFC0D9A4", "0xBFC0D9B4", "0xBFC0D9C4", "0xBFC0D9D4", "0xBFC0D9E4", "0xBFC0D9F4", "0xBFC0DA04", "0xBFC0DA14", "0xBFC0DA24", "0xBFC0DA34", "0xBFC0DA44", "0xBFC0DA54", "0xBFC0DA64", "0xBFC0DA74", "0xBFC0DA84", "0xBFC0DA94", "0xBFC0DAA4", "0xBFC0DAB4", "0xBFC0DAC4", "0xBFC0DAD4", "0xBFC0DAE4", "0xBFC0DAF4", "0xBFC0DB04", "0xBFC0DB14", "0xBFC0DB24", "0xBFC0DB34", "0xBFC0DB44", "0xBFC0DB54", "0xBFC0DB64", "0xBFC0DB74", "0xBFC0DB84", "0xBFC0DB94", "0xBFC0DBA4", "0xBFC0DBB4", "0xBFC0DBC4", "0xBFC0DBD4", "0xBFC0DBE4", "0xBFC0DBF4", "0xBFC0DC04", "0xBFC0DC14", "0xBFC0DC24", "0xBFC0DC34", "0xBFC0DC44", "0xBFC0DC54", "0xBFC16574", "0xBFC16584", "0xBFC16594", "0xBFC165A4", "0xBFC165B4", "0xBFC165C4", "0xBFC165D4", "0xBFC165E4", "0xBFC165F4", "0xBFC16604", "0xBFC16614", "0xBFC16624", "0xBFC16634", "0xBFC16644", "0xBFC16654", "0xBFC166A4", "0xBFC166B4", "0xBFC166C4", "0xBFC166D4", "0xBFC166E4", "0xBFC166F4", "0xBFC16704", "0xBFC16714", "0xBFC16724"]
|
||||
},
|
||||
"computed_call": {
|
||||
"count": 87,
|
||||
"sites": ["0xBFC02D5C", "0xBFC02E58", "0xBFC02E20", "0xBFC02FC8", "0xBFC0300C", "0xBFC03D58", "0xBFC07024", "0xBFC07130", "0xBFC0717C", "0xBFC09788", "0xBFC10908", "0xBFC10920", "0xBFC11718", "0xBFC12504", "0xBFC126A0", "0xBFC12748", "0xBFC1280C", "0xBFC128B4", "0xBFC12958", "0xBFC12A8C", "0xBFC1313C", "0xBFC13208", "0xBFC132D4", "0xBFC1339C", "0xBFC13468", "0xBFC13558", "0xBFC13594", "0xBFC136D8", "0xBFC137AC", "0xBFC13854", "0xBFC148D4", "0xBFC15F10", "0xBFC2D19C", "0xBFC2E73C", "0xBFC36D8C", "0xBFC36DBC", "0xBFC36E2C", "0xBFC36DE4", "0xBFC36E4C", "0xBFC36EA8", "0xBFC36F00", "0xBFC36F20", "0xBFC36F78", "0xBFC36FD0", "0xBFC37058", "0xBFC37088", "0xBFC370DC", "0xBFC37118", "0xBFC37154", "0xBFC371CC", "0xBFC37350", "0xBFC373A4", "0xBFC373C8", "0xBFC3741C", "0xBFC3748C", "0xBFC37568", "0xBFC376C0", "0xBFC376F8", "0xBFC37804", "0xBFC37880", "0xBFC38F5C", "0xBFC38F18", "0xBFC39738", "0xBFC39778", "0xBFC39D68", "0xBFC39D84", "0xBFC39DAC", "0xBFC39DC4", "0xBFC39DDC", "0xBFC39E28", "0xBFC39E6C", "0xBFC39EB4", "0xBFC39EDC", "0xBFC39EF4", "0xBFC39F0C", "0xBFC3A0C0", "0xBFC3A208", "0xBFC3A190", "0xBFC3A148", "0xBFC3A29C", "0xBFC42078", "0xBFC420A8", "0xBFC420D8", "0xBFC42108", "0xBFC42138", "0xBFC422B0", "0xBFC427A8"]
|
||||
},
|
||||
"computed_tail_call": {
|
||||
"count": 7,
|
||||
"sites": ["0xBFC00454", "0xBFC01938", "0xBFC10008", "0xBFC10018", "0xBFC10028", "0xBFC10038", "0xBFC10174"]
|
||||
},
|
||||
"jump_table": {
|
||||
"count": 25,
|
||||
"sites": ["0xBFC04F40", "0xBFC0B6B4", "0xBFC100D8", "0xBFC100F8", "0xBFC10118", "0xBFC10B10", "0xBFC11558", "0xBFC14D3C", "0xBFC151E0", "0xBFC1569C", "0xBFC160CC", "0xBFC161BC", "0xBFC1A664", "0xBFC1ACB4", "0xBFC1BE0C", "0xBFC1CE50", "0xBFC1E200", "0xBFC1E424", "0xBFC27EE8", "0xBFC2AD1C", "0xBFC30454", "0xBFC3054C", "0xBFC34D94", "0xBFC36D40", "0xBFC4052C"]
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1,259 +0,0 @@
|
||||
{
|
||||
"schema": "psxrecomp-v4 phase1d indirect_jump_ghidra_xref v1",
|
||||
"total_sites": 27,
|
||||
"note": "Ghidra cross-reference for every indirect jump site discovered in Phase 1c. Each entry records Ghidra's view of the containing function and its resolved targets (if any). Disagreements between the recompiler and Ghidra are flagged.",
|
||||
"sites": [
|
||||
{
|
||||
"pc": "0xBFC00454",
|
||||
"recompiler_classification": "computed_tail_call",
|
||||
"ghidra_function": "FUN_bfc00420",
|
||||
"ghidra_function_body": "bfc00420..bfc0045b",
|
||||
"ghidra_xref_from": {"target": "0xA0000500", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "ROM-to-RAM copy loop. Jumps to RAM copy at 0xA0000500. Ghidra resolved the target statically. Phase 1e relocation target."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC01938",
|
||||
"recompiler_classification": "computed_tail_call",
|
||||
"ghidra_function": "FUN_bfc01920",
|
||||
"ghidra_function_body": "bfc01920..bfc0193f",
|
||||
"ghidra_xref_from": {"target": "0xBFC0193C", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "Ghidra resolved target to 0xBFC0193C (within same function body). Likely a computed intra-function jump or dispatch."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC03D58",
|
||||
"recompiler_classification": "computed_call",
|
||||
"ghidra_function": "FUN_bfc03cf0",
|
||||
"ghidra_function_body": "bfc03cf0..bfc03d7b",
|
||||
"ghidra_xref_from": null,
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "JALR. Ghidra found no resolved targets (indirect call through register)."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC07024",
|
||||
"recompiler_classification": "computed_call",
|
||||
"ghidra_function": "FUN_bfc06ff0",
|
||||
"ghidra_function_body": "bfc06ff0..bfc0703b",
|
||||
"ghidra_xref_from": {"target": "0x80030000", "type": "COMPUTED_CALL"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "JALR into RAM at 0x80030000. This is likely the kernel entry point after BIOS init copies code to RAM. Phase 1e relocation target."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC07130",
|
||||
"recompiler_classification": "computed_call",
|
||||
"ghidra_function": "FUN_bfc0711c",
|
||||
"ghidra_function_body": "bfc0711c..bfc07147",
|
||||
"ghidra_xref_from": null,
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "JALR. Ghidra found no resolved targets."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0717C",
|
||||
"recompiler_classification": "computed_call",
|
||||
"ghidra_function": "FUN_bfc07148",
|
||||
"ghidra_function_body": "bfc07148..bfc07193",
|
||||
"ghidra_xref_from": null,
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "JALR. Ghidra found no resolved targets."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0D884",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0d880",
|
||||
"ghidra_function_body": "bfc0d880..bfc0d88b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub. Ghidra confirms target 0xB0."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0D894",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0d890",
|
||||
"ghidra_function_body": "bfc0d890..bfc0d89b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0D8A4",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0d8a0",
|
||||
"ghidra_function_body": "bfc0d8a0..bfc0d8ab",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0D8B4",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0d8b0",
|
||||
"ghidra_function_body": "bfc0d8b0..bfc0d8bb",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0D954",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0d950",
|
||||
"ghidra_function_body": "bfc0d950..bfc0d95b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0D9A4",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0d9a0",
|
||||
"ghidra_function_body": "bfc0d9a0..bfc0d9ab",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0D9B4",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0d9b0",
|
||||
"ghidra_function_body": "bfc0d9b0..bfc0d9bb",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0D9C4",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0d9c0",
|
||||
"ghidra_function_body": "bfc0d9c0..bfc0d9cb",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0D9E4",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0d9e0",
|
||||
"ghidra_function_body": "bfc0d9e0..bfc0d9eb",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DAE4",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0dae0",
|
||||
"ghidra_function_body": "bfc0dae0..bfc0daeb",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DB14",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0db10",
|
||||
"ghidra_function_body": "bfc0db10..bfc0db1b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DB24",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0db20",
|
||||
"ghidra_function_body": "bfc0db20..bfc0db2b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DB34",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0db30",
|
||||
"ghidra_function_body": "bfc0db30..bfc0db3b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DB44",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0db40",
|
||||
"ghidra_function_body": "bfc0db40..bfc0db4b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DB54",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0db50",
|
||||
"ghidra_function_body": "bfc0db50..bfc0db5b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DB64",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0db60",
|
||||
"ghidra_function_body": "bfc0db60..bfc0db6b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DB74",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0db70",
|
||||
"ghidra_function_body": "bfc0db70..bfc0db7b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DBF4",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0dbf0",
|
||||
"ghidra_function_body": "bfc0dbf0..bfc0dbfb",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DC14",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0dc10",
|
||||
"ghidra_function_body": "bfc0dc10..bfc0dc1b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DC24",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0dc20",
|
||||
"ghidra_function_body": "bfc0dc20..bfc0dc2b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
},
|
||||
{
|
||||
"pc": "0xBFC0DC34",
|
||||
"recompiler_classification": "a0_b0_c0_dispatch",
|
||||
"ghidra_function": "FUN_bfc0dc30",
|
||||
"ghidra_function_body": "bfc0dc30..bfc0dc3b",
|
||||
"ghidra_xref_from": {"target": "0x000000B0", "type": "COMPUTED_JUMP"},
|
||||
"ghidra_agrees_with_recompiler": true,
|
||||
"notes": "B0 dispatch stub."
|
||||
}
|
||||
],
|
||||
"disagreements": [],
|
||||
"summary": {
|
||||
"total_queried": 27,
|
||||
"ghidra_resolved_target": 23,
|
||||
"ghidra_no_resolved_target": 4,
|
||||
"disagreements": 0,
|
||||
"dispatch_stubs_all_target_B0": "All 21 A0/B0/C0 dispatch stubs target 0xB0 (B0 vector). No A0 or C0 stubs found in this discovery — those are reachable only through functions not yet discovered (Phases 1d/1e).",
|
||||
"relocation_targets": ["0xA0000500 (ROM-to-RAM copy jump)", "0x80030000 (kernel entry JALR)"]
|
||||
}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,700 +0,0 @@
|
||||
{
|
||||
"schema": "psxrecomp-v4 phase1b instruction_coverage v1",
|
||||
"inventory_source": "generated/instruction_inventory.json",
|
||||
"translator_source": "recompiler/src/strict_translator.cpp",
|
||||
"totals": {
|
||||
"inventory_buckets": 56,
|
||||
"implemented": 54,
|
||||
"missing": 0,
|
||||
"deferred": 2,
|
||||
"implemented_but_unused_in_inventory": 2
|
||||
},
|
||||
"rows": [
|
||||
{
|
||||
"bucket_key": "17|none|0",
|
||||
"primary_opcode_hex": "0x11",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "COP1",
|
||||
"category": "PRIVILEGED_OR_DATA",
|
||||
"count": 17,
|
||||
"first_example": "0xbfc0233c",
|
||||
"status": "deferred",
|
||||
"reason": "FPU; PS1 has no COP1 hardware. Decide after Phase 1c reachability proves whether the BIOS atof routines are live."
|
||||
},
|
||||
{
|
||||
"bucket_key": "49|none|0",
|
||||
"primary_opcode_hex": "0x31",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "LWC1",
|
||||
"category": "PRIVILEGED_OR_DATA",
|
||||
"count": 2,
|
||||
"first_example": "0xbfc02544",
|
||||
"status": "deferred",
|
||||
"reason": "FPU load; same rationale as COP1."
|
||||
},
|
||||
{
|
||||
"bucket_key": "16|rs_cop0|0",
|
||||
"primary_opcode_hex": "0x10",
|
||||
"sub_kind": "rs_cop0",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "MFC0",
|
||||
"category": "COP0",
|
||||
"count": 2,
|
||||
"first_example": "0xbfc01920",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x10 rs 0x00 (gpr[rt] = cop0[rd]; respects $zero via emit_gpr_write; no SR-write hooks)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "16|rs_cop0|4",
|
||||
"primary_opcode_hex": "0x10",
|
||||
"sub_kind": "rs_cop0",
|
||||
"sub_value_hex": "0x04",
|
||||
"mnemonic": "MTC0",
|
||||
"category": "COP0",
|
||||
"count": 13,
|
||||
"first_example": "0xbfc0023c",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x10 rs 0x04 (cop0[rd] = gpr[rt]; cop0[0] is Index, not zero; no IRQ delivery)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|32",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x20",
|
||||
"mnemonic": "ADD",
|
||||
"category": "CPU",
|
||||
"count": 1,
|
||||
"first_example": "0xbfc03d40",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x20 (overflow-checked, calls psx_arith_overflow on trap)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "8|none|0",
|
||||
"primary_opcode_hex": "0x08",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "ADDI",
|
||||
"category": "CPU",
|
||||
"count": 13,
|
||||
"first_example": "0xbfc00274",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x08 (overflow-checked, calls psx_arith_overflow on trap)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "9|none|0",
|
||||
"primary_opcode_hex": "0x09",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "ADDIU",
|
||||
"category": "CPU",
|
||||
"count": 7237,
|
||||
"first_example": "0xbfc00014",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp:141-151"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|33",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x21",
|
||||
"mnemonic": "ADDU",
|
||||
"category": "CPU",
|
||||
"count": 3806,
|
||||
"first_example": "0xbfc003dc",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x21"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|36",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x24",
|
||||
"mnemonic": "AND",
|
||||
"category": "CPU",
|
||||
"count": 165,
|
||||
"first_example": "0xbfc0128c",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x24"
|
||||
},
|
||||
{
|
||||
"bucket_key": "12|none|0",
|
||||
"primary_opcode_hex": "0x0C",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "ANDI",
|
||||
"category": "CPU",
|
||||
"count": 634,
|
||||
"first_example": "0xbfc0081c",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x0C (zero-extended imm)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "4|none|0",
|
||||
"primary_opcode_hex": "0x04",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "BEQ",
|
||||
"category": "CPU",
|
||||
"count": 2768,
|
||||
"first_example": "0xbfc00970",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x04 (terminator; PC-relative target = pc+4+simm*4)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "1|rt|1",
|
||||
"primary_opcode_hex": "0x01",
|
||||
"sub_kind": "rt",
|
||||
"sub_value_hex": "0x01",
|
||||
"mnemonic": "BGEZ",
|
||||
"category": "CPU",
|
||||
"count": 181,
|
||||
"first_example": "0xbfc00ed8",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp REGIMM rt 0x01 (terminator; signed compare against 0)"
|
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},
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||||
{
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|
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"sub_kind": "none",
|
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"sub_value_hex": "0x00",
|
||||
"mnemonic": "BGTZ",
|
||||
"category": "CPU",
|
||||
"count": 49,
|
||||
"first_example": "0xbfc01ab8",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x07 (terminator; signed compare against 0)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "6|none|0",
|
||||
"primary_opcode_hex": "0x06",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "BLEZ",
|
||||
"category": "CPU",
|
||||
"count": 131,
|
||||
"first_example": "0xbfc0151c",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x06 (terminator; signed compare against 0)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "1|rt|0",
|
||||
"primary_opcode_hex": "0x01",
|
||||
"sub_kind": "rt",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "BLTZ",
|
||||
"category": "CPU",
|
||||
"count": 25,
|
||||
"first_example": "0xbfc0113c",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp REGIMM rt 0x00 (terminator; signed compare against 0)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "5|none|0",
|
||||
"primary_opcode_hex": "0x05",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "BNE",
|
||||
"category": "CPU",
|
||||
"count": 1463,
|
||||
"first_example": "0xbfc00270",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x05 (terminator; PC-relative target = pc+4+simm*4)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|13",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x0D",
|
||||
"mnemonic": "BREAK",
|
||||
"category": "CPU",
|
||||
"count": 93,
|
||||
"first_example": "0xbfc012cc",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x0D (non-terminator; calls psx_break(cpu, code, pc) then return; no exception model)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|26",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
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|
||||
"mnemonic": "DIV",
|
||||
"category": "CPU",
|
||||
"count": 73,
|
||||
"first_example": "0xbfc07c7c",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x1A (signed; guards div-by-zero and INT32_MIN/-1 to match R3000A)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|27",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x1B",
|
||||
"mnemonic": "DIVU",
|
||||
"category": "CPU",
|
||||
"count": 18,
|
||||
"first_example": "0xbfc012a8",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x1B (unsigned; guards div-by-zero to match R3000A)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "2|none|0",
|
||||
"primary_opcode_hex": "0x02",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "J",
|
||||
"category": "CPU",
|
||||
"count": 2,
|
||||
"first_example": "0xbfc00070",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp:112-123"
|
||||
},
|
||||
{
|
||||
"bucket_key": "3|none|0",
|
||||
"primary_opcode_hex": "0x03",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "JAL",
|
||||
"category": "CPU",
|
||||
"count": 2606,
|
||||
"first_example": "0xbfc00680",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp:126-138"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|9",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x09",
|
||||
"mnemonic": "JALR",
|
||||
"category": "CPU",
|
||||
"count": 73,
|
||||
"first_example": "0xbfc02d5c",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x09"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|8",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x08",
|
||||
"mnemonic": "JR",
|
||||
"category": "CPU",
|
||||
"count": 716,
|
||||
"first_example": "0xbfc00454",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x08"
|
||||
},
|
||||
{
|
||||
"bucket_key": "32|none|0",
|
||||
"primary_opcode_hex": "0x20",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "LB",
|
||||
"category": "CPU",
|
||||
"count": 261,
|
||||
"first_example": "0xbfc00960",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x20 (sign-extended byte; $zero variant uses (void) to keep the read side effect; no alignment requirement)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "36|none|0",
|
||||
"primary_opcode_hex": "0x24",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "LBU",
|
||||
"category": "CPU",
|
||||
"count": 457,
|
||||
"first_example": "0xbfc00cc4",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x24 (zero-extended byte; $zero variant keeps read side effect; no alignment requirement)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "33|none|0",
|
||||
"primary_opcode_hex": "0x21",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "LH",
|
||||
"category": "CPU",
|
||||
"count": 527,
|
||||
"first_example": "0xbfc01040",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x21 (sign-extended halfword; 2-aligned; addr & 1 -> psx_unaligned_access)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "37|none|0",
|
||||
"primary_opcode_hex": "0x25",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "LHU",
|
||||
"category": "CPU",
|
||||
"count": 150,
|
||||
"first_example": "0xbfc08e44",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x25 (zero-extended halfword; 2-aligned; addr & 1 -> psx_unaligned_access)"
|
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},
|
||||
{
|
||||
"bucket_key": "15|none|0",
|
||||
"primary_opcode_hex": "0x0F",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "LUI",
|
||||
"category": "CPU",
|
||||
"count": 4122,
|
||||
"first_example": "0xbfc00000",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp:166-174"
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||||
},
|
||||
{
|
||||
"bucket_key": "35|none|0",
|
||||
"primary_opcode_hex": "0x23",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "LW",
|
||||
"category": "CPU",
|
||||
"count": 5482,
|
||||
"first_example": "0xbfc00334",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x23 (32-bit word; 4-aligned; addr & 3 -> psx_unaligned_access)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "34|none|0",
|
||||
"primary_opcode_hex": "0x22",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "LWL",
|
||||
"category": "CPU",
|
||||
"count": 6,
|
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"first_example": "0xbfc19598",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x22 (little-endian unaligned high-bytes load; merges with old rt; no alignment fault by design)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "38|none|0",
|
||||
"primary_opcode_hex": "0x26",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "LWR",
|
||||
"category": "CPU",
|
||||
"count": 6,
|
||||
"first_example": "0xbfc1959c",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x26 (little-endian unaligned low-bytes load; merges with old rt; no alignment fault by design)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|16",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x10",
|
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"mnemonic": "MFHI",
|
||||
"category": "CPU",
|
||||
"count": 45,
|
||||
"first_example": "0xbfc012b0",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x10 (read cpu->hi)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|18",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x12",
|
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"mnemonic": "MFLO",
|
||||
"category": "CPU",
|
||||
"count": 172,
|
||||
"first_example": "0xbfc012bc",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x12 (read cpu->lo)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|25",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x19",
|
||||
"mnemonic": "MULTU",
|
||||
"category": "CPU",
|
||||
"count": 115,
|
||||
"first_example": "0xbfc026e4",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x19 (uint64 product into HI:LO)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "NOP|none|0",
|
||||
"primary_opcode_hex": "NOP",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "NOP",
|
||||
"category": "CPU",
|
||||
"count": 3884,
|
||||
"first_example": "0xbfc00010",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp:54-59"
|
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},
|
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{
|
||||
"bucket_key": "0|funct|39",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x27",
|
||||
"mnemonic": "NOR",
|
||||
"category": "CPU",
|
||||
"count": 7,
|
||||
"first_example": "0xbfc11f40",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x27"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|37",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x25",
|
||||
"mnemonic": "OR",
|
||||
"category": "CPU",
|
||||
"count": 126,
|
||||
"first_example": "0xbfc001b0",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x25"
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||||
},
|
||||
{
|
||||
"bucket_key": "13|none|0",
|
||||
"primary_opcode_hex": "0x0D",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "ORI",
|
||||
"category": "CPU",
|
||||
"count": 485,
|
||||
"first_example": "0xbfc00004",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp:154-163"
|
||||
},
|
||||
{
|
||||
"bucket_key": "40|none|0",
|
||||
"primary_opcode_hex": "0x28",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "SB",
|
||||
"category": "CPU",
|
||||
"count": 703,
|
||||
"first_example": "0xbfc008d4",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x28 (byte store; no alignment requirement)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "41|none|0",
|
||||
"primary_opcode_hex": "0x29",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "SH",
|
||||
"category": "CPU",
|
||||
"count": 693,
|
||||
"first_example": "0xbfc0040c",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x29 (halfword store; 2-aligned; addr & 1 -> psx_unaligned_access)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|0",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "SLL",
|
||||
"category": "CPU",
|
||||
"count": 1680,
|
||||
"first_example": "0xbfc00820",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp:72-78"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|4",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x04",
|
||||
"mnemonic": "SLLV",
|
||||
"category": "CPU",
|
||||
"count": 10,
|
||||
"first_example": "0xbfc11f2c",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x04 (variable shift, rs[4:0] via & 0x1Fu mask)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|42",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x2A",
|
||||
"mnemonic": "SLT",
|
||||
"category": "CPU",
|
||||
"count": 166,
|
||||
"first_example": "0xbfc01180",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x2A"
|
||||
},
|
||||
{
|
||||
"bucket_key": "10|none|0",
|
||||
"primary_opcode_hex": "0x0A",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "SLTI",
|
||||
"category": "CPU",
|
||||
"count": 235,
|
||||
"first_example": "0xbfc02444",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x0A"
|
||||
},
|
||||
{
|
||||
"bucket_key": "11|none|0",
|
||||
"primary_opcode_hex": "0x0B",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "SLTIU",
|
||||
"category": "CPU",
|
||||
"count": 79,
|
||||
"first_example": "0xbfc00f00",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x0B (sign-extends imm then unsigned-compares)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|43",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x2B",
|
||||
"mnemonic": "SLTU",
|
||||
"category": "CPU",
|
||||
"count": 130,
|
||||
"first_example": "0xbfc003c0",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x2B"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|3",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x03",
|
||||
"mnemonic": "SRA",
|
||||
"category": "CPU",
|
||||
"count": 300,
|
||||
"first_example": "0xbfc016bc",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x03 (arithmetic right shift via int32_t cast, literal shamt)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|7",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x07",
|
||||
"mnemonic": "SRAV",
|
||||
"category": "CPU",
|
||||
"count": 5,
|
||||
"first_example": "0xbfc3c8f8",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x07 (variable arithmetic right, rs[4:0] via & 0x1Fu mask)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|2",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x02",
|
||||
"mnemonic": "SRL",
|
||||
"category": "CPU",
|
||||
"count": 94,
|
||||
"first_example": "0xbfc01ce4",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x02 (logical right shift, literal shamt)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|35",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x23",
|
||||
"mnemonic": "SUBU",
|
||||
"category": "CPU",
|
||||
"count": 517,
|
||||
"first_example": "0xbfc00ee0",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x23"
|
||||
},
|
||||
{
|
||||
"bucket_key": "43|none|0",
|
||||
"primary_opcode_hex": "0x2B",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "SW",
|
||||
"category": "CPU",
|
||||
"count": 4037,
|
||||
"first_example": "0xbfc0000c",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x2B (4-aligned; addr & 3 -> psx_unaligned_access)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "42|none|0",
|
||||
"primary_opcode_hex": "0x2A",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "SWL",
|
||||
"category": "CPU",
|
||||
"count": 6,
|
||||
"first_example": "0xbfc195a4",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x2A (unaligned high-bytes word store; no alignment fault by design)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "46|none|0",
|
||||
"primary_opcode_hex": "0x2E",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "SWR",
|
||||
"category": "CPU",
|
||||
"count": 6,
|
||||
"first_example": "0xbfc195a8",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x2E (unaligned low-bytes word store; no alignment fault by design)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|12",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x0C",
|
||||
"mnemonic": "SYSCALL",
|
||||
"category": "CPU",
|
||||
"count": 2,
|
||||
"first_example": "0xbfc0d8c4",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x0C (non-terminator; calls psx_syscall(cpu, gpr[2]) then return; no exception model)"
|
||||
},
|
||||
{
|
||||
"bucket_key": "0|funct|38",
|
||||
"primary_opcode_hex": "0x00",
|
||||
"sub_kind": "funct",
|
||||
"sub_value_hex": "0x26",
|
||||
"mnemonic": "XOR",
|
||||
"category": "CPU",
|
||||
"count": 28,
|
||||
"first_example": "0xbfc07528",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x26"
|
||||
},
|
||||
{
|
||||
"bucket_key": "14|none|0",
|
||||
"primary_opcode_hex": "0x0E",
|
||||
"sub_kind": "none",
|
||||
"sub_value_hex": "0x00",
|
||||
"mnemonic": "XORI",
|
||||
"category": "CPU",
|
||||
"count": 5,
|
||||
"first_example": "0xbfc14104",
|
||||
"status": "implemented",
|
||||
"source": "recompiler/src/strict_translator.cpp primary 0x0E (zero-extended imm)"
|
||||
}
|
||||
],
|
||||
"implemented_but_unused": [
|
||||
{
|
||||
"bucket_key": "0|funct|6",
|
||||
"mnemonic": "SRLV",
|
||||
"source": "recompiler/src/strict_translator.cpp SPECIAL funct 0x06 (variable logical right, rs[4:0] via & 0x1Fu mask; ISA-completeness exception, zero inventory hits)",
|
||||
"note": "Implemented in strict_translator but not observed in any walked BIOS function. May be needed for code that lives in copy-to-RAM bytes (exception handler) \u2014 re-evaluate after Phase 1e relocation work."
|
||||
},
|
||||
{
|
||||
"bucket_key": "16|rfe|0",
|
||||
"mnemonic": "RFE",
|
||||
"source": "recompiler/src/strict_translator.cpp:191-205",
|
||||
"note": "Implemented in strict_translator but not observed in any walked BIOS function. May be needed for code that lives in copy-to-RAM bytes (exception handler) \u2014 re-evaluate after Phase 1e relocation work."
|
||||
}
|
||||
]
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,34 +0,0 @@
|
||||
{
|
||||
"verification": [
|
||||
{
|
||||
"entry": "0xbfc00420",
|
||||
"ghidra_end": "0xbfc0045b",
|
||||
"walker_end": "0xbfc00677",
|
||||
"match": false
|
||||
},
|
||||
{
|
||||
"entry": "0xbfc00678",
|
||||
"ghidra_end": "0xbfc006a7",
|
||||
"walker_end": "0xbfc006a7",
|
||||
"match": true
|
||||
},
|
||||
{
|
||||
"entry": "0xbfc006a8",
|
||||
"ghidra_end": "0xbfc006d7",
|
||||
"walker_end": "0xbfc006d7",
|
||||
"match": true
|
||||
},
|
||||
{
|
||||
"entry": "0xbfc00b7c",
|
||||
"ghidra_end": "0xbfc00d9f",
|
||||
"walker_end": "0xbfc00d9f",
|
||||
"match": true
|
||||
},
|
||||
{
|
||||
"entry": "0xbfc4270c",
|
||||
"ghidra_end": "0xbfc42843",
|
||||
"walker_end": "0xbfc7ffff",
|
||||
"match": false
|
||||
}
|
||||
]
|
||||
}
|
||||
@@ -1,80 +0,0 @@
|
||||
# Address Normalization Rule — Phase 1e
|
||||
|
||||
## Rule
|
||||
|
||||
A function's identity is its **canonical physical address**, computed
|
||||
in two steps:
|
||||
|
||||
### Step 1: KSEG strip
|
||||
|
||||
physical = virtual_address & 0x1FFFFFFF
|
||||
|
||||
This removes the MIPS KSEG segment prefix. All four segments map to
|
||||
the same physical address space:
|
||||
|
||||
| Segment | Virtual range | Physical range |
|
||||
|---------|-----------------------|---------------------|
|
||||
| KUSEG | 0x00000000-0x7FFFFFFF | 0x00000000-0x1FFFFFFF |
|
||||
| KSEG0 | 0x80000000-0x9FFFFFFF | 0x00000000-0x1FFFFFFF |
|
||||
| KSEG1 | 0xA0000000-0xBFFFFFFF | 0x00000000-0x1FFFFFFF |
|
||||
| KSEG2 | 0xC0000000-0xFFFFFFFF | (memory-mapped I/O) |
|
||||
|
||||
### Step 2: ROM-to-RAM copy offset
|
||||
|
||||
If the physical address falls within the BIOS ROM copy source range,
|
||||
map it to the RAM destination:
|
||||
|
||||
if 0x1FC10000 <= physical <= 0x1FC18BEF:
|
||||
physical = physical - 0x1FC10000 + 0x00000500
|
||||
|
||||
This accounts for the single proven ROM-to-RAM copy performed by
|
||||
`FUN_bfc00420` during BIOS init:
|
||||
|
||||
| Property | Value |
|
||||
|-----------|--------------|
|
||||
| Source | ROM 0xBFC10000 (physical 0x1FC10000) |
|
||||
| Dest | RAM 0xA0000500 (physical 0x00000500) |
|
||||
| Length | 0x8BF0 bytes (35,824 bytes) |
|
||||
| Proof | generated/relocation_proofs/primary_copy/proof.json |
|
||||
|
||||
### Combined formula
|
||||
|
||||
normalize(addr):
|
||||
phys = addr & 0x1FFFFFFF
|
||||
if 0x1FC10000 <= phys <= 0x1FC18BEF:
|
||||
phys = phys - 0x1FC10000 + 0x00000500
|
||||
return phys
|
||||
|
||||
### Examples
|
||||
|
||||
| Input address | After KSEG strip | After ROM-to-RAM | Canonical |
|
||||
|---------------|------------------|-------------------|-----------|
|
||||
| 0xBFC10C74 | 0x1FC10C74 | 0x00001174 | 0x00001174 |
|
||||
| 0x80001174 | 0x00001174 | (not in ROM range) | 0x00001174 |
|
||||
| 0xA0001174 | 0x00001174 | (not in ROM range) | 0x00001174 |
|
||||
| 0xBFC00420 | 0x1FC00420 | (not in copy range) | 0x1FC00420 |
|
||||
| 0xBFC06EC4 | 0x1FC06EC4 | (not in copy range) | 0x1FC06EC4 |
|
||||
|
||||
## Evidence
|
||||
|
||||
- The copy parameters (source, destination, length) are all immediate
|
||||
constants in the BIOS code. No runtime computation is involved.
|
||||
- Ghidra decompilation confirms the loop structure and parameters.
|
||||
- 69 Ghidra-known functions fall within the copy source range.
|
||||
- The normalization formula maps all 69 ROM-source functions to their
|
||||
RAM-destination equivalents, producing 69 alias pairs.
|
||||
- No alias was added without tracing back to the proof artifact at
|
||||
`generated/relocation_proofs/primary_copy/proof.json`.
|
||||
|
||||
## Scope limitation
|
||||
|
||||
This rule covers only the single ROM-to-RAM copy identified in Phase
|
||||
1e. If additional copies are discovered in later phases (e.g., from
|
||||
RAM-side code that runs after the initial copy), the rule must be
|
||||
extended with new proof artifacts.
|
||||
|
||||
The exception vector trampoline at 0x80000080 is installed by
|
||||
intra-RAM code at ROM 0xBFC109B0 (RAM 0x80000EB0) which copies 16
|
||||
bytes from RAM 0x00000F0C to RAM 0x80000080. This is an intra-RAM
|
||||
copy (not ROM-to-RAM) and does not require a normalization entry
|
||||
because both addresses are already in RAM physical space.
|
||||
@@ -1,75 +0,0 @@
|
||||
{
|
||||
"schema": "psxrecomp-v4 phase1e relocation_proof v1",
|
||||
"copy_id": "primary_copy",
|
||||
"bios_function": "FUN_bfc00420",
|
||||
"bios_function_addr": "0xBFC00420",
|
||||
"source": {
|
||||
"address_start": "0xBFC10000",
|
||||
"address_end": "0xBFC18BEF",
|
||||
"physical_start": "0x1FC10000",
|
||||
"physical_end": "0x1FC18BEF",
|
||||
"rom_offset_start": "0x10000",
|
||||
"rom_offset_end": "0x18BEF",
|
||||
"segment": "KSEG1 ROM (0xBFCxxxxx)"
|
||||
},
|
||||
"destination": {
|
||||
"address_uncached": "0xA0000500",
|
||||
"address_cached": "0x80000500",
|
||||
"address_end_uncached": "0xA00090EF",
|
||||
"address_end_cached": "0x800090EF",
|
||||
"physical_start": "0x00000500",
|
||||
"physical_end": "0x000090EF",
|
||||
"segment": "KSEG1 RAM (0xA0xxxxxx), cached equivalent KSEG0 (0x80xxxxxx)"
|
||||
},
|
||||
"length_hex": "0x8BF0",
|
||||
"length_decimal": 35824,
|
||||
"instruction_count": 8956,
|
||||
"ghidra_functions_in_range": 69,
|
||||
"copy_mechanism": {
|
||||
"description": "Word-by-word copy loop with decrementing counter",
|
||||
"disassembly": [
|
||||
"bfc00420: lui a0, 0xBFC1 ; source = 0xBFC10000",
|
||||
"bfc00424: lui a1, 0xA000 ; dest = 0xA0000500 (uncached KSEG1)",
|
||||
"bfc00428: addiu a0, a0, 0x0 ;",
|
||||
"bfc0042c: ori a2, zero, 0x8BF0 ; length = 0x8BF0 bytes",
|
||||
"bfc00430: addiu a1, a1, 0x500 ;",
|
||||
"bfc00434: lw a3, 0(a0) ; loop: load word from source",
|
||||
"bfc00438: addi a2, a2, -4 ; decrement counter",
|
||||
"bfc0043c: addi a0, a0, 4 ; advance source",
|
||||
"bfc00440: addi a1, a1, 4 ; advance dest",
|
||||
"bfc00444: bne a2, zero, 0xBFC00434 ; loop until done",
|
||||
"bfc00448: sw a3, -4(a1) ; store word to dest (delay slot)",
|
||||
"bfc0044c: lui a0, 0xA000 ; jump target = 0xA0000500",
|
||||
"bfc00450: addiu a0, a0, 0x500 ;",
|
||||
"bfc00454: jr a0 ; execute from RAM copy",
|
||||
"bfc00458: nop"
|
||||
]
|
||||
},
|
||||
"ghidra_evidence": {
|
||||
"decompiler_output": "void FUN_bfc00420(void) { puVar1 = &DAT_bfc10000; iVar3 = 0x8bf0; puVar2 = (undefined4 *)&LAB_a0000500; do { uVar4 = *puVar1; iVar3 = iVar3 + -4; puVar1 = puVar1 + 1; *puVar2 = uVar4; puVar2 = puVar2 + 1; } while (iVar3 != 0); (*(code *)&LAB_a0000500)(); }",
|
||||
"source_confirmed": "All three parameters (source, dest, length) are immediate constants in the instruction stream, not register inputs. The copy is deterministic.",
|
||||
"function_body": "bfc00420..bfc0045b"
|
||||
},
|
||||
"duckstation_evidence": {
|
||||
"status": "verified",
|
||||
"method": "Launched DuckStation (duckstation-qt.exe) in BIOS-only mode. Connected to TCP debug server at 127.0.0.1:4371. Used read_ram command to dump 0x8BF0 bytes from RAM at 0x80000500 in 4KB chunks. Compared byte-for-byte against ROM source at offset 0x10000.",
|
||||
"verification_date": "2026-04-11",
|
||||
"frame_at_verification": 1909,
|
||||
"function_entry_comparison": {
|
||||
"total_aliased_functions": 69,
|
||||
"exact_match": 68,
|
||||
"mismatch": 1,
|
||||
"mismatch_detail": "FUN_bfc18254 (RAM 0x80008754): ROM has valid code bytes, RAM is zeroed. Near end of copy range (2459 bytes from end). Likely a data/workspace region that Ghidra misclassified as a function, overwritten by BIOS during normal operation."
|
||||
},
|
||||
"full_region_comparison": {
|
||||
"rom_sha256": "a8de3f83d6e20bc1362b6afe00e8b877549020a4be5db21b4735ff666ecde161",
|
||||
"ram_sha256": "08c945c9ae124e7cf490e2afa04f6b105368702b33ce83486c655a9566cff48c",
|
||||
"total_bytes": 35824,
|
||||
"mismatched_bytes": 1118,
|
||||
"note": "Full-region SHA256 mismatch is expected: the BIOS has been running for ~1900 frames and has modified RAM data (global variables, kernel tables) within the copied region. The 1118 mismatched bytes are in data areas, not code. All 68 true function entry points match byte-for-byte."
|
||||
},
|
||||
"conclusion": "Both Ghidra (static) and DuckStation (runtime) confirm the copy. Ghidra shows the copy loop with constant parameters. DuckStation confirms 68/69 function entries in RAM match ROM source bytes. The copy is proven."
|
||||
},
|
||||
"source_data_sha256": "a8de3f83d6e20bc1362b6afe00e8b877549020a4be5db21b4735ff666ecde161",
|
||||
"post_copy_execution": "After the copy, jr $a0 jumps to 0xA0000500 to execute the RAM copy. All subsequent BIOS execution runs from RAM addresses 0x80000500+ (cached) rather than ROM addresses 0xBFC10000+."
|
||||
}
|
||||
@@ -1,88 +0,0 @@
|
||||
# VBlank registrar — DuckStation dynamic diagnosis (2026-04-13)
|
||||
|
||||
## TL;DR — prior diagnosis was wrong
|
||||
|
||||
The previous handoff claimed "VBlank handler 0x8005A5BC is never installed in our runtime". **This is FALSE.** Dynamic TCP-probing of our own runtime proved the handler IS installed at 0x800DFEE0. The real gap is one level deeper: the **kernel's root-counter IRQ chain head** at `*(0xA000E014)` is null in our runtime but populated (=`0x000074A8`) in DuckStation.
|
||||
|
||||
## Method
|
||||
|
||||
Launched DuckStation headlessly (`./duckstation/build/bin/duckstation-qt.exe -bios -nogui -fastboot`) and connected to its TCP debug server on port 4371. Launched our own runtime on port 4370. Then diffed RAM state between the two at matching boot phases.
|
||||
|
||||
Tools added this session (all in `tools/`):
|
||||
- `duck_query.py`, `duck_query2.py`, `duck_query3.py`, `duck_query4.py`, `duck_query5.py` — focused state-diff scripts
|
||||
- `duck_search.py` — 2 MB RAM scan for marker addresses
|
||||
- `disasm_ram.py` — live disassembler over TCP (works against either runtime)
|
||||
- `scan_imm.py` — find addiu/ori instructions with a specific 16-bit immediate
|
||||
|
||||
## State comparison: our runtime vs DuckStation
|
||||
|
||||
| address | what | our runtime | DuckStation |
|
||||
|---|---|---|---|
|
||||
| 0x80079D9C | VSync counter | 0 (never ticks) | 0x254E (~9550, incrementing) |
|
||||
| 0x80079D48 | shell init-done flag | **0x1** (SET) | 0x1 |
|
||||
| 0x800DFEE0 | shell VBlank chain entry | **0x8005A5BC,0,0,0x8005A70C** (handler installed!) | 0x8005A5BC,0,0,0x8005A70C |
|
||||
| 0x800DFF40 | user VSync callback | 0 | 0 |
|
||||
| 0x80000100 | kernel PCB/TCB/EvCB table | identical to Duck | identical |
|
||||
| 0xA000E004 | DCB chain head 1 | 0x80140014 | 0x80140014 |
|
||||
| 0xA000E00C | DCB chain head 2 | 0x00006D88 | 0x00006D88 |
|
||||
| **0xA000E014** | **DCB chain head 3 (root counters)** | **0x00000000 — MISSING** | **0x000074A8 — populated** |
|
||||
| 0xA000E01C | DCB chain head 4 | 0x00006D98 | 0x00006D98 |
|
||||
| 0x8000E028 | EvCB | **all zeros — empty** | populated with 4 `0xF0000003` RCnt events |
|
||||
|
||||
**Our shell-level init (0xBFC42160) ran successfully** — 0x80079D48=1 and the 0x800DFEE0 table is populated. But the **kernel-level init that sets `*(0xA000E014)`** never ran.
|
||||
|
||||
## The kernel IRQ chain walker (at 0x80000C80, verified via live disasm)
|
||||
|
||||
The kernel exception handler walks four chain heads at 0xA000E004, 0xA000E00C, 0xA000E014, 0xA000E01C. For each non-null head, it iterates a linked list and calls each entry's `+0x08` function:
|
||||
|
||||
```
|
||||
0x80000DE4: addi $s4,$s3,32 ; iterate 4×8-byte slots in DCB
|
||||
0x80000DE8: lw $s6,0($s3) ; load chain head
|
||||
0x80000DF0: beq $s6,$zr, skip_null
|
||||
0x80000DF8: lw $s1,8($s6) ; handler fn
|
||||
0x80000DFC: lw $s0,4($s6) ; verify fn
|
||||
0x80000E08: jalr $s1 ; call handler
|
||||
0x80000E10: beq $v0,$zr, next
|
||||
0x80000E18: beq $s0,$zr, next
|
||||
0x80000E20: jalr $s0 ; call verify
|
||||
0x80000E28: lw $s6,0($s6) ; next link
|
||||
0x80000E30: bne $s6,$zr, loop
|
||||
0x80000E38: addi $s3,$s3,8 ; next chain head
|
||||
0x80000E3C: bne $s4,$s3, outer_loop
|
||||
```
|
||||
|
||||
With `*(0xA000E014)=0x000074A8` (Duck), the walker reaches a chain entry at `0x000074A8` containing `{next=0, verify=0x000049BC, handler=0x00004A4C}`. The handler is then responsible for walking the **shell-level** chain at 0x800DFEE0 and calling 0x8005A5BC.
|
||||
|
||||
Our runtime has `*(0xA000E014)=0` so the walker skips this chain head entirely — VBlank handler is never reached.
|
||||
|
||||
## The missing installer
|
||||
|
||||
The function that populates `*(0xA000E014)=0x000074A8` is:
|
||||
|
||||
- **`func_00004B90`** — ROM `0xBFC14690`, primary-copy alias RAM `0x80004B90`. Already seeded in dispatch table.
|
||||
- Calls `SysEnqIntRP(priority=2, chain_entry_ptr=0x800074A8)` via `jal 0xB0001420`.
|
||||
- 6 different kernel sites synthesize `0x000074A8`: 0xBFC146A8, 0xBFC146B8, 0xBFC1472C, 0xBFC14788, 0xBFC14798, 0xBFC14810 — all inside `InitRCnt`-family functions in kernel primary-copy region.
|
||||
- `func_00004B90` has one static caller: `0xBFC15C94` (inside `func_1FC15B9C` = **B0:0x15 / ChangeClearRCnt** — RAM alias `0x8000609C`, in our B0 table from DuckStation).
|
||||
- `func_1FC15B9C` has 0 static callers. One kernel B0:0x15 trampoline exists at `0xBFC0DAC0`, called statically from `0xBFC0C748` (inside `func_1FC0C720` — itself a 0-caller orphan).
|
||||
|
||||
## Remaining unknown
|
||||
|
||||
Who, in the kernel boot sequence, invokes B0:0x15 (`ChangeClearRCnt`) or directly calls `func_1FC15B9C` / `func_1FC0C720` with appropriate args during boot? In DuckStation this runs; in our runtime it does not. The call path is indirect (function-pointer, probably through an init-function-pointer table).
|
||||
|
||||
## No dispatch misses in our runtime
|
||||
|
||||
`psx_dispatch_misses.txt` and `psx_crash.txt` are absent (no dispatch misses, no traps). The runtime isn't failing — it's simply not executing the code path that populates the kernel IRQ chain. Some kernel boot function is returning early or not being reached at all.
|
||||
|
||||
## Next session
|
||||
|
||||
Options in priority order:
|
||||
|
||||
1. **Patch DuckStation** to log PC-level trace over a narrow window (first ~10k instructions from reset). Diff against our runtime's function-dispatch log to find the first function DuckStation enters that our runtime doesn't.
|
||||
2. **Add a custom `pc_break` command to DuckStation's debug server** (`duckstation/src/core/psxrecomp_debug_server.cpp`) — execute-breakpoint at `0xBFC14690`. When it fires, dump call stack to see who called it. This is a ~30-line patch + rebuild.
|
||||
3. **Instrument our runtime** with a dispatch-trace command that logs the first call to every function. Compare against the call tree expected by DuckStation.
|
||||
|
||||
Option 2 is cleanest: the existing `psxrecomp_debug_server.cpp` has `pause` / `continue` / `step N frames` — adding `pc_break` requires a per-instruction hook in the CPU core. More work than it sounds. Option 3 is easier and stays within our own codebase.
|
||||
|
||||
## Caveat about auto-memory
|
||||
|
||||
The handoff memory `phase4_vsync_diagnosis.md` now contains a false statement ("VSync counter 0x80079D9C never written; EvCB 0xF2000003 never opened; B0:0x15 orphaned"). The "never written" half is confirmed; the reason is different from what was guessed. Update on next session.
|
||||
@@ -1,126 +0,0 @@
|
||||
{
|
||||
"phase": 4,
|
||||
"session_date": "2026-04-13",
|
||||
"task": "Locate the code path that registers VBlank chain handler 0xBFC425BC",
|
||||
"classification": "PARTIALLY RESOLVED + UNKNOWN REMAINDER",
|
||||
|
||||
"resolved_findings": {
|
||||
"handler_rom_pc": "0xBFC425BC",
|
||||
"handler_ram_alias": "0x8005A5BC",
|
||||
"handler_seeded": true,
|
||||
"handler_dispatch_entry": "func_1FC425BC",
|
||||
|
||||
"registrar_rom_pc": "0xBFC42540",
|
||||
"registrar_ram_alias": "0x8005A540",
|
||||
"registrar_seeded": true,
|
||||
"registrar_dispatch_entry": "func_1FC42540",
|
||||
|
||||
"proof_registrar_synthesizes_handler": {
|
||||
"lui_site": "0xBFC42544 (lui $a1, 0x8006)",
|
||||
"addiu_site": "0xBFC4254C (addiu $a1, $a1, 0xA5BC)",
|
||||
"resulting_constant": "0x8005A5BC",
|
||||
"uniqueness": "only instance in entire 512KB ROM of 'addiu *,*,0xA5BC' is at 0xBFC4254C"
|
||||
},
|
||||
|
||||
"registrar_body_semantics": {
|
||||
"0xBFC42554": "jal 0xB005A090 with $a0=0 (root counter 0), $a1=handler",
|
||||
"note_0xB005A090": "RAM-side kernel routine (shell-copy region). normalize() in SCPH1001_dispatch.c maps phys 0x5A090 -> 0x1FC42090, which IS in dispatch table as func_1FC42090. So call is reachable by dispatcher.",
|
||||
"fallthrough": "on mismatch: calls 0xB005A980 ($a0=0), 0xB005AC00 ($a0=3,$a1=0), clears *0x800DFF40, returns 0x8005A5FC"
|
||||
}
|
||||
},
|
||||
|
||||
"static_callers_audit": {
|
||||
"method": "scanned every 4-byte-aligned J-format (jal/j) in ROM for target-match on both ROM (0xBFCxxxxx) and RAM (0x8005xxxx / 0xB005xxxx) aliases",
|
||||
"results": {
|
||||
"callers_of_0xBFC42540": 0,
|
||||
"callers_of_0x8005A540": 0,
|
||||
"callers_of_0xB005A540": 2,
|
||||
"caller_sites_0xB005A540": ["0xBFC42340", "0xBFC42604"],
|
||||
"callers_of_containing_functions": {
|
||||
"0xBFC42160_enclosing_0xBFC42340": 0,
|
||||
"0xBFC425FC_enclosing_0xBFC42604": 0,
|
||||
"ram_aliases_0x8005A160_and_0x8005A5FC": 0
|
||||
}
|
||||
},
|
||||
"synthesis_audit": {
|
||||
"method": "searched for lui/addiu (or lui/ori) pairs within 16 instructions that reconstruct each candidate address",
|
||||
"synthesizers_of_0x8005A160": 0,
|
||||
"synthesizers_of_0x8005A5FC": "1 (only the registrar's own return-value code at 0xBFC425AC-0xBFC425B0)",
|
||||
"synthesizers_of_0x80030000": 0,
|
||||
"synthesizers_of_0x80059C80_VSync_entry": 0,
|
||||
"synthesizers_of_0x80059FC0": 0,
|
||||
"literal_4byte_occurrences_of_0x8005A160": 1,
|
||||
"literal_0x8005A160_at": "0xBFC61D0C (in ROM data region)"
|
||||
}
|
||||
},
|
||||
|
||||
"irq_descriptor_table_candidate": {
|
||||
"location_rom": "0xBFC61D00..0xBFC61D14",
|
||||
"contents": {
|
||||
"+0x00": "0x80079D18 (state/data ptr)",
|
||||
"+0x04": "0x00000000",
|
||||
"+0x08": "0x8005A380 (func_1FC42380 — in dispatch table)",
|
||||
"+0x0C": "0x8005A160 (func_1FC42160 — in dispatch table, kernel init that calls registrar)",
|
||||
"+0x10": "0x8005A424 (func_1FC42424 — in dispatch table)",
|
||||
"+0x14": "0x00000000"
|
||||
},
|
||||
"nearby_strings": {
|
||||
"0xBFC61CD0": "\"pad.c, v1.1 1995/02/15 04:57:45 shima Ex\"",
|
||||
"0xBFC61D18": "\"intr.c, v1.1 1995/02/15 04:57:35 shima E\""
|
||||
},
|
||||
"interpretation": "callback descriptor for intr.c (root counter IRQ) subsystem. Three entries likely = {dispatch-on-IRQ, init, cleanup}. Walking this table is how the kernel hooks the VBlank chain.",
|
||||
"cross_reference_audit": {
|
||||
"synthesizers_of_0xBFC61D00": 0,
|
||||
"synthesizers_of_0xBFC61D08": 0,
|
||||
"synthesizers_of_0xBFC61CD0_or_0xBFC61D18": 0,
|
||||
"lui_BFC6_sites_in_rom": 8,
|
||||
"lui_BFC6_resolved_constants": ["0xBFC66000 (7 sites)", "0xBFC69D68 (remaining)"],
|
||||
"conclusion": "No statically-resolvable code path references 0xBFC61D00..0xBFC61D20. Table is either accessed via a pointer-to-pointer indirection (gp-relative, register-loaded from an earlier data struct, or sum-of-two-registers), OR the walker function itself is inside a region we have not yet discovered/seeded.",
|
||||
|
||||
"additional_negative_results_2026_04_13_late": {
|
||||
"addiu_or_ori_with_imm_0x1D00": 0,
|
||||
"addiu_or_ori_with_imm_0x1D08": 0,
|
||||
"addiu_or_ori_with_imm_0x1D0C": 0,
|
||||
"carry_form_lui_0xBFC7_sites": 1,
|
||||
"carry_form_lui_0xBFC7_resolves_to": "0xBFC7FF32 (not in target range)",
|
||||
"final_verdict": "No 16-bit immediate in the entire 512KB ROM matches the low-half of any address in the candidate table region. Table is provably unreachable by any standard lui+addiu, lui+ori, or lui-carry pattern. Either the table is dead data, or it is reached via pointer-indirection loaded from elsewhere in memory at runtime (only discoverable via dynamic trace)."
|
||||
}
|
||||
}
|
||||
},
|
||||
|
||||
"remaining_unknown": {
|
||||
"question": "What function (or data-driven init path) walks the callback descriptor table at 0xBFC61D00 and installs 0xBFC42160 / 0xBFC42540 into the active IRQ chain?",
|
||||
"why_static_analysis_stopped": [
|
||||
"zero static callers of 0xBFC42160 or 0xBFC425FC",
|
||||
"zero static synthesizers of 0x8005A160 / 0x8005A5FC",
|
||||
"zero references (lui/ori, lui/addiu, or 4-byte literal) to the candidate table at 0xBFC61D00",
|
||||
"the only 8 'lui *,0xBFC6' sites in ROM all resolve to 0xBFC66000 or 0xBFC69D68, never 0xBFC61xxx",
|
||||
"per Rule 14 (Unknown is acceptable. Guessing is not.) — stopping static search here"
|
||||
],
|
||||
"next_step_per_handoff_plan_step_1": {
|
||||
"action": "use DuckStation as oracle",
|
||||
"method_a": "execute-breakpoint at 0xBFC425BC; when it fires, dump call stack; outer frame identifies the caller",
|
||||
"method_b": "memory-read watchpoint on 0x80079D9C (VSync counter); when it fires inside handler, step back to find incoming $ra, then find what enqueued the handler onto the chain"
|
||||
}
|
||||
},
|
||||
|
||||
"runtime_state": {
|
||||
"observed": {
|
||||
"shell_running": true,
|
||||
"shell_entry_executed": "func_1FC18000 (via normalize() mapping RAM 0x80030000 -> ROM 0x1FC18000)",
|
||||
"vsync_counter_0x80079D9C": "never written (confirmed by wtrace ring)",
|
||||
"evcb_0x8000E028_to_0x8000E1F0": "zero-filled by InitEvent(16) at seq 42-57; no class-0xF2xxxxxx writes observed across 12s sample",
|
||||
"vsync_spin_at": "ra=0xBFC41D18 inside func_1FC41DA4 (40-100% of samples)"
|
||||
},
|
||||
"implication": "registrar 0xBFC42540 is seeded and callable by the dispatcher, but nothing in the running code actually reaches the `jal 0xB005A540` instruction at either 0xBFC42340 or 0xBFC42604."
|
||||
},
|
||||
|
||||
"tools_added_this_session": [
|
||||
"tools/disasm_helper.py — minimal MIPS disassembler helper",
|
||||
"tools/find_callers.py — find all ROM PCs that JAL/J to a given target",
|
||||
"tools/find_const.py — find all lui/addiu pairs synthesizing a given 32-bit constant",
|
||||
"tools/scan_literal.py — find 4-byte literal occurrences of an address in ROM",
|
||||
"tools/scan_range.py — find pointers within a given address range anywhere in ROM",
|
||||
"tools/scan_lui.py — list all 'lui *,X' instructions in ROM"
|
||||
]
|
||||
}
|
||||
@@ -1,3 +0,0 @@
|
||||
[
|
||||
{"address": "0xBFC02324", "reason": "addr=0xBFC0233C raw=0x44801000 opcode=0x11: top-level opcode 0x11 not implemented in Phase 1a"}
|
||||
]
|
||||
@@ -1,172 +0,0 @@
|
||||
[
|
||||
{
|
||||
"address": "0xBFC0233C",
|
||||
"raw_word": "0x44801000",
|
||||
"reason": "addr=0xBFC0233C raw=0x44801000 opcode=0x11: top-level opcode 0x11 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33CCC",
|
||||
"raw_word": "0x012A4822",
|
||||
"reason": "addr=0xBFC33CCC raw=0x012A4822 opcode=0x00: SPECIAL funct 0x22 not implemented in Phase 1a strict translator"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33FBC",
|
||||
"raw_word": "0x48C4C000",
|
||||
"reason": "addr=0xBFC33FBC raw=0x48C4C000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33FCC",
|
||||
"raw_word": "0x48C4D000",
|
||||
"reason": "addr=0xBFC33FCC raw=0x48C4D000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33F0C",
|
||||
"raw_word": "0x48C46800",
|
||||
"reason": "addr=0xBFC33F0C raw=0x48C46800 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33F2C",
|
||||
"raw_word": "0x48C4A800",
|
||||
"reason": "addr=0xBFC33F2C raw=0x48C4A800 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC3370C",
|
||||
"raw_word": "0x48C8E800",
|
||||
"reason": "addr=0xBFC3370C raw=0x48C8E800 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC35B4C",
|
||||
"raw_word": "0x48C88000",
|
||||
"reason": "addr=0xBFC35B4C raw=0x48C88000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC35B1C",
|
||||
"raw_word": "0x48C84000",
|
||||
"reason": "addr=0xBFC35B1C raw=0x48C84000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC35AEC",
|
||||
"raw_word": "0x48C80000",
|
||||
"reason": "addr=0xBFC35AEC raw=0x48C80000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC35B74",
|
||||
"raw_word": "0x48C82800",
|
||||
"reason": "addr=0xBFC35B74 raw=0x48C82800 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC36740",
|
||||
"raw_word": "0xC8800000",
|
||||
"reason": "addr=0xBFC36740 raw=0xC8800000 opcode=0x32: top-level opcode 0x32 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC36068",
|
||||
"raw_word": "0xC8800000",
|
||||
"reason": "addr=0xBFC36068 raw=0xC8800000 opcode=0x32: top-level opcode 0x32 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC362D0",
|
||||
"raw_word": "0x484D0000",
|
||||
"reason": "addr=0xBFC362D0 raw=0x484D0000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33FD8",
|
||||
"raw_word": "0x48C4D800",
|
||||
"reason": "addr=0xBFC33FD8 raw=0x48C4D800 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33FE4",
|
||||
"raw_word": "0x48C4E000",
|
||||
"reason": "addr=0xBFC33FE4 raw=0x48C4E000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33C98",
|
||||
"raw_word": "0x4884F000",
|
||||
"reason": "addr=0xBFC33C98 raw=0x4884F000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC0233C",
|
||||
"raw_word": "0x44801000",
|
||||
"reason": "addr=0xBFC0233C raw=0x44801000 opcode=0x11: top-level opcode 0x11 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC3370C",
|
||||
"raw_word": "0x48C8E800",
|
||||
"reason": "addr=0xBFC3370C raw=0x48C8E800 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33C98",
|
||||
"raw_word": "0x4884F000",
|
||||
"reason": "addr=0xBFC33C98 raw=0x4884F000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33CCC",
|
||||
"raw_word": "0x012A4822",
|
||||
"reason": "addr=0xBFC33CCC raw=0x012A4822 opcode=0x00: SPECIAL funct 0x22 not implemented in Phase 1a strict translator"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33F0C",
|
||||
"raw_word": "0x48C46800",
|
||||
"reason": "addr=0xBFC33F0C raw=0x48C46800 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33F2C",
|
||||
"raw_word": "0x48C4A800",
|
||||
"reason": "addr=0xBFC33F2C raw=0x48C4A800 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33FBC",
|
||||
"raw_word": "0x48C4C000",
|
||||
"reason": "addr=0xBFC33FBC raw=0x48C4C000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33FCC",
|
||||
"raw_word": "0x48C4D000",
|
||||
"reason": "addr=0xBFC33FCC raw=0x48C4D000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33FD8",
|
||||
"raw_word": "0x48C4D800",
|
||||
"reason": "addr=0xBFC33FD8 raw=0x48C4D800 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC33FE4",
|
||||
"raw_word": "0x48C4E000",
|
||||
"reason": "addr=0xBFC33FE4 raw=0x48C4E000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC35AEC",
|
||||
"raw_word": "0x48C80000",
|
||||
"reason": "addr=0xBFC35AEC raw=0x48C80000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC35B1C",
|
||||
"raw_word": "0x48C84000",
|
||||
"reason": "addr=0xBFC35B1C raw=0x48C84000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC35B4C",
|
||||
"raw_word": "0x48C88000",
|
||||
"reason": "addr=0xBFC35B4C raw=0x48C88000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC35B74",
|
||||
"raw_word": "0x48C82800",
|
||||
"reason": "addr=0xBFC35B74 raw=0x48C82800 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC36068",
|
||||
"raw_word": "0xC8800000",
|
||||
"reason": "addr=0xBFC36068 raw=0xC8800000 opcode=0x32: top-level opcode 0x32 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC362D0",
|
||||
"raw_word": "0x484D0000",
|
||||
"reason": "addr=0xBFC362D0 raw=0x484D0000 opcode=0x12: top-level opcode 0x12 not implemented in Phase 1a"
|
||||
},
|
||||
{
|
||||
"address": "0xBFC36740",
|
||||
"raw_word": "0xC8800000",
|
||||
"reason": "addr=0xBFC36740 raw=0xC8800000 opcode=0x32: top-level opcode 0x32 not implemented in Phase 1a"
|
||||
}
|
||||
]
|
||||
Reference in New Issue
Block a user