mirror of
https://github.com/RetroPortingToolKit/psxrecomp
synced 2026-10-26 10:19:47 -04:00
Matthew Stanley
fe42da2744
Keeps both lines: master's PGXP session, draw-distance clamps, masked rejects and saturated-winding NCLIP; the release's render-pass kit additions, verified media/disc extents, timeline/present rings, cull-scale sites. Overlay ABI v30. Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
350 lines
16 KiB
C
350 lines
16 KiB
C
#ifndef PSXRECOMP_SIO_H
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#define PSXRECOMP_SIO_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Logical pad count. Default 2 (port1=pad0, port2=pad1).
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* PSX_MAX_PLAYERS 5..7: one SCPH-1070 (sio_set_multitap_port) + opposite pad.
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* PSX_MAX_PLAYERS 8: dual multitap (port1 pads 0–3, port2 pads 4–7). */
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#ifndef PSX_MAX_PLAYERS
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#define PSX_MAX_PLAYERS 2
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#endif
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#if PSX_MAX_PLAYERS < 1 || PSX_MAX_PLAYERS > 8
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#error "PSX_MAX_PLAYERS must be in 1..8"
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#endif
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/* Per-pad table initializer: repeat one element PSX_MAX_PLAYERS times.
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*
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* static uint16_t pad_buttons[PSX_MAX_PLAYERS] = { PSX_PAD_INIT(0xFFFF) };
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*
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* GNU's [0 ... PSX_MAX_PLAYERS - 1] = x range designator says this in one
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* token, but it is a GCC extension with no MSVC equivalent, so the element
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* list is expanded by the preprocessor instead. Each PSX_PAD_REP_n is written
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* flat rather than recursively so no nested macro call is involved and the
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* expansion is identical under both the conforming and the traditional MSVC
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* preprocessor. Variadic so a braced element ({ 0x80, 0x80, 0x80, 0x80 })
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* survives argument splitting. The 1..8 bound above is what makes the ladder
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* finite; a value outside it fails the #error before reaching an undefined
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* PSX_PAD_REP_n. The count always matches the array extent because both are
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* spelled PSX_MAX_PLAYERS. */
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#define PSX_PAD_REP_1(...) __VA_ARGS__
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#define PSX_PAD_REP_2(...) __VA_ARGS__, __VA_ARGS__
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#define PSX_PAD_REP_3(...) __VA_ARGS__, __VA_ARGS__, __VA_ARGS__
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#define PSX_PAD_REP_4(...) __VA_ARGS__, __VA_ARGS__, __VA_ARGS__, __VA_ARGS__
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#define PSX_PAD_REP_5(...) \
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__VA_ARGS__, __VA_ARGS__, __VA_ARGS__, __VA_ARGS__, __VA_ARGS__
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#define PSX_PAD_REP_6(...) \
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__VA_ARGS__, __VA_ARGS__, __VA_ARGS__, __VA_ARGS__, __VA_ARGS__, \
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__VA_ARGS__
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#define PSX_PAD_REP_7(...) \
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__VA_ARGS__, __VA_ARGS__, __VA_ARGS__, __VA_ARGS__, __VA_ARGS__, \
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__VA_ARGS__, __VA_ARGS__
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#define PSX_PAD_REP_8(...) \
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__VA_ARGS__, __VA_ARGS__, __VA_ARGS__, __VA_ARGS__, __VA_ARGS__, \
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__VA_ARGS__, __VA_ARGS__, __VA_ARGS__
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/* Two layers so PSX_MAX_PLAYERS expands to its value before the ## paste. */
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#define PSX_PAD_REP_JOIN(n, ...) PSX_PAD_REP_##n(__VA_ARGS__)
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#define PSX_PAD_REP_EXPAND(n, ...) PSX_PAD_REP_JOIN(n, __VA_ARGS__)
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#define PSX_PAD_INIT(...) PSX_PAD_REP_EXPAND(PSX_MAX_PLAYERS, __VA_ARGS__)
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/* SIO0 register base: 0x1F801040 */
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#define SIO_BASE 0x1F801040
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/* Phase 1.0c-v2: cycle-paced SIO model. Default 1 enables the dispatch-
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* loop quantum tick (gated by g_sio_timing_active). Set to 0 to revert
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* to legacy access-paced behavior across all callers. */
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#ifndef SIO_MODEL_CYCLE_PACED
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#define SIO_MODEL_CYCLE_PACED 1
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#endif
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void sio_init(void);
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/* MMIO read/write (0x1F801040-0x1F80104E) */
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uint32_t sio_read(uint32_t addr);
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void sio_write(uint32_t addr, uint32_t value);
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/* Advance SIO timing by `cycles` PSX cycles.
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*
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* In cycle-paced mode (SIO_MODEL_CYCLE_PACED=1, default in 1.0c+): walks
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* shift-complete and ACK-fire events scheduled in cycles ahead. In 1.0c
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* the shifter is never armed (TX path still synchronous), so the body
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* is effectively inert. Phase 1.0d will route TX through the shifter.
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*
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* The legacy access-paced IRQ countdown body always runs and is the
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* actual IRQ delivery mechanism in 1.0c. */
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void sio_tick(int cycles);
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/* Convenience: advance SIO by the dispatch-loop quantum. Called from
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* psx_check_interrupts inside !in_exception, gated by g_sio_timing_active
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* (no-op when no SIO cycle-paced work is pending). No-op under macro=0. */
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void sio_tick_quantum(void);
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/* Hot-path active guard. Set to 1 when sio_shift / sio_pending_ack /
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* buffer arms; cleared when all three empty. */
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extern volatile int g_sio_timing_active;
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/* Phase 1.0e-e1: peripheral-only cycle advance. Drives shifter+ack
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* scheduler. Does NOT touch the legacy sio_irq_pending/countdown. Safe
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* to call from psx_advance_cycles per emitted block. No-op when
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* g_sio_timing_active is 0. */
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void sio_advance(uint32_t cycles);
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/* Cycle-budgeted precise event slicing: guest CPU cycles until a DELIVERABLE
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* SIO IRQ (bit7 unmasked in i_mask). UINT32_MAX if none. */
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uint32_t sio_cycles_to_irq(uint32_t i_mask);
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/* Telemetry counters for sio_advance. */
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uint64_t sio_get_advance_called(void);
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uint64_t sio_get_advance_with_work(void);
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/* SCPH-1070 multitap. Off by default. When enabled (PSX_MAX_PLAYERS>=5):
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* multitap_port==0 (console Port 1): tap on phys0 → logical pads 0–3,
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* phys1 → logical 4.
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* multitap_port==1 (console Port 2): phys0 → logical 0, tap on phys1 →
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* logical pads 1–4 (Bomberman Party Edition and a few others).
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* Bulk 0x80 responses follow the real TAP/REQ latch (psx-spx): REQ=1 in the
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* third command byte arms the *next* transfer; empty tap slots are fine. */
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void sio_set_multitap(int enabled);
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int sio_get_multitap(void);
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/* phys_port: 0 = console Port 1, 1 = console Port 2. Default 0. */
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void sio_set_multitap_port(int phys_port);
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int sio_get_multitap_port(void);
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/* Tomba-only legacy pad config path ([controller] legacy_pad_config). */
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void sio_set_legacy_cfg(int enabled);
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int sio_get_legacy_cfg(void);
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/* 1 when multitap is armed and `logical_slot` is a tap pad (not the lone
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* pad on the opposite console port). SCPH-1070 taps are treated as plain
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* digital controllers (0x41) by default — DualShock/analog on a tap is not
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* reliable across titles. Opt in with sio_set_multitap_analog(1) (hack). */
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int sio_pad_on_multitap(int logical_slot);
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/* Opt-in DualShock-on-tap hack. Off by default. When on, tap seats may
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* report 0x73 + stick bytes in multitap bulk status (and host/netplay
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* sampling stops forcing digital). game.toml [controller] multitap_analog /
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* settings.toml / lobby match_caps may enable this. */
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void sio_set_multitap_analog(int enabled);
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int sio_get_multitap_analog(void);
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/* Update pad button state. Buttons use PS1 convention: 0=pressed, 1=released.
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Bit layout: SELECT, L3, R3, START, UP, RIGHT, DOWN, LEFT,
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L2, R2, L1, R1, TRIANGLE, CIRCLE, CROSS, SQUARE
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sio_set_pad_state targets logical pad 0; the _slot form targets
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logical pad 0 .. PSX_MAX_PLAYERS-1. */
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void sio_set_pad_state(uint16_t buttons);
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void sio_set_pad_state_slot(int slot, uint16_t buttons);
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/* Set the analog stick state + pad type for a logical pad. enabled selects the
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* emulated pad: 0 = digital (poll id 0x41), 1 = DualShock/analog (poll id
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* 0x73, with the four 0..255 stick axes appended; 0x80 = centred). */
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void sio_set_pad_analog(int slot, int enabled,
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uint8_t lx, uint8_t ly, uint8_t rx, uint8_t ry);
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/* Per-frame input plumbing for the coherent-DualShock model. Update the sticks
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* every frame with sio_set_pad_sticks; change the reported pad type with
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* sio_request_pad_type (the emulated "analog button"), which is applied
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* atomically at the next idle, non-config bus boundary so a hybrid stick/d-pad
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* flip can never split a poll or a config handshake. Do NOT call
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* sio_set_pad_analog every frame for the type — that is for boot/hotplug only. */
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void sio_set_pad_sticks(int slot, uint8_t lx, uint8_t ly, uint8_t rx, uint8_t ry);
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void sio_request_pad_type(int slot, int analog);
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/* Connect / disconnect a logical pad (0 .. PSX_MAX_PLAYERS-1). By default no
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* pads are connected during initial BIOS boot. */
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void sio_connect_pad(int slot);
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void sio_set_pad_connected(int slot, int connected);
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/* Netplay / rematch: force a peer-identical pad topology + idle bus.
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* Immediate digital (not deferred type_req), connected seats 0..slot_count-1,
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* pad FSM IDLE, cleared response buffer. Call at session start and before
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* dig0 snap so baseline_ext/sio pads cannot fork on local DualShock vs
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* keyboard seeding. */
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void sio_netplay_canonicalize_session_pads(int slot_count);
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/* Declare whether the pad on a logical slot is a config-capable DualShock (1)
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* or a plain digital controller (0). A real digital controller (SCPH-1080,
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* poll id 0x41) does NOT answer the config-mode commands (0x43/0x44/0x45/
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* 0x46/0x47/0x4C/0x4D/0x4F) — it returns hi-z / no ACK, so a game's pad
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* driver classifies it as digital-only and just polls with 0x42. A DualShock
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* answers them. Set from the per-player pad mode (DIGITAL => 0, ANALOG/HYBRID
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* => 1) at boot/hotplug. Default is 1 (config-capable) so existing
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* analog/hybrid behaviour is unchanged. */
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void sio_set_pad_config_capable(int slot, int capable);
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/* Read the raw DualShock motor state selected by the guest's 0x4D rumble map
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* and most recent 0x42 poll. `small` is the fixed-strength high-frequency
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* motor byte; `large` is the variable-strength low-frequency motor byte.
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* The frontend translates these values to its host controller API. */
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void sio_get_pad_rumble(int slot, uint8_t *small, uint8_t *large);
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/* Return current pad button state (for debug server). _slot targets a logical
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* pad 0 .. PSX_MAX_PLAYERS-1. */
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uint16_t sio_get_pad_buttons(void);
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uint16_t sio_get_pad_buttons_slot(int slot);
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/* Side-effect-FREE SIO register peeks for the debug/observability path ONLY.
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* NEVER use these for the guest bus — the guest must call sio_read() (which keeps
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* its hardware side effects: sio_tick, ACK-clear, RX-FIFO-pop). These let the
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* debug server sample SIO without perturbing the pad/memcard handshake. */
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uint16_t sio_peek_stat(void);
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uint16_t sio_peek_ctrl(void);
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uint8_t sio_peek_rx_data(void);
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/* Debug accessors: is a logical pad connected, and is it in analog mode. */
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int sio_get_pad_connected(int slot);
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int sio_get_pad_analog(int slot);
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void sio_get_pad_sticks(int slot, uint8_t out[4]);
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/* ---- SIO byte-level trace ring buffer ----
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* 1M entries × ~28 B ≈ 32 MB. At ~600 byte/sec that's ~30 min of history. */
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#define SIO_TRACE_CAP (1 << 20)
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typedef struct {
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uint32_t seq; /* monotonic sequence number */
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uint8_t tx; /* byte written to TX */
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uint8_t rx; /* byte produced in RX */
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uint8_t mc_state_pre; /* mc_state BEFORE processing */
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uint8_t mc_state_post; /* mc_state AFTER processing */
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uint8_t dev_pre; /* active_device BEFORE (0=NONE,1=PAD,2=MC) */
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uint8_t dev_post; /* active_device AFTER */
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uint16_t ctrl; /* CTRL register value */
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uint32_t func_addr; /* g_debug_current_func_addr */
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uint8_t was_abort; /* 1 if this byte caused mc_state abort */
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uint8_t irq_countdown; /* sio_irq_countdown at entry */
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uint8_t in_exception; /* psx_get_in_exception() at time of byte */
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uint8_t counter_7514; /* RAM[0x7514] at time of byte */
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uint32_t cop0_sr; /* COP0 SR at time of byte (IEc=bit0, IM2=bit10) */
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/* Saved slot states captured AT TRACE TIME (after the byte was processed
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* and any mc_save/load_slot has run). Lets the audit show whether a
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* SELECT-deassert preserved state into the next 0x81. */
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uint8_t slot0_state;
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uint8_t slot1_state;
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} SioTraceEntry;
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/* Get pointer to ring buffer and current write index.
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* Returns number of entries ever written (seq of next write). */
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uint32_t sio_get_trace(const SioTraceEntry **buf_out, int *write_idx_out);
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/* Current SIO byte sequence — used by SIO PC tracer for cross-referencing. */
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uint32_t sio_get_seq(void);
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/* Returns 1 if a memcard protocol exchange is in progress on either
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* slot. Callers (notably the VBlank scheduler) use this to defer
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* interrupt delivery so the BIOS's pad polling routine — which fires
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* from the VBlank handler — doesn't preempt an in-flight card
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* transaction by issuing 0x01 on the SIO bus mid-read. */
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int sio_card_protocol_active(void);
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/* Post-probe handoff ring: diagnostic device state only, no guest-RAM probes. */
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typedef struct {
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uint8_t kind; /* 1=probe_abort 2=b7_set 3=b7_clear 4=tx 5=card_ack */
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uint8_t byte;
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uint16_t imask;
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uint32_t pc;
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uint32_t func;
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uint32_t ctrl;
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uint32_t stat;
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uint32_t card_state;
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uint64_t cyc;
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} SioCardHandoffEntry;
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const SioCardHandoffEntry *sio_get_card_handoff(int *idx_out, int *count_out);
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int sio_card_handoff_cap(void);
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int sio_card_handoff_armed(void);
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void sio_card_handoff_on_imask(uint32_t old_mask, uint32_t new_mask);
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/* Netplay deferred-present coexistence: 1 while native memcard SIO is
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* busy and still making progress. Callers keep s_present_pending and
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* retry later so BB-edge finish_frame does not run mid card busy-wait
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* (Ape Escape empty-starfield wedge; same class of risk on other titles).
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* Returns 0 after ~10 VBlanks with no SIO seq progress so a wedged card
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* FSM cannot stall commit forever (mirrors VBlank-for-SIO stale escape). */
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int sio_hold_present_for_card(void);
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/* Snapshot SIO IRQ-pacing internals for the freeze_check diagnostic. */
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void sio_get_freeze_diag(int *out_irq_pending, int *out_irq_countdown,
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uint16_t *out_sio_stat, uint16_t *out_sio_ctrl,
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int *out_card_active);
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/* ---- Card transaction ring buffer ----
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*
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* One entry per card protocol transaction (0x81 → terminal state / abort).
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* Always-on. 64K entries × ~544 B ≈ 35 MB — holds tens of minutes of card
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* activity at typical detection-cycle rates. */
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#define SIO_TXN_CAP (1 << 16)
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#define SIO_TXN_MAX_BYTES 256
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typedef enum {
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SIO_TXN_END_OPEN = 0, /* still in progress (only on the live txn) */
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SIO_TXN_END_SUCCESS = 1, /* mc_state reached IDLE via natural progression */
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SIO_TXN_END_ABORT_RESELECT= 2, /* 0x81 received while txn already non-IDLE */
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SIO_TXN_END_ABORT_RESET = 3, /* CTRL.RESET written */
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SIO_TXN_END_ABORT_SLOT = 4, /* slot mismatch reset (DEV_NONE non-0x81 path) */
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SIO_TXN_END_ABORT_BAD_CMD = 5, /* CMD byte not 0x52/0x57/0x53 */
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SIO_TXN_END_ABORT_OTHER = 6, /* state machine fell through */
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} SioTxnEndReason;
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typedef struct {
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uint32_t txn_seq; /* monotonic transaction id */
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uint32_t start_byte_seq; /* SIO byte ring seq at first byte of txn */
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uint32_t end_byte_seq; /* SIO byte ring seq at last byte (inclusive) */
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uint32_t start_func; /* g_debug_current_func_addr at first byte */
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uint32_t end_func; /* g_debug_current_func_addr at last byte */
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uint8_t slot; /* mc_slot when txn opened */
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uint8_t cmd; /* 0x52/0x57/0x53 once observed; 0 before */
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uint16_t sector; /* 0xFFFF if address phase not reached */
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uint16_t ack_count; /* SIO ACKs returned during txn */
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uint8_t terminal_state; /* mc_state at termination */
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uint8_t end_reason; /* SioTxnEndReason */
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uint16_t byte_count; /* total bytes processed (may exceed MAX_BYTES) */
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uint8_t tx[SIO_TXN_MAX_BYTES];
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uint8_t rx[SIO_TXN_MAX_BYTES];
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} SioTxnEntry;
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/* Returns ring buffer + next-write index + whether a live txn is currently
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* open. The live txn (when open_out=1) is NOT yet in the ring; query
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* sio_get_card_txn_live() if you want it too. Total seq = number of CLOSED
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* transactions ever recorded. */
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uint32_t sio_get_card_txns(const SioTxnEntry **buf_out, int *write_idx_out, int *open_out);
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/* Returns pointer to live (open) txn, or NULL if none. Lifetime: pointer
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* is valid until the next sio_process_byte call. */
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const SioTxnEntry *sio_get_card_txn_live(void);
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/* ---- SIO IRQ #7 delivery ring ----
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*
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* Captures every time IRQ #7 (SIO0) is raised into I_STAT. Always-on.
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* 1M entries × ~64 B ≈ 64 MB — holds tens of minutes of IRQ history. */
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#define SIO_IRQ_RING_CAP (1 << 20)
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typedef enum {
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SIO_IRQ_SRC_UNKNOWN = 0,
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SIO_IRQ_SRC_CARD_ACK = 1, /* IRQ from card-side ACK after card byte */
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SIO_IRQ_SRC_PAD_ACK = 2, /* IRQ from pad-side ACK after pad byte */
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} SioIrqSource;
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typedef struct {
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uint32_t seq;
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uint32_t byte_seq; /* corresponding sio_trace_seq when this IRQ was scheduled */
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uint32_t i_stat_before; /* I_STAT just before raising bit 7 */
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uint32_t i_stat_after; /* I_STAT immediately after */
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uint32_t mc_state; /* mc_state at time of fire */
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uint32_t active_device; /* DEV_NONE/PAD/MEMCARD at time of fire */
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uint32_t ctrl; /* sio_ctrl at fire */
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uint32_t func_addr; /* g_debug_current_func_addr at fire */
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uint32_t counter_7514; /* card chain counter byte at fire */
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uint8_t source; /* SioIrqSource */
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uint8_t slot; /* selected_slot at fire */
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uint8_t delay_applied; /* the SIO_IRQ_DELAY_* value used */
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uint8_t pad;
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} SioIrqEntry;
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uint32_t sio_get_irq_ring(const SioIrqEntry **buf_out, int *write_idx_out);
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#ifdef __cplusplus
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}
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#endif
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#endif /* PSXRECOMP_SIO_H */
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