mirror of
https://github.com/RetroPortingToolKit/psxrecomp
synced 2026-10-26 02:11:36 -04:00
Alexandros Mandravillis
8f8325a2fe
With the HLE scheduler (the default), ChangeThread to the thread that is already running returns 1 from psx_request_thread_switch. psx_syscall case 3 then returned 0 with cpu->pc still holding the SYSCALL's own address. Compiled callers fall through on 0, but the dirty-RAM interpreter transfers whenever cpu->pc is non-zero, so it re-executed the SYSCALL forever. A game that yields from its main thread this way hung at the kernel's SYSCALL (EPC 0x650) as soon as that kernel code ran interpreted, for example when its body did not match the compiled kernel. Clear cpu->pc on that continuation, as the SYS01/02 continuations do. The guest-exception syscall path returns before case 3 and is unchanged. syscall_change_thread_self links the production traps.c into a fixture with a one-thread TCB table at -O0 and -O2. fixture_link.py stubs every other runtime seam with abort(), so an unexpected call fails the test.
81 lines
3.2 KiB
C
81 lines
3.2 KiB
C
/* ChangeThread to the running thread must continue after the SYSCALL.
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*
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* A game can yield from its main thread with ChangeThread(<main thread>)
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* while that thread is current; the kernel then reaches SYSCALL 3 (at 0x650
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* in the retail kernel). The dirty-RAM interpreter sets cpu->pc to the
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* SYSCALL before psx_syscall and transfers to cpu->pc when it is non-zero.
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* The HLE scheduler's same-thread branch returned without clearing it, so the
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* interpreter re-executed the SYSCALL forever. This drives the real traps.c
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* case 3 with the HLE scheduler (the default) and a one-thread TCB table. */
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#include <assert.h>
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#include <stdint.h>
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#include <string.h>
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#include "cpu_state.h"
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#define PCB_ADDR 0x0000E000u /* [0x108]: the process control block */
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#define TCB_BASE 0x0000E1F4u /* [0x110]: first TCB, the main thread */
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#define TCB_SIZE (4u * 0xC0u) /* [0x114]: four TCBs */
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#define SYSCALL_PC 0x00000650u
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static uint32_t ram[0x10000u / 4u];
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static unsigned same_thread_events, other_thread_events;
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static uint32_t read_word(uint32_t address) {
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assert(address < sizeof(ram) && (address & 3u) == 0u);
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return ram[address / 4u];
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}
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static void write_word(uint32_t address, uint32_t value) {
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(void)address; (void)value;
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assert(!"a same-thread ChangeThread must not store guest state");
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}
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/* Kernel state seams traps.c reads on this path. */
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int psx_get_in_exception(void) { return 0; }
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void debug_server_log_thread_event(uint32_t kind, CPUState *cpu,
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uint32_t current_tcb, uint32_t target_tcb,
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uint32_t target_pc) {
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(void)cpu; (void)target_pc;
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if (kind == 5u && current_tcb == TCB_BASE && target_tcb == TCB_BASE)
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++same_thread_events;
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else if (kind != 3u && kind != 20u)
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++other_thread_events;
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}
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int psx_syscall(CPUState *cpu, uint32_t code);
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int main(void) {
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ram[0x108u / 4u] = PCB_ADDR;
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ram[0x110u / 4u] = TCB_BASE;
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ram[0x114u / 4u] = TCB_SIZE;
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ram[PCB_ADDR / 4u] = TCB_BASE; /* the main thread is current */
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ram[TCB_BASE / 4u] = 0x4000u; /* and runnable */
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CPUState cpu;
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memset(&cpu, 0, sizeof(cpu));
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for (unsigned i = 1; i < 32; ++i) cpu.gpr[i] = 0x55550000u + i;
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cpu.gpr[4] = 3u; /* SYS(03h) */
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cpu.gpr[5] = TCB_BASE; /* ChangeThread target: the current thread */
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cpu.gpr[31] = 0x00002104u;
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cpu.cop0[12] = 0x00000401u;
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cpu.cop0[13] = 0x00000400u;
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cpu.cop0[14] = 0x00000650u;
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cpu.read_word = read_word;
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cpu.write_word = write_word;
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/* The interpreter's SYSCALL case: publish the instruction, then run it. */
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cpu.pc = SYSCALL_PC;
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CPUState expected = cpu;
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expected.pc = 0u; /* continue after the SYSCALL, as SYS01/02 do */
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int transfer = psx_syscall(&cpu, 0u);
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assert(transfer == 0);
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assert(same_thread_events == 1u && other_thread_events == 0u);
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/* cpu->pc != 0 is the interpreter's transfer test (dirty_ram_interp.c). */
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assert(cpu.pc == 0u);
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assert(memcmp(cpu.gpr, expected.gpr, sizeof(cpu.gpr)) == 0);
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assert(memcmp(cpu.cop0, expected.cop0, sizeof(cpu.cop0)) == 0);
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assert(cpu.hi == expected.hi && cpu.lo == expected.lo);
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assert(ram[PCB_ADDR / 4u] == TCB_BASE);
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return 0;
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}
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