mirror of
https://github.com/RetroPortingToolKit/psxrecomp
synced 2026-10-26 02:11:36 -04:00
Matthew Stanley
18c94a1394
New always-on ring (device_trace.{c,h}, compiles into both binaries like
parity_trace) recording every hardware IRQ-raise edge with its guest cycle,
source (I_STAT bit) and detail. All native device sources funnel their raise
through one choke point psx_irq_raise(bit,detail) in interrupts.c (VBLANK/GPU/
CDROM/DMA/timers/SIO routed; DMA passes DICR channel flags, timers pass index),
so the device-timing audit sees every event from one place. devtrace_dump/ctl
debug commands (cycle-window + source filters) + tools/devtrace_diff.py align
the two device-event timelines by source ordinal and flag where cycles drift.
The Beetle oracle side (mednafen IRQ_Assert rising-edge hook) lives in the main
checkout.
This is the level below parity_trace: parity names the divergent control-flow /
gate input; device_trace names the divergent HARDWARE EVENT behind it.
First result (MMX6 cutscene asset-load over-fast wedge): the load's CD+DMA
activity is compressed into ~232M cycles on native vs ~384M on Beetle (~1.65x),
completing the func_8001CB3C scene setup ~100M cycles / ~176 frames early. The
producer is CD-read / DMA-completion timing (DMA channels 2/3/4 = GPU/CD/SPU
asset streaming) -- confirming the device-completion-latency hypothesis and
ruling in the CDROM/DMA cycle model as the over-fast subsystem. (VBlank verified
correct: native VBlank edges are exactly 564480 cyc apart.)
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
91 lines
3.6 KiB
C
91 lines
3.6 KiB
C
#ifndef PSXRECOMP_INTERRUPTS_H
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#define PSXRECOMP_INTERRUPTS_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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struct CPUState;
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/* IRQ bit positions in I_STAT/I_MASK */
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#define IRQ_VBLANK 0
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#define IRQ_GPU 1
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#define IRQ_CDROM 2
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#define IRQ_DMA 3
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#define IRQ_TIMER0 4
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#define IRQ_TIMER1 5
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#define IRQ_TIMER2 6
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#define IRQ_SIO0 7
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#define IRQ_SIO1 8
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#define IRQ_SPU 9
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#define IRQ_PIO 10
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void interrupts_init(void);
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/* Central IRQ-raise choke point: sets the I_STAT bit AND records the raise edge
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* into the always-on device-event ring (device_trace) with the guest cycle.
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* Every hardware source (VBLANK/GPU/CDROM/DMA/timers/SIO/SPU) funnels its raise
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* through here so the device-timing audit sees every event from one place.
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* `detail` is source-specific (DMA channel, timer index) or 0. */
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void psx_irq_raise(uint32_t bit, uint32_t detail);
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/* Called from the dispatch loop after each function returns.
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* Fires vblank on schedule, checks (i_stat & i_mask), and if
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* pending + COP0 allows, dispatches the exception handler. */
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void psx_check_interrupts(struct CPUState* cpu);
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/* Interrupt check with the compiled guest PC to resume if a game-installed
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* handler later RFEs to the sentinel outside the synchronous host window. */
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void psx_check_interrupts_at(struct CPUState* cpu, uint32_t resume_pc);
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/* Accumulate emitted PSX cycles toward the next VBlank trigger.
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* Called from psx_advance_cycles() so the VBlank rate is gated on
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* guest cycles (correct PSX timing) rather than block-dispatch
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* count (which was 5-6x too fast and squeezed game-time to ~60% of
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* real). One real-PSX VBlank = 564480 cycles (33.8688 MHz / 60). */
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void interrupts_advance_cycles(uint32_t cycles);
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/* Cycle-budgeted precise event slicing: minimum guest-CPU-cycle distance to the
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* next DELIVERABLE hardware interrupt (source raises its I_STAT bit AND that bit
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* is unmasked in i_mask). UINT32_MAX if none scheduled. Single source of truth
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* for the two-tier block executor's fast/slice decision. See PRECISE_IRQ_SLICE.md. */
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uint32_t cycles_to_next_event(void);
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/* Query whether we are currently inside an exception handler dispatch. */
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int psx_get_in_exception(void);
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/* Snapshot internal counters for the freeze_check diagnostic. Any out_*
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* pointer may be NULL. All counters are monotonically non-decreasing
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* (dispatch_count resets each VBlank). */
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void psx_get_freeze_diag(uint64_t *out_total_checks,
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uint32_t *out_dispatch_count,
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int *out_in_exception,
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int *out_post_exc_cooldown,
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uint64_t *out_exc_entries,
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uint64_t *out_exc_reentry_blocks);
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/* longjmp back to psx_check_interrupts, unwinding the exception handler.
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* Called by ReturnFromException (B0:0x17 or SYSCALL(3)) when inside
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* the exception handler to model real hardware's RFE+JR $k0 unwind. */
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void psx_exception_longjmp(void);
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/* longjmp back to psx_check_interrupts for RestoreState redirection.
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*
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* On real hardware, RestoreState (A0:0x14) restores all GPRs from a
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* save buffer and does `jr $ra`, which jumps to the restored $ra —
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* abandoning the current call stack. In our model, a plain `return;`
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* would go back to the C caller (the chain walker), not to $ra.
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*
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* This function longjmps with code 2 (vs. 1 for ReturnFromException),
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* so psx_check_interrupts can re-dispatch to cpu->pc while still in
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* exception context. The redirected code (e.g., VSync callback loop)
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* will eventually call ReturnFromException (longjmp code 1) to exit. */
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void psx_restore_state_escape(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* PSXRECOMP_INTERRUPTS_H */
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