mirror of
https://github.com/RetroPortingToolKit/psxrecomp
synced 2026-10-26 02:11:36 -04:00
Alexandros Mandravillis
57 lines
1.9 KiB
C
57 lines
1.9 KiB
C
#ifndef PSXRECOMP_PSX_ICACHE_H
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#define PSXRECOMP_PSX_ICACHE_H
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#include "cpu_state.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern uint32_t g_psx_icache_tv[1024];
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extern int g_psx_icache_active;
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extern int g_ls_replay_active;
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void psx_icache_reset(void);
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void psx_icache_fetch(CPUState *cpu, uint32_t addr);
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void psx_icache_fetch_miss(CPUState *cpu, uint32_t addr);
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/* BIU / cache control (0xFFFE0130) bits the cache model reads (PSX-SPX
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* memorycontrol, "FFFE0130h - BCC, BIU/Cache Configuration Register"). */
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#define PSX_BIU_ICACHE_ENABLE 0x800u /* bit 11, IS1 */
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#define PSX_BIU_DCACHE_ENABLE 0x080u /* bit 7, DS */
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#define PSX_BIU_TAG_TEST 0x004u /* bit 2, TAG */
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#define PSX_BIU_INVALIDATE 0x002u /* bit 1, INV */
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#define PSX_BIU_LOCK 0x001u /* bit 0, LOCK */
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/* A CPU store made while SR.IsC is set, applied to the I-cache model: the
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* I-cache half of Beetle PS_CPU::WriteMemory's IsC branch. With the I-cache
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* enabled and a tag-test, invalidate or lock mode bit set, the store rewrites
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* the tag and valid bits of the four words of its line; that is how FlushCache
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* (A 44h) invalidates the cache. `biu` is the current 0xFFFE0130 value and
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* `value` the stored register value (only its low byte lanes matter). */
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void psx_icache_isc_store(uint32_t biu, uint32_t addr, uint32_t value);
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/* Keep the interpreter's steady-state tag hit inside its translation unit.
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* Misses use the shared slow path, preserving exact cache evolution/timing. */
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static inline void psx_icache_fetch_interp(CPUState *cpu, uint32_t addr) {
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#ifdef PSX_ENABLE_BLOCK_CYCLES
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if (g_ls_replay_active) return;
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if (g_psx_icache_active < 0) {
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psx_icache_fetch(cpu, addr);
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return;
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}
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if (!g_psx_icache_active) return;
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uint32_t idx = (addr & 0xFFCu) >> 2;
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if (g_psx_icache_tv[idx] == addr) return;
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psx_icache_fetch_miss(cpu, addr);
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#else
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(void)cpu;
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(void)addr;
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#endif
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}
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#ifdef __cplusplus
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}
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#endif
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#endif
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