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https://github.com/RetroPortingToolKit/psxrecomp
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Shokunin
c7d5b873cd
PSX_RB_DET_SELFTEST on R4 4P showed a replayed save of tick T differing from the live save of T. Each cause, and the fix: - Replay's finish_frame poll passed no PC hint (Live used the IRQ resume chain); it now uses psx_netplay_snap_resume_hint. - Devices are serviced lazily up to the next event, so root counters and cycles_since_vblank lagged the clock by a host-path amount at save; a load re-anchors them at the clock and drops the lag. The save now publishes pending cycle charges and services every device to the clock first, and renders the SPU up to it. - GTE / mul-div completion stamps and the load-delay give-back were re-anchored at the restored clock on every load, so a stall in flight at the snap point cost the live run cycles but the replay none. New BS_SEC_CPUTIM carries them relative to the clock. - The SPU CD-input FIFO was outside the snap and wiped on rollback loads; new BS_SEC_SPUCD carries the queued frames and the load keeps them. - LZCR is serialized as derived from LZCS (the raw backing stays 0 until the first LZCS write; guests only ever read the derived value). Older snaps without the new sections load as before. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
183 lines
9.9 KiB
C
183 lines
9.9 KiB
C
#ifndef PSX_BOOT_STATE_H
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#define PSX_BOOT_STATE_H
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#include <stddef.h>
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#include <stdint.h>
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#include "cpu_state.h"
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/* Title adapters can require support before selecting HLE execution boundaries.
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* PSX_SAVESTATE_IMPL_TAG is a compile definition on boot_state.c, default zero. */
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#define PSX_BOOT_STATE_IMPL_TAG_VERSION 1
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*
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* Boot snapshot (a.k.a. fast_boot) — a COMPLETE post-BIOS save-state.
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*
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* Model: first launch (and the first launch after ANY app/recompiler update)
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* runs the real recompiled BIOS normally, logos and all. At the moment the BIOS
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* dispatches into the game's PS-EXE entry_pc, we capture a complete hardware
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* snapshot. Every subsequent launch (same build) restores that snapshot and
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* presents the game's first frame — instant boot, no BIOS, no logos.
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*
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* This is NOT HLE: it persists the REAL hardware state produced by a real BIOS
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* run, then replays it. Nothing about BIOS behaviour is synthesized.
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*
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* Rebuild-proof: the file carries an integrity key (below) that includes the
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* codegen hash + ABI tag + codegen version. A user update changes those, so a
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* stale snapshot can NEVER silently load into a new build — it is rejected and
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* the next boot is a normal boot that recaptures. Graceful, automatic.
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*
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* Completeness is mandatory (v4 no-stub rule): a partial capture that leaves a
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* subsystem at reset while CPU/RAM assume it was configured is a latent stub.
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* Every mutable hardware subsystem gets a section here, and the capture is
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* proven complete by diffing a restored session's frames against a normal-boot
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* session's frames (see the "bootsnap" debug command). Host-side / recompiler-
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* derived state (dirty-RAM bitmap, overlay tables, debug rings) is NOT
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* serialized — it is re-derived from restored guest RAM on load.
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*/
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#define BOOT_STATE_MAGIC 0x50535842u /* "PSXB" */
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/* v1 = incomplete RAM-only; v2 = full machine but host-struct memcpy (padding);
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* v3 = little-endian field wire (portable Win/Linux/macOS ARM);
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* v4 = v3 + optional zlib on large sections (section pad bit0 = compressed);
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* v5 = v4 + CD-ROM Sub-Q replacement state;
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* v6 = v5 + per-word GPU DMA2 linked-list progress;
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* v7 = v6 + pending XA DATA_END IRQ state. */
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#define BOOT_STATE_VERSION 9u
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/* v8 added allocated enhancement memory (vanilla v8-era writers kept v7); older
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* runtimes must not accept enhanced snapshots while ignoring their arenas. */
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/* v9 persists the BIOS-to-game handoff latch. Engine overlays may have
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* replaced the original entry code by the time a gameplay state is loaded. */
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/* v7 intentionally breaks older savestates after the CD-ROM wire grew. Reject
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* them at the header before any section changes the live machine. */
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#define BOOT_STATE_VERSION_MIN_READ 7u
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/* Section pad bit0: payload is u32 LE uncompressed_len + zlib deflate bytes. */
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#define BOOT_STATE_SEC_ZLIB 1u
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/*
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* On-disk header (v3): nine little-endian uint32 fields at offset 0 (36 bytes),
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* followed by the section stream. ALL key fields must match the running build
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* or the snapshot is rejected. Do not fwrite() this struct — use pst_wire.
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*/
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typedef struct {
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uint32_t magic; /* BOOT_STATE_MAGIC */
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uint32_t version; /* BOOT_STATE_VERSION */
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/* ---- integrity key (every field must match to accept) ---- */
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uint32_t bios_checksum; /* sum of all uint32 words in the BIOS ROM */
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uint32_t entry_pc; /* game PS-EXE entry PC */
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uint32_t codegen_hash; /* PSX_OVERLAY_CODEGEN_HASH (auto-gen by cmake) */
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int32_t abi_tag; /* PSX_OVERLAY_ABI_TAG (abi version | flavor<<16) */
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uint32_t codegen_ver; /* codegen version XOR build PSX_SAVESTATE_IMPL_TAG */
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/* ---- layout ---- */
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uint32_t section_count; /* number of sections that follow */
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uint32_t reserved; /* v8: enhancement-memory layout cookie; vanilla 0 */
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} BootStateHeader;
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#define BOOT_STATE_HEADER_WIRE_BYTES 36u
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/*
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* Section stream (v3/v4): section_count records, each laid out as
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* uint32_t tag; LE (one of BS_SEC_*)
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* uint32_t pad; LE flags (v3: 0; v4: BOOT_STATE_SEC_ZLIB optional)
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* uint64_t len; LE payload byte count
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* uint8_t payload[len]; (module payloads are LE field wires too)
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* When BOOT_STATE_SEC_ZLIB is set, payload = u32 LE raw_len + zlib(raw).
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* Unknown tags are skipped for forward compatibility. A malformed known section
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* or a missing required section on load is a hard reject (incomplete restore is
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* never allowed) -> normal boot + recapture.
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*/
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enum {
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BS_SEC_GAME_START = 0x12, /* u32 LE boolean: BIOS-to-game handoff completed */
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BS_SEC_MODMEM = 0x11, /* allocated opt-in CPU/GPU enhancement arenas */
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BS_SEC_CPU = 0x01, /* CPUState: gpr/pc/hi/lo/cop0/gte_data/gte_ctrl */
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BS_SEC_RAM = 0x02, /* 2 MB main RAM */
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BS_SEC_SPAD = 0x03, /* 1 KB scratchpad */
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BS_SEC_IRQ = 0x04, /* i_stat / i_mask / cycles_since_vblank (12B; 8B ok) */
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BS_SEC_TIMER = 0x05, /* 3 root counters (counter/mode/target/irq/frac) */
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BS_SEC_CLOCK = 0x06, /* psx_cycle_count */
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BS_SEC_GPU = 0x07, /* GPU regs: display/draw-area/offset/mask/texpage/xfer*/
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BS_SEC_VRAM = 0x08, /* 1 MB VRAM (1024x512x16) */
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BS_SEC_SPU = 0x09, /* SPU regs + 24 voice decode/ADSR state + latches */
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BS_SEC_SPURAM = 0x0A, /* 512 KB SPU RAM */
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BS_SEC_CDROM = 0x0B, /* CD-ROM controller FSM (regs/FIFOs/seek/read/pending)*/
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BS_SEC_DMA = 0x0C, /* DMA channels[7] + dpcr/dicr + async-transfer state */
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BS_SEC_SIO = 0x0D, /* SIO regs + pad-config FSM + memcard FSM */
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BS_SEC_DIRTY = 0x0E, /* dirty-RAM page bitmap (guest-written code pages) */
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BS_SEC_MDEC = 0x0F, /* MDEC command/FIFOs/quant/scale (FMV decode resume) */
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BS_SEC_SPUCD = 0x15, /* SPU CD-input frames queued (u32 n + n*(l,r) s16) */
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BS_SEC_CPUTIM = 0x14, /* [timing] in-flight CPU stall state, relative to
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the clock: GTE / mul-div cycles left, the load-
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delay give-back (read_absorb[33], which, fudge,
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ld_which_t, ld_absorb). Absent => anchored at the
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restored clock (pre-0x14 behaviour). */
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BS_SEC_GCS = 0x13, /* [timing] guest_cycle_scale: carried fraction + gate
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state (3 u32). Written only when the title's
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scale is not 1, so faithful states are unchanged;
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absent => fraction 0, gates as they are. */
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BS_SEC_ICACHE = 0x10, /* R3000A I-cache tag/valid words (1024 u32) — fetch
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cost model. Host-persistent otherwise: a warm load
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without it replays with the pre-load timeline's
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cache, so fetch-miss cycles differ per peer/retry
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and IRQ delivery lands a few wait-loop iterations
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apart (MotK abort@940: fin cyc Δ8, v0 5c83/5c86
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from identical baselines). Optional on load for
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old blobs (left untouched when absent). */
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};
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/* Save a COMPLETE snapshot at game handoff. Returns 1 on success. */
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int boot_state_save(const CPUState* cpu, uint32_t bios_checksum,
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uint32_t entry_pc, const char* path);
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/* Same as boot_state_save, but into a malloc'd buffer (caller frees *out_data).
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* Compresses large sections (disk-oriented). */
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int boot_state_save_buffer(const CPUState* cpu, uint32_t bios_checksum,
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uint32_t entry_pc, uint8_t** out_data,
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size_t* out_len);
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/* In-memory ring snaps: same sections, no zlib. Load accepts either form.
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* Avoids compress2 on ~3.5 MiB RAM+VRAM+SPU every live/resim snap (FPS). */
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int boot_state_save_buffer_raw(const CPUState* cpu, uint32_t bios_checksum,
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uint32_t entry_pc, uint8_t** out_data,
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size_t* out_len);
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/* §96 telemetry: after the latest save, how many VRAM scanlines were dirty
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* and whether the incremental mirror path patched (vs full memcpy). */
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uint32_t boot_state_last_vram_dirty_rows(void);
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int boot_state_last_vram_incremental(void);
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/* Drop the §96 VRAM mirror (RB shutdown / before re-enable). */
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void boot_state_vram_mirror_reset(void);
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/* Load + validate (integrity key) + restore the full machine. On any mismatch
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* or incompleteness returns 0 (caller then boots normally and recaptures). */
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int boot_state_load(const char* path, uint32_t bios_checksum,
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uint32_t entry_pc, CPUState* cpu);
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/* Same as boot_state_load, but from an already-buffered .pst image (netplay). */
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int boot_state_load_buffer(const uint8_t* file, size_t file_len,
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uint32_t bios_checksum, uint32_t entry_pc,
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CPUState* cpu);
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/* Header-only integrity check (no section inflate/apply). Returns 1 if this
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* build can load the image; 0 and fills reason (when non-NULL) on reject. */
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int boot_state_check_buffer(const uint8_t* file, size_t file_len,
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uint32_t bios_checksum, uint32_t entry_pc,
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char* reason, size_t reason_cap);
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/* Register a deferred capture: when boot_state_trigger_capture() fires (from
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* fntrace at game-start), serialize to path. One-shot. */
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void boot_state_set_capture(const char* path, uint32_t bios_checksum,
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uint32_t entry_pc);
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/* Called from fntrace when the game entry PC first dispatches. */
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void boot_state_trigger_capture(const CPUState* cpu);
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#ifdef __cplusplus
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}
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#endif
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#endif /* PSX_BOOT_STATE_H */
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