mirror of
https://github.com/RetroPortingToolKit/psxrecomp
synced 2026-10-26 02:11:36 -04:00
Shokunin
621a92d49b
memory.c dropped every store made while SR.IsC was set. Beetle's PS_CPU::WriteMemory sends them to the caches instead (mednafen/psx/cpu.cpp:482-512), before any address decode: - I-cache enabled (BIU bit 11) with a tag-test, invalidate or lock mode bit: the store rewrites the tag and valid bits of its line. This is how FlushCache (A 44h) and the boot cache init invalidate the I-cache. - D-cache enabled with lock mode clear ((BIU & 0x81) == 0x80): the store lands in the scratchpad at addr & 0x3FF. - Nothing reaches the bus, the BIU register at 0xFFFE0130 included. psx_icache_isc_store transcribes the tag write; memory.c's three store chokepoints call it (and the scratchpad write) first, so compiled code, overlay shards and both interpreters share it. DMA writes are not CPU stores and now bypass IsC, as in Beetle. A render pass applies the same effect (its checkpoint restores tags and scratchpad), and the overlay shadow record fails closed on an isolated store, which its replay cannot redo. isc_store_test drives the real memory.c and psx_icache.c: 15 of its checks fail on master. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
88 lines
4.1 KiB
C
88 lines
4.1 KiB
C
/* lockstep.h — #2 lockstep "unit-test interp" comparator.
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*
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* Per-basic-block differential check: the compiled block runs (RECORD mode,
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* its memory ops captured), then the SAME block is re-interpreted from the
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* same entry state (REPLAY mode, memory ops fed from the recorded trace so the
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* replay is side-effect-free and MMIO-safe). If the interp replay reads a
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* different address, writes a different value, or ends with different
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* registers, that block's compiled output is wrong -> the exact codegen defect.
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* If NO block ever diverges, the regression is timing/IRQ-phase, not codegen.
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*
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* Dev tooling only: the per-block hook is debug_server_cyc_observe, which is
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* PSX_NO_DEBUG_TOOLS-stripped in release builds. Window-gated (frame range) so
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* it's off (full speed) outside the region of interest.
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*/
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#pragma once
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#include <stdint.h>
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#include "cpu_state.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* 0=off, 1=record (compiled block running), 2=replay (interp re-run). */
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extern int g_ls_mode;
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/* 1 while replaying: cycle/icache accounting no-ops so the replay never
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* perturbs real global timing state. */
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extern int g_ls_replay_active;
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/* Side-effect-free whole-call trace used by the overlay differential gate.
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* RECORD executes the interpreter authoritatively and records every memory
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* operation. REPLAY feeds the recorded reads to native code and verifies
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* writes without touching RAM, scratchpad, or MMIO a second time. These calls
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* are deliberately single-owner/non-nestable; a false return fails the
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* comparison closed. */
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int ls_shadow_record_begin(void);
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int ls_shadow_record_end(uint32_t *ops, int *saw_exception);
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int ls_shadow_replay_begin(void);
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int ls_shadow_replay_end(uint32_t *ops, int *mismatch_kind,
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uint32_t *pc, uint32_t *addr,
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uint32_t *expected, uint32_t *actual);
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void ls_shadow_abort(void);
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/* A recorded effect the replay cannot reproduce fails the record closed (the
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* comparison is skipped, as for a device touch). memory.c calls it for a
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* cache-isolated store: its I-cache effect depends on BIU state, and the
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* replay neither writes the BIU nor stores. No-op outside a shadow record. */
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void ls_shadow_record_unreplayable(void);
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/* Memory chokepoint hooks, called from the psx_read_ and psx_write_ funcs. */
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uint32_t ls_read_hook(uint32_t addr, int size, uint32_t real_val);
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void ls_write_hook(uint32_t addr, int size, uint32_t val);
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/* Per-basic-block-leader entry, called from debug_server_cyc_observe. */
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void ls_at_leader(uint32_t leader_phys, CPUState *cpu);
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/* Dispatch-segment comparator: wraps one clean psx_dispatch_game_compiled()
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* invocation and replays the same callable through exec_one until it reaches
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* the same returned cpu->pc. This measures the native CPS unit, not just one
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* basic block. */
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void ls_func_enter(uint32_t entry_pc, CPUState *cpu);
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void ls_func_exit(uint32_t entry_pc, CPUState *cpu, int handled);
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void ls_func_set_window(uint32_t frame_lo, uint32_t frame_hi);
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void ls_func_set_record_only(int on);
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/* Called at real IRQ exception entry. Function-scope comparisons skip segments
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* that delivered an interrupt, keeping codegen/tooling checks separate from
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* event-phase behavior. */
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void ls_note_exception_entry(void);
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/* Suppress lockstep memory recording while runtime/debug observers read guest
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* RAM for diagnostics. These reads are not guest instructions and must not
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* become part of the compiled-vs-interp trace. */
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void ls_suppress_begin(void);
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void ls_suppress_end(void);
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/* Arm the comparator over a guest-frame window [lo,hi]. hi==0 => disabled. */
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void ls_set_window(uint32_t frame_lo, uint32_t frame_hi);
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/* Diagnostic: record blocks but skip the inline replay (to test whether the
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* inline replay, not recording, is what perturbs the run). */
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void ls_set_record_only(int on);
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/* Drain the first-divergence record as JSON into buf. Returns bytes written. */
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int ls_get_diverge_json(char *buf, int buflen);
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int ls_get_func_json(char *buf, int buflen);
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#ifdef __cplusplus
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}
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#endif
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