Files
psxrecomp/runtime/include/timers.h
T
Pegasus 3bd62b3099 Integrate qualified TAS timing and execution profile
Rebased onto upstream after #362: the Ape Escape card-repair hunks are
dropped with the removed block, and the pace walk keeps upstream's uncapped
deadline consumption plus the source ACK-pulse edge.

(cherry picked from commit 8235a7700f)
2026-09-14 17:29:38 +03:00

46 lines
1.6 KiB
C

#ifndef PSXRECOMP_TIMERS_H
#define PSXRECOMP_TIMERS_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
#define TIMER_BASE 0x1F801100
void timers_init(void);
int timers_source_raster_enabled(void);
/* HBlank-driven counter reads see GPU events before the final bus wait.
* CPU-clock counter modes still sample after that wait. Physical address. */
int timers_source_hblank_counter_read(uint32_t addr);
void timers_source_raster_event(void *context, uint64_t cycle, unsigned event, int blank);
void timers_source_raster_finish(uint64_t cycle);
void timers_get_snapshot(uint16_t counter[3], uint32_t mode[3],
uint16_t target[3], int32_t irq_line[3],
uint32_t frac[3]);
void timers_set_snapshot(const uint16_t counter[3], const uint32_t mode[3],
const uint16_t target[3], const int32_t irq_line[3],
const uint32_t frac[3]);
/* MMIO read/write for 0x1F801100..0x1F80112F.
* Accepts 16-bit or 32-bit access (caller zero-extends). */
uint32_t timers_read(uint32_t addr);
void timers_write(uint32_t addr, uint32_t value);
/* Advance all timers by guest CPU cycles. Used by native block-cycle builds. */
void timers_advance(uint32_t cycles);
/* Cycle-budgeted precise event slicing: guest CPU cycles until a timer raises a
* DELIVERABLE IRQ (unmasked in i_mask + mode-armed). UINT32_MAX if none. */
uint32_t timers_cycles_to_irq(uint32_t i_mask);
/* Legacy coarse tick used by interpreter/oracle builds. */
void timers_tick(int cycles);
#ifdef __cplusplus
}
#endif
#endif /* PSXRECOMP_TIMERS_H */