mirror of https://github.com/RetroPortingToolKit/psxrecomp synced 2026-10-26 10:19:47 -04:00

Files

T

Matthew Stanley 7c40d33db3 Phase 1 complete: recompiler proven correct on SCPH1001.BIN

Phase 1a (boot slice): 30 instructions at 0xBFC00000, compiles clean.
Phase 1b (instruction coverage): 54 opcodes implemented in strict_translator,
  44,629 walker-reachable instructions covered, 0 missing.
Phase 1c (function discovery): 76 functions from 2 seeds, 2,988 instructions,
  199 call edges, 27 indirect jumps. All validated through StrictTranslator.
Phase 1d (indirect control flow): 27 sites classified — 21 A0/B0/C0 dispatch
  stubs, 4 computed calls, 2 computed tail calls. Ghidra cross-referenced
  with 0 disagreements.
Phase 1e (relocation): ROM-to-RAM copy at FUN_bfc00420 proven with both
  Ghidra (static) and DuckStation (runtime). 69 address aliases, 68/69
  function entries match byte-for-byte in RAM. Normalization rule documented.

Includes PRINCIPLES.md and DEBUG.md adapted from recomp-template.

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>

2026-04-11 21:26:04 -07:00

1.7 KiB

Raw Blame History

DEBUG LOOP (EXECUTION CONTRACT)

Follow EXACTLY. No deviation.

RULE 0 — TOOL VALIDATION (FIRST USE)

On the FIRST use of ANY tool:

You MUST validate what it is doing and its output

Required:

Cross-check against another source
Verify structure AND content
Confirm assumptions

Never:

Trust output blindly
Assume correctness

If not validated: -> ALL reasoning is INVALID

LOOP

Tool validation (first use only)
Sync state (NOT frame number)
Dump full state (native + oracle) via TCP debug server
Diff bytes
Find FIRST divergence
Trace writer (function + instruction + call path)
Classify (codegen / runner / timing / config)
Fix the tool (never generated output)

If ANY step is skipped: -> STOP and restart

All inspection must use TCP (Phase 2+). Before TCP exists (Phase 1), use structured JSON artifacts only.

PSX-SPECIFIC INSPECTION TARGETS

When comparing native vs DuckStation oracle:

CPU registers (32 GPRs, HI, LO, PC, COP0)
RAM contents at known kernel addresses (PCB, TCB, EvCB tables)
VRAM contents (byte-for-byte)
MMIO read/write sequences
Timer counter values
Interrupt fire ordering
DMA transfer sequences
GPU command streams

CLASSIFICATION

codegen:

Wrong C emitted by strict_translator
Fix: recompiler/src/strict_translator.cpp

runner:

Wrong hardware simulation (MMIO, DMA, IRQ, GPU, timers)
Fix: runtime/src/*.c

timing:

Events fire at wrong cycle / wrong order
Fix: runtime timing logic

config:

Missing function seed, wrong address alias
Fix: seed files, address_aliases.json

discovery:

Function not found, dispatch miss
Fix: function finder pipeline

NEVER fix generated output. Fix the tool that produced it.