mirror of
https://github.com/RetroPortingToolKit/psxrecomp
synced 2026-10-26 18:25:35 -04:00
Matthew Stanley
1b59103b3c
Two passive, always-on rings for auditing memory-card reads end-to-end without arming/timing probes: card_read_summary (non-evicting, first 32 successful reads): Captured at the MC_READ_END transition in sio_process_byte. Records slot/cmd/sector/checksum/data_idx/first 16 bytes/cycle/caller func. TCP cmds: card_read_summary, card_read_summary_reset. card_data_writes (4096 entries, rolling tail): Arm side: sio_read(SIO_RX_DATA) sets a pending flag while the card protocol is in MC_READ_DATA..MC_READ_END. Check side: psx_write_byte/half/word capture the next RAM write whose new_val matches the armed RX byte, then disarm. Records dest addr / value / store_pc / func / mc_idx / slot / cycle. TCP cmds: card_data_writes, card_data_writes_reset. Helpers: tools/probe_card_reads.py tools/probe_card_writes.py tools/probe_card_writes_raw.py tools/peek_cards.py Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
74 lines
2.5 KiB
C
74 lines
2.5 KiB
C
/* card_data_writes.c — capture BIOS RAM destination of card data bytes. */
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#include "card_data_writes.h"
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#include "psx_cycles.h"
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#include <string.h>
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extern uint32_t g_debug_current_func_addr;
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extern uint32_t g_debug_last_store_pc;
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/* "Armed" byte from the most recent SIO_RX_DATA read inside a card
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* data phase. The next matching RAM write captures it. */
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static volatile int s_armed = 0;
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static uint8_t s_armed_value = 0;
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static uint16_t s_armed_state = 0;
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static uint8_t s_armed_idx = 0;
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static uint8_t s_armed_slot = 0;
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/* Ring (rolling: keeps last CAP entries; total_seq lets clients see
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* how many were dropped). */
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static CardDataWriteEntry s_ring[CARD_DATA_WRITES_CAP];
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static uint64_t s_seq = 0;
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static uint32_t s_head = 0;
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void card_data_writes_arm(uint8_t value, uint16_t mc_state,
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uint8_t mc_data_idx, uint8_t slot) {
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s_armed_value = value;
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s_armed_state = mc_state;
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s_armed_idx = mc_data_idx;
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s_armed_slot = slot;
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s_armed = 1;
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}
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int card_data_writes_check(uint32_t phys, uint32_t value, uint8_t width) {
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if (!s_armed) return 0;
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/* Match on the byte value zero-extended. For width==1, compare bottom
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* byte. For wider, compare bottom byte of stored value. */
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uint8_t low = (uint8_t)(value & 0xFF);
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if (low != s_armed_value) return 0;
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CardDataWriteEntry *e = &s_ring[s_head];
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e->seq = s_seq++;
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e->psx_cycle_count = psx_get_cycle_count();
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e->addr = phys;
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e->store_pc = g_debug_last_store_pc;
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e->func_addr = g_debug_current_func_addr;
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e->value = value;
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e->mc_state_at_read = s_armed_state;
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e->mc_data_idx_at_read = s_armed_idx;
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e->width = width;
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e->slot = s_armed_slot;
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s_head = (s_head + 1) % CARD_DATA_WRITES_CAP;
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s_armed = 0;
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return 1;
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}
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uint32_t card_data_writes_get(const CardDataWriteEntry **buf_out,
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uint64_t *total_seq_out,
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uint32_t *head_out) {
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if (buf_out) *buf_out = s_ring;
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if (total_seq_out) *total_seq_out = s_seq;
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if (head_out) *head_out = s_head;
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uint32_t avail = (s_seq < CARD_DATA_WRITES_CAP)
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? (uint32_t)s_seq : CARD_DATA_WRITES_CAP;
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return avail;
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}
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void card_data_writes_reset(void) {
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memset(s_ring, 0, sizeof(s_ring));
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s_seq = 0;
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s_head = 0;
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s_armed = 0;
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}
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