Files
psxrecomp/runtime/include/interrupts.h
T
Matthew Stanley 2d915c3fa9 wip(tomba2): precise-IRQ-slicing groundwork — cycles_to_next_event + design spec
Phase 1 of the cycle-budgeted precise interrupt-take-point fix (root cause:
compiled blocks take IRQs only at block edges; HW + the dirty-RAM interpreter
take them at the exact instruction — oracle-confirmed at the Tomba 2 logo
Timer1 debounce). Design validated with ChatGPT; full spec in PRECISE_IRQ_SLICE.md.

This commit lands the additive, no-behavior-change foundation (Task #2) plus the
prior session's diagnostic take-PC capture, and a build-hygiene dedup:

- cycles_to_next_event() (interrupts.c): single source of truth — min guest-cycle
  distance to the next DELIVERABLE interrupt (source raises its I_STAT bit AND
  that bit is unmasked in i_mask). Aggregates VBLANK + per-peripheral queries.
- timers/cdrom/dma/sio _cycles_to_irq(i_mask): each peripheral owns its own
  next-IRQ-distance query; all conservative under-estimates (smaller => slice
  more => never run past an event).
- debug_server: cycles_to_next_event command for live validation.
- interrupts.c: take-PC capture into the IRQ_DELIVER event-ring aux (prior
  session's diagnostic; records the architectural take-PC for cross-backend diff).
- overlay_loader.c: remove duplicate psx_native_bad_entry definition (HEAD had it
  twice; would not link cleanly).

Live-validated at the logo: returns the VBLANK distance, correctly excludes the
three free-running (unarmed/masked) timers and idle CD/DMA/SIO. Runtime-only,
no regen. The two-tier executor (Task #3) that consumes this is next.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
2026-06-26 15:04:25 -07:00

84 lines
3.2 KiB
C

#ifndef PSXRECOMP_INTERRUPTS_H
#define PSXRECOMP_INTERRUPTS_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
struct CPUState;
/* IRQ bit positions in I_STAT/I_MASK */
#define IRQ_VBLANK 0
#define IRQ_GPU 1
#define IRQ_CDROM 2
#define IRQ_DMA 3
#define IRQ_TIMER0 4
#define IRQ_TIMER1 5
#define IRQ_TIMER2 6
#define IRQ_SIO0 7
#define IRQ_SIO1 8
#define IRQ_SPU 9
#define IRQ_PIO 10
void interrupts_init(void);
/* Called from the dispatch loop after each function returns.
* Fires vblank on schedule, checks (i_stat & i_mask), and if
* pending + COP0 allows, dispatches the exception handler. */
void psx_check_interrupts(struct CPUState* cpu);
/* Interrupt check with the compiled guest PC to resume if a game-installed
* handler later RFEs to the sentinel outside the synchronous host window. */
void psx_check_interrupts_at(struct CPUState* cpu, uint32_t resume_pc);
/* Accumulate emitted PSX cycles toward the next VBlank trigger.
* Called from psx_advance_cycles() so the VBlank rate is gated on
* guest cycles (correct PSX timing) rather than block-dispatch
* count (which was 5-6x too fast and squeezed game-time to ~60% of
* real). One real-PSX VBlank = 564480 cycles (33.8688 MHz / 60). */
void interrupts_advance_cycles(uint32_t cycles);
/* Cycle-budgeted precise event slicing: minimum guest-CPU-cycle distance to the
* next DELIVERABLE hardware interrupt (source raises its I_STAT bit AND that bit
* is unmasked in i_mask). UINT32_MAX if none scheduled. Single source of truth
* for the two-tier block executor's fast/slice decision. See PRECISE_IRQ_SLICE.md. */
uint32_t cycles_to_next_event(void);
/* Query whether we are currently inside an exception handler dispatch. */
int psx_get_in_exception(void);
/* Snapshot internal counters for the freeze_check diagnostic. Any out_*
* pointer may be NULL. All counters are monotonically non-decreasing
* (dispatch_count resets each VBlank). */
void psx_get_freeze_diag(uint64_t *out_total_checks,
uint32_t *out_dispatch_count,
int *out_in_exception,
int *out_post_exc_cooldown,
uint64_t *out_exc_entries,
uint64_t *out_exc_reentry_blocks);
/* longjmp back to psx_check_interrupts, unwinding the exception handler.
* Called by ReturnFromException (B0:0x17 or SYSCALL(3)) when inside
* the exception handler to model real hardware's RFE+JR $k0 unwind. */
void psx_exception_longjmp(void);
/* longjmp back to psx_check_interrupts for RestoreState redirection.
*
* On real hardware, RestoreState (A0:0x14) restores all GPRs from a
* save buffer and does `jr $ra`, which jumps to the restored $ra —
* abandoning the current call stack. In our model, a plain `return;`
* would go back to the C caller (the chain walker), not to $ra.
*
* This function longjmps with code 2 (vs. 1 for ReturnFromException),
* so psx_check_interrupts can re-dispatch to cpu->pc while still in
* exception context. The redirected code (e.g., VSync callback loop)
* will eventually call ReturnFromException (longjmp code 1) to exit. */
void psx_restore_state_escape(void);
#ifdef __cplusplus
}
#endif
#endif /* PSXRECOMP_INTERRUPTS_H */