Files
psxrecomp/runtime/include/interrupts.h
T
Matthew Stanley fba58d76b3 Phase 4 interrupt fixes: RFE, GPR save/restore, DMA IRQ edge-trigger
Three interrupt delivery bugs fixed that were blocking shell progression:

1. RFE after handler exit: The exception handler's normal exit path
   (jmpbuf longjmp at 0xBFC10944) does not execute RFE. In our model
   the handler returns to psx_check_interrupts, not to the WaitEvent
   caller. Without RFE, IEc stays 0 forever after the first interrupt.
   Fix: apply RFE in psx_check_interrupts if IEc is still 0 after the
   handler returns.

2. GPR save/restore around handler dispatch: The handler's jmpbuf exit
   restores callee-saved registers from the kernel jmpbuf (intended for
   a non-local jump to WaitEvent's caller). In our model this corrupts
   the interrupted code's registers. Fix: save all GPRs before handler
   dispatch and restore them after, matching real hardware where the
   interrupted code's registers are preserved via TCB save/restore.

3. VBlank tick gated on !in_exception: The handler runs thousands of
   block leaders, each calling psx_check_interrupts. Without gating,
   dispatch_count advances inside the handler, firing new VBlanks that
   stack up and starve the main code. Fix: only increment dispatch_count
   and fire VBlank/timer ticks when not in exception handling.

4. DMA IRQ edge-triggered: update_master_irq() was level-triggered,
   re-asserting i_stat bit 3 on every call while master_flag=1. Combined
   with no BIOS callback to acknowledge DMA IRQs, this caused an
   interrupt storm. Fix: edge-detect master_flag 0->1 transition, and
   suppress DMA completion IRQs entirely since transfers are synchronous.

Also adds GPU debug diagnostics: GP0 command counters (nop/fill/draw/
env/copy), draw area/offset in gpu_state, vram_peek debug command.

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
2026-04-12 20:29:03 -07:00

45 lines
1.1 KiB
C

#ifndef PSXRECOMP_V4_INTERRUPTS_H
#define PSXRECOMP_V4_INTERRUPTS_H
#include <stdint.h>
#ifdef __cplusplus
extern "C" {
#endif
struct CPUState;
/* IRQ bit positions in I_STAT/I_MASK */
#define IRQ_VBLANK 0
#define IRQ_GPU 1
#define IRQ_CDROM 2
#define IRQ_DMA 3
#define IRQ_TIMER0 4
#define IRQ_TIMER1 5
#define IRQ_TIMER2 6
#define IRQ_SIO0 7
#define IRQ_SIO1 8
#define IRQ_SPU 9
#define IRQ_PIO 10
void interrupts_init(void);
/* Called from the dispatch loop after each function returns.
* Fires vblank on schedule, checks (i_stat & i_mask), and if
* pending + COP0 allows, dispatches the exception handler. */
void psx_check_interrupts(struct CPUState* cpu);
/* Query whether we are currently inside an exception handler dispatch. */
int psx_get_in_exception(void);
/* longjmp back to psx_check_interrupts, unwinding the exception handler.
* Called by ReturnFromException (B0:0x17 or SYSCALL(3)) when inside
* the exception handler to model real hardware's RFE+JR $k0 unwind. */
void psx_exception_longjmp(void);
#ifdef __cplusplus
}
#endif
#endif /* PSXRECOMP_V4_INTERRUPTS_H */