mirror of https://github.com/RPCS3/rpcs3
Fix hypervisor context memory placement
This commit is contained in:
parent
812d84e7f4
commit
b1089ab1a3
|
|
@ -257,6 +257,9 @@ public:
|
|||
// Sticky saturation bit
|
||||
v128 sat{};
|
||||
|
||||
// Hypervisor context data
|
||||
rpcs3::hypervisor_context_t hv_ctx; // HV context for gate enter exit. Keep at a low struct offset.
|
||||
|
||||
// Optimization: precomputed java-mode mask for handling denormals
|
||||
u32 jm_mask = 0x7f80'0000;
|
||||
|
||||
|
|
@ -307,9 +310,6 @@ public:
|
|||
// Thread name
|
||||
atomic_ptr<std::string> ppu_tname;
|
||||
|
||||
// Hypervisor context data
|
||||
rpcs3::hypervisor_context_t hv_ctx; // HV context for gate enter exit. Keep at a low struct offset.
|
||||
|
||||
u64 last_ftsc = 0;
|
||||
u64 last_ftime = 0;
|
||||
u32 last_faddr = 0;
|
||||
|
|
|
|||
|
|
@ -673,6 +673,9 @@ public:
|
|||
std::array<v128, 128> gpr{};
|
||||
SPU_FPSCR fpscr{};
|
||||
|
||||
// Hypervisor context data
|
||||
rpcs3::hypervisor_context_t hv_ctx; // NOTE: The offset within the class must be within the first 1MiB (10 bits max)
|
||||
|
||||
// MFC command data
|
||||
spu_mfc_cmd ch_mfc_cmd{};
|
||||
|
||||
|
|
@ -788,8 +791,6 @@ public:
|
|||
u64 block_recover = 0;
|
||||
u64 block_failure = 0;
|
||||
|
||||
rpcs3::hypervisor_context_t hv_ctx; // NOTE: The offset within the class must be within the first 1MiB
|
||||
|
||||
u64 ftx = 0; // Failed transactions
|
||||
u64 stx = 0; // Succeeded transactions (pure counters)
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue