mirror of
https://github.com/zeldaret/ss
synced 2026-06-02 02:00:06 -04:00
Elijah Thomas
9c3c480b24
* g3d_calcvtx GetData seems to have changed -> dwarf says r is a local and using ofs_to_ptr didnt work * g3d_light and g3d_fog sdata2 splits and func ordering * g3d_scnproc * g3d_init * g3d_scnmdl * g3d_scnmdlsmpl * g3d_scnroot * g3d_scnobj * g3d_res* progress * g3d_resmdl OK * g3d_restev OK * g3d_resmat OK * g3d_resvtx and g3d_restex OK * g3d_resnode OK * g3d_resanm OK * g3d_resanmchr Progress * the rest of g3d_res* OK * g3d_anmvis OK * g3d_anmclr OK * Some Splitting * more OK, Inline Issue in g3d_anmtexsrt * g3d_obj, g3d_anmobj, g3d_gpu, g3d_tmem, g3d_cpu OK * g3d_state OK * g3d/dcc OK * Include fixup * More Fixups * g3d_camera OK * g3d_draw OK * g3d_calcworld OK * g3d_calcworld actually OK * g3d_workmem, g3d_dcc OK * g3d_calcview OK * g3d_anmtexsrt OK with DONT_INLINE * g3d_transform OK (Feels Cheaty) * g3d_resanmchr OK * g3d_draw1mat1shp Close * g3d_draw1mat1shp OK (Thanks Lago!). Ran symbol applying script
222 lines
7.3 KiB
C
222 lines
7.3 KiB
C
/**
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* For more details, see:
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* https://www.gc-forever.com/yagcd/chap8.html#sec8
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* https://www.gc-forever.com/yagcd/chap5.html#sec5
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* https://github.com/dolphin-emu/dolphin/blob/master/Source/Core/VideoCommon/BPMemory.h
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* https://github.com/dolphin-emu/dolphin/blob/master/Source/Core/VideoCommon/XFMemory.h
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* https://github.com/dolphin-emu/dolphin/blob/master/Source/Core/VideoCommon/OpcodeDecoding.h
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* https://patents.google.com/patent/US6700586B1/en
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* https://patents.google.com/patent/US6639595B1/en
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* https://patents.google.com/patent/US7002591
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* https://patents.google.com/patent/US6697074
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*/
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#ifndef RVL_SDK_GX_HARDWARE_H
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#define RVL_SDK_GX_HARDWARE_H
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#include "rvl/GX/GXTypes.h"
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#include <common.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/************************************************************
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*
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*
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* GX FIFO
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*
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*
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***********************************************************/
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/**
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* FIFO write/gather pipe
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*/
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extern volatile union {
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// 1-byte
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char c;
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unsigned char uc;
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// 2-byte
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short s;
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unsigned short us;
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// 4-byte
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int i;
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unsigned int ui;
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void *p;
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float f;
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} WGPIPE AT_ADDRESS(0xCC008000);
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/**
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* FIFO commands
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*/
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typedef enum {
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GX_FIFO_CMD_NOOP = 0x00,
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GX_FIFO_CMD_LOAD_BP_REG = 0x61,
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GX_FIFO_CMD_LOAD_CP_REG = 0x08,
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GX_FIFO_CMD_LOAD_XF_REG = 0x10,
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GX_FIFO_CMD_LOAD_INDX_A = 0x20,
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GX_FIFO_CMD_LOAD_INDX_B = 0x28,
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GX_FIFO_CMD_LOAD_INDX_C = 0x30,
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GX_FIFO_CMD_LOAD_INDX_D = 0x38,
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GX_FIFO_CMD_CALL_DL = 0x40,
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GX_FIFO_CMD_INVAL_VTX = 0x48
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} GXFifoCmd;
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#define __GX_FIFO_SET_LOAD_INDX_DST(reg, x) ((reg) = GX_BITSET(reg, 20, 12, x))
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#define __GX_FIFO_SET_LOAD_INDX_NELEM(reg, x) ((reg) = GX_BITSET(reg, 16, 4, x))
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#define __GX_FIFO_SET_LOAD_INDX_INDEX(reg, x) ((reg) = GX_BITSET(reg, 0, 16, x))
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#define __GX_FIFO_LOAD_INDX(reg, dst, nelem, index) \
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{ \
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u32 cmd = 0; \
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__GX_FIFO_SET_LOAD_INDX_DST(cmd, dst); \
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__GX_FIFO_SET_LOAD_INDX_NELEM(cmd, nelem); \
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__GX_FIFO_SET_LOAD_INDX_INDEX(cmd, index); \
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WGPIPE.c = reg; \
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WGPIPE.i = cmd; \
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}
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#define GX_FIFO_LOAD_INDX_A(dst, nelem, index) __GX_FIFO_LOAD_INDX(GX_FIFO_CMD_LOAD_INDX_A, dst, nelem, index)
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#define GX_FIFO_LOAD_INDX_B(dst, nelem, index) __GX_FIFO_LOAD_INDX(GX_FIFO_CMD_LOAD_INDX_B, dst, nelem, index)
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#define GX_FIFO_LOAD_INDX_C(dst, nelem, index) __GX_FIFO_LOAD_INDX(GX_FIFO_CMD_LOAD_INDX_C, dst, nelem, index)
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#define GX_FIFO_LOAD_INDX_D(dst, nelem, index) __GX_FIFO_LOAD_INDX(GX_FIFO_CMD_LOAD_INDX_D, dst, nelem, index)
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/************************************************************
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*
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*
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* GX Blitting Processor (BP)
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*
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*
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***********************************************************/
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/**
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* Load immediate value into BP register
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*/
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#define GX_BP_LOAD_REG(data) \
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WGPIPE.c = GX_FIFO_CMD_LOAD_BP_REG; \
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WGPIPE.i = (data);
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/**
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* Set BP command opcode (first 8 bits)
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*/
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#define GX_BP_SET_OPCODE(cmd, opcode) (cmd) = GX_BITSET(cmd, 0, 8, (opcode))
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#define GX_BP_OPCODE_SHIFT 24
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#define GX_BP_CMD_SZ (sizeof(u8) + sizeof(u32))
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/************************************************************
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*
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*
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* GX Command Processor (CP)
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*
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*
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***********************************************************/
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/**
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* Load immediate value into CP register
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*/
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#define GX_CP_LOAD_REG(addr, data) \
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WGPIPE.c = GX_FIFO_CMD_LOAD_CP_REG; \
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WGPIPE.c = (addr); \
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WGPIPE.i = (data);
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#define GX_CP_CMD_SZ (sizeof(u8) + sizeof(u8) + sizeof(u32))
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/************************************************************
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*
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*
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* GX Transform Unit (XF)
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*
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*
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***********************************************************/
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/**
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* XF memory
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*/
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typedef enum {
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GX_XF_MEM_POSMTX = 0x0000,
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GX_XF_MEM_NRMMTX = 0x0400,
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GX_XF_MEM_DUALTEXMTX = 0x0500,
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GX_XF_MEM_LIGHTOBJ = 0x0600
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} GXXfMem;
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/**
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* Header for an XF register load
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*/
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#define GX_XF_LOAD_REG_HDR(addr) \
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WGPIPE.c = GX_FIFO_CMD_LOAD_XF_REG; \
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WGPIPE.i = (addr);
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/**
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* Load immediate value into XF register
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*/
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#define GX_XF_LOAD_REG(addr, data) \
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GX_XF_LOAD_REG_HDR(addr); \
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WGPIPE.i = (data);
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#define GX_XF_CMD_SZ (sizeof(u8) + sizeof(u32) + sizeof(u32))
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/**
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* Load immediate values into multiple XF registers
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*/
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#define GX_XF_LOAD_REGS(size, addr) \
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{ \
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u32 cmd = 0; \
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cmd |= (addr); \
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cmd |= (size) << 16; \
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GX_XF_LOAD_REG_HDR(cmd); \
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}
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/**
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* Enums for Tex0-Tex7 register fields
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*/
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typedef enum {
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GX_XF_TEX_PROJ_ST, // (s,t): texmul is 2x4
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GX_XF_TEX_PROJ_STQ // (s,t,q): texmul is 3x4
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} GXXfTexProj;
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typedef enum {
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GX_XF_TEX_FORM_AB11, // (A, B, 1.0, 1.0) (used for regular texture source)
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GX_XF_TEX_FORM_ABC1 // (A, B, C, 1.0) (used for geometry or normal source)
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} GXXfTexForm;
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typedef enum {
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GX_XF_TG_REGULAR, // Regular transformation (transform incoming data)
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GX_XF_TG_BUMP, // Texgen bump mapping
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GX_XF_TG_CLR0, // Color texgen: (s,t)=(r,g:b) (g and b are concatenated),
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// color0
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GX_XF_TG_CLR1 // Color texgen: (s,t)=(r,g:b) (g and b are concatenated),
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// color1
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} GXXfTexGen;
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/**
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* Misc. hardware enums
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*/
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typedef enum {
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GX_RAS_COLOR0A0,
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GX_RAS_COLOR1A1,
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GX_RAS_ALPHA_BUMP = 5,
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GX_RAS_ALPHA_BUMPN,
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GX_RAS_COLOR_ZERO,
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GX_RAS_MAX_CHANNEL
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} GXRasChannelID;
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typedef enum {
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GX_TEVREG_COLOR,
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GX_TEVREG_KONST,
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} GXTevRegType;
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#ifdef __cplusplus
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}
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#endif
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#endif
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