mirror of
https://github.com/zeldaret/st
synced 2026-05-23 15:01:41 -04:00
Yanis
ed672be03f
* Decompile Title overlay * math structs as cpp when applicable * fixes and improvements * regressions fix 1 * regressions fix 2
37 lines
1.3 KiB
C
37 lines
1.3 KiB
C
#pragma once
|
|
|
|
#define ARM9_IO_BASE 0x04000000
|
|
#define SHARED_WORK_BASE 0x027FF000
|
|
|
|
#define REG_WORD_PTR(addr) ((u32 *) (addr))
|
|
#define REG_WORD(addr) (*(REG_WORD_PTR(addr)))
|
|
|
|
#define REG_HALFWORD_PTR(addr) ((u16 *) (addr))
|
|
#define REG_HALFWORD(addr) (*(REG_HALFWORD_PTR(addr)))
|
|
|
|
#define REG_IME REG_WORD(*(u32 *) 0x04000208)
|
|
#define REG_VCOUNT REG_WORD_PTR(*(u32 *) 0x04000006)
|
|
#define RAM_PALETTES REG_WORD_PTR((u32 *) 0x05000000)
|
|
#define RAM_OAM REG_WORD_PTR((u32 *) 0x07000000)
|
|
|
|
#define REG_DISPCNT REG_WORD(ARM9_IO_BASE)
|
|
#define REG_DISPCNT_SUB REG_WORD(ARM9_IO_BASE | 0x00001000)
|
|
|
|
#define REG_BLDCNT REG_WORD(ARM9_IO_BASE | 0x00000050)
|
|
#define REG_BLDCNT_SUB REG_WORD(ARM9_IO_BASE | 0x00001050)
|
|
|
|
#define REG_BG1HOFS_SUB REG_WORD(ARM9_IO_BASE | 0x00001014)
|
|
#define REG_BG2HOFS_SUB REG_WORD(ARM9_IO_BASE | 0x00001018)
|
|
#define REG_BG3HOFS_SUB REG_WORD(ARM9_IO_BASE | 0x0000101C)
|
|
|
|
#define REG_BLDALPHA REG_HALFWORD(ARM9_IO_BASE | 0x00000052)
|
|
|
|
#define REG_WININ REG_HALFWORD(ARM9_IO_BASE | 0x00000048)
|
|
#define REG_WINOUT REG_HALFWORD(ARM9_IO_BASE | 0x0000004A)
|
|
#define REG_WININ_SUB REG_HALFWORD(ARM9_IO_BASE | 0x00001048)
|
|
#define REG_WINOUT_SUB REG_HALFWORD(ARM9_IO_BASE | 0x0000104A)
|
|
|
|
#define REG_BG3CNT_SUB REG_HALFWORD(ARM9_IO_BASE | 0x0000100E)
|
|
|
|
#define SHARED_WORK_C3C REG_WORD(SHARED_WORK_BASE | 0xC3C)
|