mirror of
https://github.com/zeldaret/st
synced 2026-06-15 14:31:31 -04:00
Yanis
35 lines
1.2 KiB
C
35 lines
1.2 KiB
C
#pragma once
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#define ARM9_IO_BASE 0x04000000
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#define SHARED_WORK_BASE 0x027FF000
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#define REG_WORD_PTR(addr) ((u32 *) (addr))
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#define REG_WORD(addr) (*(REG_WORD_PTR(addr)))
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#define REG_HALFWORD_PTR(addr) ((u16 *) (addr))
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#define REG_HALFWORD(addr) (*(REG_HALFWORD_PTR(addr)))
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#define REG_IME REG_WORD(*(u32 *) 0x04000208)
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#define REG_VCOUNT REG_WORD_PTR(*(u32 *) 0x04000006)
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#define RAM_PALETTES REG_WORD_PTR((u32 *) 0x05000000)
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#define RAM_OAM REG_WORD_PTR((u32 *) 0x07000000)
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#define REG_DISPCNT REG_WORD(ARM9_IO_BASE)
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#define REG_DISPCNT_SUB REG_WORD(ARM9_IO_BASE | 0x00001000)
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#define REG_BLDCNT REG_WORD(ARM9_IO_BASE | 0x00000050)
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#define REG_BLDCNT_SUB REG_WORD(ARM9_IO_BASE | 0x00001050)
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#define REG_BG1HOFS_SUB REG_WORD(ARM9_IO_BASE | 0x00001014)
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#define REG_BG2HOFS_SUB REG_WORD(ARM9_IO_BASE | 0x00001018)
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#define REG_BG3HOFS_SUB REG_WORD(ARM9_IO_BASE | 0x0000101C)
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#define REG_BLDALPHA REG_HALFWORD(ARM9_IO_BASE | 0x00000052)
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#define REG_WININ REG_HALFWORD(ARM9_IO_BASE | 0x00000048)
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#define REG_WINOUT REG_HALFWORD(ARM9_IO_BASE | 0x0000004A)
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#define REG_WININ_SUB REG_HALFWORD(ARM9_IO_BASE | 0x00001048)
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#define REG_WINOUT_SUB REG_HALFWORD(ARM9_IO_BASE | 0x0000104A)
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#define SHARED_WORK_C3C REG_WORD(SHARED_WORK_BASE | 0xC3C)
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