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migrate remaining d_save and m_Do_main asm to inline, add intial class mapping for dFile_select_c

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2020-11-29 20:16:52 -05:00
parent 58afa9ed78
commit 44b14ec128
163 changed files with 1975 additions and 1732 deletions
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asm/SComponent/c/c_m3d.s
+2 -2
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@@ -4862,7 +4862,7 @@ cM3d_Cross_CylLin:
/* 8026C958 00269898 DB C1 00 C0 */ stfd f30, 0xc0(r1)
/* 8026C95C 0026989C F3 C1 00 C8 */ psq_st f30, 200(r1), 0, qr0
/* 8026C960 002698A0 39 61 00 C0 */ addi r11, r1, 0xc0
/* 8026C964 002698A4 48 0F 58 6D */ bl func_803621D0
/* 8026C964 002698A4 48 0F 58 6D */ bl _savegpr_26
/* 8026C968 002698A8 7C 7E 1B 78 */ mr r30, r3
/* 8026C96C 002698AC 7C 9B 23 78 */ mr r27, r4
/* 8026C970 002698B0 7C BC 2B 78 */ mr r28, r5
@@ -5341,7 +5341,7 @@ lbl_8026D01C:
/* 8026D024 00269F64 E3 C1 00 C8 */ psq_l f30, 200(r1), 0, qr0
/* 8026D028 00269F68 CB C1 00 C0 */ lfd f30, 0xc0(r1)
/* 8026D02C 00269F6C 39 61 00 C0 */ addi r11, r1, 0xc0
/* 8026D030 00269F70 48 0F 51 ED */ bl func_8036221C
/* 8026D030 00269F70 48 0F 51 ED */ bl _restgpr_26
/* 8026D034 00269F74 80 01 00 E4 */ lwz r0, 0xe4(r1)
/* 8026D038 00269F78 7C 08 03 A6 */ mtlr r0
/* 8026D03C 00269F7C 38 21 00 E0 */ addi r1, r1, 0xe0