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more d_save funcs OK, initial map out of dcomifg_play_c and it's classes

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Pheenoh
2021-01-02 17:47:43 -05:00
parent 992cf48c7f
commit 458be4d8cb
203 changed files with 1931 additions and 941 deletions
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include/d/d_a/d_a_alink/asm/func_800A093C.s
+2 -2
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@@ -2,7 +2,7 @@
/* 800A0940 0009D880 7C 08 02 A6 */ mflr r0
/* 800A0944 0009D884 90 01 00 64 */ stw r0, 0x64(r1)
/* 800A0948 0009D888 39 61 00 60 */ addi r11, r1, 0x60
/* 800A094C 0009D88C 48 2C 18 7D */ bl func_803621C8
/* 800A094C 0009D88C 48 2C 18 7D */ bl _savegpr_24
/* 800A0950 0009D890 7C 7F 1B 78 */ mr r31, r3
/* 800A0954 0009D894 7C 9B 23 78 */ mr r27, r4
/* 800A0958 0009D898 7C BC 2B 78 */ mr r28, r5
@@ -762,7 +762,7 @@ lbl_800A1410:
/* 800A1410 0009E350 38 60 00 00 */ li r3, 0
lbl_800A1414:
/* 800A1414 0009E354 39 61 00 60 */ addi r11, r1, 0x60
/* 800A1418 0009E358 48 2C 0D FD */ bl func_80362214
/* 800A1418 0009E358 48 2C 0D FD */ bl _restgpr_24
/* 800A141C 0009E35C 80 01 00 64 */ lwz r0, 0x64(r1)
/* 800A1420 0009E360 7C 08 03 A6 */ mtlr r0
/* 800A1424 0009E364 38 21 00 60 */ addi r1, r1, 0x60
include/d/d_a/d_a_alink/asm/func_800A29DC.s
+2 -2
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@@ -2,7 +2,7 @@
/* 800A29E0 0009F920 7C 08 02 A6 */ mflr r0
/* 800A29E4 0009F924 90 01 00 44 */ stw r0, 0x44(r1)
/* 800A29E8 0009F928 39 61 00 40 */ addi r11, r1, 0x40
/* 800A29EC 0009F92C 48 2B F7 DD */ bl func_803621C8
/* 800A29EC 0009F92C 48 2B F7 DD */ bl _savegpr_24
/* 800A29F0 0009F930 7C 79 1B 78 */ mr r25, r3
/* 800A29F4 0009F934 3C 60 80 39 */ lis r3, lbl_8038D658@ha
/* 800A29F8 0009F938 3B A3 D6 58 */ addi r29, r3, lbl_8038D658@l
@@ -147,7 +147,7 @@ lbl_800A2C08:
/* 800A2C08 0009FB48 38 60 00 01 */ li r3, 1
lbl_800A2C0C:
/* 800A2C0C 0009FB4C 39 61 00 40 */ addi r11, r1, 0x40
/* 800A2C10 0009FB50 48 2B F6 05 */ bl func_80362214
/* 800A2C10 0009FB50 48 2B F6 05 */ bl _restgpr_24
/* 800A2C14 0009FB54 80 01 00 44 */ lwz r0, 0x44(r1)
/* 800A2C18 0009FB58 7C 08 03 A6 */ mtlr r0
/* 800A2C1C 0009FB5C 38 21 00 40 */ addi r1, r1, 0x40
include/d/d_a/d_a_alink/asm/func_800A551C.s
+2 -2
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@@ -2,7 +2,7 @@
/* 800A5520 000A2460 7C 08 02 A6 */ mflr r0
/* 800A5524 000A2464 90 01 00 34 */ stw r0, 0x34(r1)
/* 800A5528 000A2468 39 61 00 30 */ addi r11, r1, 0x30
/* 800A552C 000A246C 48 2B CC 9D */ bl func_803621C8
/* 800A552C 000A246C 48 2B CC 9D */ bl _savegpr_24
/* 800A5530 000A2470 7C 78 1B 78 */ mr r24, r3
/* 800A5534 000A2474 3C 80 80 39 */ lis r4, lbl_8038D658@ha
/* 800A5538 000A2478 3B A4 D6 58 */ addi r29, r4, lbl_8038D658@l
@@ -540,7 +540,7 @@ lbl_800A5CA4:
lbl_800A5CAC:
/* 800A5CAC 000A2BEC 7F 43 D3 78 */ mr r3, r26
/* 800A5CB0 000A2BF0 39 61 00 30 */ addi r11, r1, 0x30
/* 800A5CB4 000A2BF4 48 2B C5 61 */ bl func_80362214
/* 800A5CB4 000A2BF4 48 2B C5 61 */ bl _restgpr_24
/* 800A5CB8 000A2BF8 80 01 00 34 */ lwz r0, 0x34(r1)
/* 800A5CBC 000A2BFC 7C 08 03 A6 */ mtlr r0
/* 800A5CC0 000A2C00 38 21 00 30 */ addi r1, r1, 0x30
include/d/d_a/d_a_alink/asm/func_800A5CC8.s
+2 -2
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@@ -2,7 +2,7 @@
/* 800A5CCC 000A2C0C 7C 08 02 A6 */ mflr r0
/* 800A5CD0 000A2C10 90 01 00 54 */ stw r0, 0x54(r1)
/* 800A5CD4 000A2C14 39 61 00 50 */ addi r11, r1, 0x50
/* 800A5CD8 000A2C18 48 2B C4 F1 */ bl func_803621C8
/* 800A5CD8 000A2C18 48 2B C4 F1 */ bl _savegpr_24
/* 800A5CDC 000A2C1C 7C 7F 1B 78 */ mr r31, r3
/* 800A5CE0 000A2C20 80 03 04 A0 */ lwz r0, 0x4a0(r3)
/* 800A5CE4 000A2C24 54 00 07 39 */ rlwinm. r0, r0, 0, 0x1c, 0x1c
@@ -646,7 +646,7 @@ lbl_800A65F0:
/* 800A65F0 000A3530 38 60 00 04 */ li r3, 4
lbl_800A65F4:
/* 800A65F4 000A3534 39 61 00 50 */ addi r11, r1, 0x50
/* 800A65F8 000A3538 48 2B BC 1D */ bl func_80362214
/* 800A65F8 000A3538 48 2B BC 1D */ bl _restgpr_24
/* 800A65FC 000A353C 80 01 00 54 */ lwz r0, 0x54(r1)
/* 800A6600 000A3540 7C 08 03 A6 */ mtlr r0
/* 800A6604 000A3544 38 21 00 50 */ addi r1, r1, 0x50
include/d/d_a/d_a_alink/asm/func_800AC610.s
+2 -2
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@@ -2,7 +2,7 @@
/* 800AC614 000A9554 7C 08 02 A6 */ mflr r0
/* 800AC618 000A9558 90 01 00 34 */ stw r0, 0x34(r1)
/* 800AC61C 000A955C 39 61 00 30 */ addi r11, r1, 0x30
/* 800AC620 000A9560 48 2B 5B A9 */ bl func_803621C8
/* 800AC620 000A9560 48 2B 5B A9 */ bl _savegpr_24
/* 800AC624 000A9564 7C 7C 1B 78 */ mr r28, r3
/* 800AC628 000A9568 7C BF 2B 78 */ mr r31, r5
/* 800AC62C 000A956C 7C DD 33 78 */ mr r29, r6
@@ -74,7 +74,7 @@ lbl_800AC708:
lbl_800AC71C:
/* 800AC71C 000A965C 7F E3 FB 78 */ mr r3, r31
/* 800AC720 000A9660 39 61 00 30 */ addi r11, r1, 0x30
/* 800AC724 000A9664 48 2B 5A F1 */ bl func_80362214
/* 800AC724 000A9664 48 2B 5A F1 */ bl _restgpr_24
/* 800AC728 000A9668 80 01 00 34 */ lwz r0, 0x34(r1)
/* 800AC72C 000A966C 7C 08 03 A6 */ mtlr r0
/* 800AC730 000A9670 38 21 00 30 */ addi r1, r1, 0x30
include/d/d_a/d_a_alink/asm/func_800AC754.s
+2 -2
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@@ -14,7 +14,7 @@
/* 800AC788 000A96C8 DB 41 00 50 */ stfd f26, 0x50(r1)
/* 800AC78C 000A96CC F3 41 00 58 */ psq_st f26, 88(r1), 0, 0
/* 800AC790 000A96D0 39 61 00 50 */ addi r11, r1, 0x50
/* 800AC794 000A96D4 48 2B 5A 35 */ bl func_803621C8
/* 800AC794 000A96D4 48 2B 5A 35 */ bl _savegpr_24
/* 800AC798 000A96D8 7C 78 1B 78 */ mr r24, r3
/* 800AC79C 000A96DC 7C 99 23 78 */ mr r25, r4
/* 800AC7A0 000A96E0 7C BA 2B 78 */ mr r26, r5
@@ -178,7 +178,7 @@ lbl_800AC9C8:
/* 800AC9F4 000A9934 E3 41 00 58 */ psq_l f26, 88(r1), 0, 0
/* 800AC9F8 000A9938 CB 41 00 50 */ lfd f26, 0x50(r1)
/* 800AC9FC 000A993C 39 61 00 50 */ addi r11, r1, 0x50
/* 800ACA00 000A9940 48 2B 58 15 */ bl func_80362214
/* 800ACA00 000A9940 48 2B 58 15 */ bl _restgpr_24
/* 800ACA04 000A9944 80 01 00 B4 */ lwz r0, 0xb4(r1)
/* 800ACA08 000A9948 7C 08 03 A6 */ mtlr r0
/* 800ACA0C 000A994C 38 21 00 B0 */ addi r1, r1, 0xb0
include/d/d_a/d_a_alink/asm/func_800AD170.s
+2 -2
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@@ -2,7 +2,7 @@
/* 800AD174 000AA0B4 7C 08 02 A6 */ mflr r0
/* 800AD178 000AA0B8 90 01 00 34 */ stw r0, 0x34(r1)
/* 800AD17C 000AA0BC 39 61 00 30 */ addi r11, r1, 0x30
/* 800AD180 000AA0C0 48 2B 50 49 */ bl func_803621C8
/* 800AD180 000AA0C0 48 2B 50 49 */ bl _savegpr_24
/* 800AD184 000AA0C4 7C 7F 1B 78 */ mr r31, r3
/* 800AD188 000AA0C8 83 83 1F 2C */ lwz r28, 0x1f2c(r3)
/* 800AD18C 000AA0CC 83 63 1F 34 */ lwz r27, 0x1f34(r3)
@@ -93,7 +93,7 @@ lbl_800AD2B0:
/* 800AD2B8 000AA1F8 80 7F 06 F8 */ lwz r3, 0x6f8(r31)
/* 800AD2BC 000AA1FC 4B FF BF 8D */ bl daAlink_c_NS_simpleAnmPlay
/* 800AD2C0 000AA200 39 61 00 30 */ addi r11, r1, 0x30
/* 800AD2C4 000AA204 48 2B 4F 51 */ bl func_80362214
/* 800AD2C4 000AA204 48 2B 4F 51 */ bl _restgpr_24
/* 800AD2C8 000AA208 80 01 00 34 */ lwz r0, 0x34(r1)
/* 800AD2CC 000AA20C 7C 08 03 A6 */ mtlr r0
/* 800AD2D0 000AA210 38 21 00 30 */ addi r1, r1, 0x30
include/d/d_a/d_a_alink/asm/func_800AD3D8.s
+1 -1
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@@ -10,7 +10,7 @@
/* 800AD3FC 000AA33C DB 81 00 30 */ stfd f28, 0x30(r1)
/* 800AD400 000AA340 F3 81 00 38 */ psq_st f28, 56(r1), 0, 0
/* 800AD404 000AA344 39 61 00 30 */ addi r11, r1, 0x30
/* 800AD408 000AA348 48 2B 4D C5 */ bl func_803621CC
/* 800AD408 000AA348 48 2B 4D C5 */ bl _savegpr_25
/* 800AD40C 000AA34C 7C 7A 1B 78 */ mr r26, r3
/* 800AD410 000AA350 7C 9B 23 78 */ mr r27, r4
/* 800AD414 000AA354 7C BC 2B 78 */ mr r28, r5
include/d/d_a/d_a_alink/asm/func_800B3500.s
+1 -1
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@@ -2,7 +2,7 @@
/* 800B3504 000B0444 7C 08 02 A6 */ mflr r0
/* 800B3508 000B0448 90 01 00 34 */ stw r0, 0x34(r1)
/* 800B350C 000B044C 39 61 00 30 */ addi r11, r1, 0x30
/* 800B3510 000B0450 48 2A EC BD */ bl func_803621CC
/* 800B3510 000B0450 48 2A EC BD */ bl _savegpr_25
/* 800B3514 000B0454 7C 7D 1B 78 */ mr r29, r3
/* 800B3518 000B0458 3B E0 00 01 */ li r31, 1
/* 800B351C 000B045C 7F FE FB 78 */ mr r30, r31
include/d/d_a/d_a_alink/asm/func_800C1F6C.s
+1 -1
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@@ -2,7 +2,7 @@
/* 800C1F70 000BEEB0 7C 08 02 A6 */ mflr r0
/* 800C1F74 000BEEB4 90 01 00 34 */ stw r0, 0x34(r1)
/* 800C1F78 000BEEB8 39 61 00 30 */ addi r11, r1, 0x30
/* 800C1F7C 000BEEBC 48 2A 02 51 */ bl func_803621CC
/* 800C1F7C 000BEEBC 48 2A 02 51 */ bl _savegpr_25
/* 800C1F80 000BEEC0 7C 79 1B 78 */ mr r25, r3
/* 800C1F84 000BEEC4 7C 9A 23 78 */ mr r26, r4
/* 800C1F88 000BEEC8 A0 A3 2F E8 */ lhz r5, 0x2fe8(r3)
include/d/d_a/d_a_alink/asm/func_800CF380.s
+1 -1
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@@ -144,7 +144,7 @@
/* 800CF584 000CC4C4 38 03 72 18 */ addi r0, r3, lbl_803A7218@l
/* 800CF588 000CC4C8 90 1A 01 1C */ stw r0, 0x11c(r26)
/* 800CF58C 000CC4CC 38 7A 01 24 */ addi r3, r26, 0x124
/* 800CF590 000CC4D0 48 19 F9 F9 */ bl cM3dGCps
/* 800CF590 000CC4D0 48 19 F9 F9 */ bl __ct__8cM3dGCpsFv
/* 800CF594 000CC4D4 3C 60 80 3C */ lis r3, lbl_803C3608@ha
/* 800CF598 000CC4D8 38 63 36 08 */ addi r3, r3, lbl_803C3608@l
/* 800CF59C 000CC4DC 90 7A 01 20 */ stw r3, 0x120(r26)
include/d/d_a/d_a_alink/asm/func_800D1540.s
+1 -1
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@@ -3,7 +3,7 @@
/* 800D1548 000CE488 90 01 00 34 */ stw r0, 0x34(r1)
/* 800D154C 000CE48C DB E1 00 28 */ stfd f31, 0x28(r1)
/* 800D1550 000CE490 39 61 00 28 */ addi r11, r1, 0x28
/* 800D1554 000CE494 48 29 0C 79 */ bl func_803621CC
/* 800D1554 000CE494 48 29 0C 79 */ bl _savegpr_25
/* 800D1558 000CE498 7C 7A 1B 78 */ mr r26, r3
/* 800D155C 000CE49C 7C 9B 23 78 */ mr r27, r4
/* 800D1560 000CE4A0 7C BC 2B 78 */ mr r28, r5
include/d/d_a/d_a_alink/asm/func_800D34D8.s
+1 -1
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@@ -4,7 +4,7 @@
/* 800D34E4 000D0424 DB E1 00 30 */ stfd f31, 0x30(r1)
/* 800D34E8 000D0428 F3 E1 00 38 */ psq_st f31, 56(r1), 0, 0
/* 800D34EC 000D042C 39 61 00 30 */ addi r11, r1, 0x30
/* 800D34F0 000D0430 48 28 EC DD */ bl func_803621CC
/* 800D34F0 000D0430 48 28 EC DD */ bl _savegpr_25
/* 800D34F4 000D0434 7C 7C 1B 78 */ mr r28, r3
/* 800D34F8 000D0438 7C 9D 23 78 */ mr r29, r4
/* 800D34FC 000D043C 3C 80 80 39 */ lis r4, lbl_8038D658@ha
include/d/d_a/d_a_alink/asm/func_800DA180.s
+1 -1
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@@ -2,7 +2,7 @@
/* 800DA184 000D70C4 7C 08 02 A6 */ mflr r0
/* 800DA188 000D70C8 90 01 00 44 */ stw r0, 0x44(r1)
/* 800DA18C 000D70CC 39 61 00 40 */ addi r11, r1, 0x40
/* 800DA190 000D70D0 48 28 80 3D */ bl func_803621CC
/* 800DA190 000D70D0 48 28 80 3D */ bl _savegpr_25
/* 800DA194 000D70D4 7C 7A 1B 78 */ mr r26, r3
/* 800DA198 000D70D8 7C 9B 23 78 */ mr r27, r4
/* 800DA19C 000D70DC 7C BC 2B 78 */ mr r28, r5
include/d/d_a/d_a_alink/asm/func_800DA82C.s
+2 -2
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@@ -2,7 +2,7 @@
/* 800DA830 000D7770 7C 08 02 A6 */ mflr r0
/* 800DA834 000D7774 90 01 00 64 */ stw r0, 0x64(r1)
/* 800DA838 000D7778 39 61 00 60 */ addi r11, r1, 0x60
/* 800DA83C 000D777C 48 28 79 8D */ bl func_803621C8
/* 800DA83C 000D777C 48 28 79 8D */ bl _savegpr_24
/* 800DA840 000D7780 7C 78 1B 78 */ mr r24, r3
/* 800DA844 000D7784 7C 99 23 78 */ mr r25, r4
/* 800DA848 000D7788 7C BA 2B 78 */ mr r26, r5
@@ -272,7 +272,7 @@ lbl_800DABB8:
/* 800DAC0C 000D7B4C 38 60 00 01 */ li r3, 1
lbl_800DAC10:
/* 800DAC10 000D7B50 39 61 00 60 */ addi r11, r1, 0x60
/* 800DAC14 000D7B54 48 28 76 01 */ bl func_80362214
/* 800DAC14 000D7B54 48 28 76 01 */ bl _restgpr_24
/* 800DAC18 000D7B58 80 01 00 64 */ lwz r0, 0x64(r1)
/* 800DAC1C 000D7B5C 7C 08 03 A6 */ mtlr r0
/* 800DAC20 000D7B60 38 21 00 60 */ addi r1, r1, 0x60
include/d/d_a/d_a_alink/asm/func_800DC678.s
+1 -1
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@@ -2,7 +2,7 @@
/* 800DC67C 000D95BC 7C 08 02 A6 */ mflr r0
/* 800DC680 000D95C0 90 01 00 34 */ stw r0, 0x34(r1)
/* 800DC684 000D95C4 39 61 00 30 */ addi r11, r1, 0x30
/* 800DC688 000D95C8 48 28 5B 45 */ bl func_803621CC
/* 800DC688 000D95C8 48 28 5B 45 */ bl _savegpr_25
/* 800DC68C 000D95CC 7C 7E 1B 78 */ mr r30, r3
/* 800DC690 000D95D0 3B E0 00 00 */ li r31, 0
/* 800DC694 000D95D4 7F FC FB 78 */ mr r28, r31
include/d/d_a/d_a_alink/asm/func_800E3F50.s
+1 -1
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@@ -4,7 +4,7 @@
/* 800E3F5C 000E0E9C DB E1 01 80 */ stfd f31, 0x180(r1)
/* 800E3F60 000E0EA0 F3 E1 01 88 */ psq_st f31, 392(r1), 0, 0
/* 800E3F64 000E0EA4 39 61 01 80 */ addi r11, r1, 0x180
/* 800E3F68 000E0EA8 48 27 E2 65 */ bl func_803621CC
/* 800E3F68 000E0EA8 48 27 E2 65 */ bl _savegpr_25
/* 800E3F6C 000E0EAC 7C 7F 1B 78 */ mr r31, r3
/* 800E3F70 000E0EB0 3C 60 80 42 */ lis r3, lbl_80425508@ha
/* 800E3F74 000E0EB4 3B 83 55 08 */ addi r28, r3, lbl_80425508@l
include/d/d_a/d_a_alink/asm/func_800EF95C.s
+1 -1
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@@ -6,7 +6,7 @@
/* 800EF970 000EC8B0 DB C1 00 60 */ stfd f30, 0x60(r1)
/* 800EF974 000EC8B4 F3 C1 00 68 */ psq_st f30, 104(r1), 0, 0
/* 800EF978 000EC8B8 39 61 00 60 */ addi r11, r1, 0x60
/* 800EF97C 000EC8BC 48 27 28 51 */ bl func_803621CC
/* 800EF97C 000EC8BC 48 27 28 51 */ bl _savegpr_25
/* 800EF980 000EC8C0 7C 7A 1B 78 */ mr r26, r3
/* 800EF984 000EC8C4 3C 60 80 42 */ lis r3, lbl_80425508@ha
/* 800EF988 000EC8C8 3B 63 55 08 */ addi r27, r3, lbl_80425508@l
include/d/d_a/d_a_alink/asm/func_800F81C0.s
+1 -1
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@@ -2,7 +2,7 @@
/* 800F81C4 000F5104 7C 08 02 A6 */ mflr r0
/* 800F81C8 000F5108 90 01 00 94 */ stw r0, 0x94(r1)
/* 800F81CC 000F510C 39 61 00 90 */ addi r11, r1, 0x90
/* 800F81D0 000F5110 48 26 9F FD */ bl func_803621CC
/* 800F81D0 000F5110 48 26 9F FD */ bl _savegpr_25
/* 800F81D4 000F5114 7C 79 1B 78 */ mr r25, r3
/* 800F81D8 000F5118 7C BD 2B 78 */ mr r29, r5
/* 800F81DC 000F511C 7C DA 33 78 */ mr r26, r6
include/d/d_a/d_a_alink/asm/func_800F9474.s
+1 -1
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@@ -4,7 +4,7 @@
/* 800F9480 000F63C0 DB E1 00 30 */ stfd f31, 0x30(r1)
/* 800F9484 000F63C4 F3 E1 00 38 */ psq_st f31, 56(r1), 0, 0
/* 800F9488 000F63C8 39 61 00 30 */ addi r11, r1, 0x30
/* 800F948C 000F63CC 48 26 8D 41 */ bl func_803621CC
/* 800F948C 000F63CC 48 26 8D 41 */ bl _savegpr_25
/* 800F9490 000F63D0 7C 7B 1B 78 */ mr r27, r3
/* 800F9494 000F63D4 7C 9C 23 78 */ mr r28, r4
/* 800F9498 000F63D8 7C BD 2B 78 */ mr r29, r5
include/d/d_a/d_a_alink/asm/func_800F95B8.s
+2 -2
View File
@@ -4,7 +4,7 @@
/* 800F95C4 000F6504 DB E1 00 90 */ stfd f31, 0x90(r1)
/* 800F95C8 000F6508 F3 E1 00 98 */ psq_st f31, 152(r1), 0, 0
/* 800F95CC 000F650C 39 61 00 90 */ addi r11, r1, 0x90
/* 800F95D0 000F6510 48 26 8B F9 */ bl func_803621C8
/* 800F95D0 000F6510 48 26 8B F9 */ bl _savegpr_24
/* 800F95D4 000F6514 7C 79 1B 78 */ mr r25, r3
/* 800F95D8 000F6518 3C 80 80 39 */ lis r4, lbl_8038D658@ha
/* 800F95DC 000F651C 3B 84 D6 58 */ addi r28, r4, lbl_8038D658@l
@@ -287,7 +287,7 @@ lbl_800F99DC:
/* 800F99DC 000F691C E3 E1 00 98 */ psq_l f31, 152(r1), 0, 0
/* 800F99E0 000F6920 CB E1 00 90 */ lfd f31, 0x90(r1)
/* 800F99E4 000F6924 39 61 00 90 */ addi r11, r1, 0x90
/* 800F99E8 000F6928 48 26 88 2D */ bl func_80362214
/* 800F99E8 000F6928 48 26 88 2D */ bl _restgpr_24
/* 800F99EC 000F692C 80 01 00 A4 */ lwz r0, 0xa4(r1)
/* 800F99F0 000F6930 7C 08 03 A6 */ mtlr r0
/* 800F99F4 000F6934 38 21 00 A0 */ addi r1, r1, 0xa0
include/d/d_a/d_a_alink/asm/func_800FA070.s
+2 -2
View File
@@ -6,7 +6,7 @@
/* 800FA084 000F6FC4 DB C1 00 90 */ stfd f30, 0x90(r1)
/* 800FA088 000F6FC8 F3 C1 00 98 */ psq_st f30, 152(r1), 0, 0
/* 800FA08C 000F6FCC 39 61 00 90 */ addi r11, r1, 0x90
/* 800FA090 000F6FD0 48 26 81 39 */ bl func_803621C8
/* 800FA090 000F6FD0 48 26 81 39 */ bl _savegpr_24
/* 800FA094 000F6FD4 7C 7D 1B 78 */ mr r29, r3
/* 800FA098 000F6FD8 7C BE 2B 78 */ mr r30, r5
/* 800FA09C 000F6FDC 3B E0 00 00 */ li r31, 0
@@ -179,7 +179,7 @@ lbl_800FA310:
/* 800FA318 000F7258 E3 C1 00 98 */ psq_l f30, 152(r1), 0, 0
/* 800FA31C 000F725C CB C1 00 90 */ lfd f30, 0x90(r1)
/* 800FA320 000F7260 39 61 00 90 */ addi r11, r1, 0x90
/* 800FA324 000F7264 48 26 7E F1 */ bl func_80362214
/* 800FA324 000F7264 48 26 7E F1 */ bl _restgpr_24
/* 800FA328 000F7268 80 01 00 B4 */ lwz r0, 0xb4(r1)
/* 800FA32C 000F726C 7C 08 03 A6 */ mtlr r0
/* 800FA330 000F7270 38 21 00 B0 */ addi r1, r1, 0xb0
include/d/d_a/d_a_alink/asm/func_80109BDC.s
+1 -1
View File
@@ -8,7 +8,7 @@
/* 80109BF8 00106B38 DB A1 02 10 */ stfd f29, 0x210(r1)
/* 80109BFC 00106B3C F3 A1 02 18 */ psq_st f29, 536(r1), 0, 0
/* 80109C00 00106B40 39 61 02 10 */ addi r11, r1, 0x210
/* 80109C04 00106B44 48 25 85 C9 */ bl func_803621CC
/* 80109C04 00106B44 48 25 85 C9 */ bl _savegpr_25
/* 80109C08 00106B48 7C 7F 1B 78 */ mr r31, r3
/* 80109C0C 00106B4C 80 63 06 50 */ lwz r3, 0x650(r3)
/* 80109C10 00106B50 80 63 00 84 */ lwz r3, 0x84(r3)
include/d/d_a/d_a_alink/asm/func_8010BEF0.s
+2 -2
View File
@@ -6,7 +6,7 @@
/* 8010BF04 00108E44 DB C1 00 F0 */ stfd f30, 0xf0(r1)
/* 8010BF08 00108E48 F3 C1 00 F8 */ psq_st f30, 248(r1), 0, 0
/* 8010BF0C 00108E4C 39 61 00 F0 */ addi r11, r1, 0xf0
/* 8010BF10 00108E50 48 25 62 B9 */ bl func_803621C8
/* 8010BF10 00108E50 48 25 62 B9 */ bl _savegpr_24
/* 8010BF14 00108E54 7C 79 1B 78 */ mr r25, r3
/* 8010BF18 00108E58 83 E3 28 50 */ lwz r31, 0x2850(r3)
/* 8010BF1C 00108E5C 28 1F 00 00 */ cmplwi r31, 0
@@ -634,7 +634,7 @@ lbl_8010C808:
/* 8010C810 00109750 E3 C1 00 F8 */ psq_l f30, 248(r1), 0, 0
/* 8010C814 00109754 CB C1 00 F0 */ lfd f30, 0xf0(r1)
/* 8010C818 00109758 39 61 00 F0 */ addi r11, r1, 0xf0
/* 8010C81C 0010975C 48 25 59 F9 */ bl func_80362214
/* 8010C81C 0010975C 48 25 59 F9 */ bl _restgpr_24
/* 8010C820 00109760 80 01 01 14 */ lwz r0, 0x114(r1)
/* 8010C824 00109764 7C 08 03 A6 */ mtlr r0
/* 8010C828 00109768 38 21 01 10 */ addi r1, r1, 0x110
include/d/d_a/d_a_alink/asm/func_80111A9C.s
+1 -1
View File
@@ -2,7 +2,7 @@
/* 80111AA0 0010E9E0 7C 08 02 A6 */ mflr r0
/* 80111AA4 0010E9E4 90 01 00 34 */ stw r0, 0x34(r1)
/* 80111AA8 0010E9E8 39 61 00 30 */ addi r11, r1, 0x30
/* 80111AAC 0010E9EC 48 25 07 21 */ bl func_803621CC
/* 80111AAC 0010E9EC 48 25 07 21 */ bl _savegpr_25
/* 80111AB0 0010E9F0 7C 79 1B 78 */ mr r25, r3
/* 80111AB4 0010E9F4 7C 9A 23 78 */ mr r26, r4
/* 80111AB8 0010E9F8 7C BB 2B 78 */ mr r27, r5
include/d/d_a/d_a_alink/asm/func_80112E7C.s
+2 -2
View File
@@ -8,7 +8,7 @@
/* 80112E98 0010FDD8 DB A1 02 C0 */ stfd f29, 0x2c0(r1)
/* 80112E9C 0010FDDC F3 A1 02 C8 */ psq_st f29, 712(r1), 0, 0
/* 80112EA0 0010FDE0 39 61 02 C0 */ addi r11, r1, 0x2c0
/* 80112EA4 0010FDE4 48 24 F3 25 */ bl func_803621C8
/* 80112EA4 0010FDE4 48 24 F3 25 */ bl _savegpr_24
/* 80112EA8 0010FDE8 7C 7F 1B 78 */ mr r31, r3
/* 80112EAC 0010FDEC 80 83 38 40 */ lwz r4, 0x3840(r3)
/* 80112EB0 0010FDF0 A8 03 30 1A */ lha r0, 0x301a(r3)
@@ -952,7 +952,7 @@ lbl_80113C70:
/* 80113C80 00110BC0 E3 A1 02 C8 */ psq_l f29, 712(r1), 0, 0
/* 80113C84 00110BC4 CB A1 02 C0 */ lfd f29, 0x2c0(r1)
/* 80113C88 00110BC8 39 61 02 C0 */ addi r11, r1, 0x2c0
/* 80113C8C 00110BCC 48 24 E5 89 */ bl func_80362214
/* 80113C8C 00110BCC 48 24 E5 89 */ bl _restgpr_24
/* 80113C90 00110BD0 80 01 02 F4 */ lwz r0, 0x2f4(r1)
/* 80113C94 00110BD4 7C 08 03 A6 */ mtlr r0
/* 80113C98 00110BD8 38 21 02 F0 */ addi r1, r1, 0x2f0
include/d/d_a/d_a_alink/asm/func_80113D58.s
+2 -2
View File
@@ -8,7 +8,7 @@
/* 80113D74 00110CB4 DB A1 01 80 */ stfd f29, 0x180(r1)
/* 80113D78 00110CB8 F3 A1 01 88 */ psq_st f29, 392(r1), 0, 0
/* 80113D7C 00110CBC 39 61 01 80 */ addi r11, r1, 0x180
/* 80113D80 00110CC0 48 24 E4 49 */ bl func_803621C8
/* 80113D80 00110CC0 48 24 E4 49 */ bl _savegpr_24
/* 80113D84 00110CC4 7C 7F 1B 78 */ mr r31, r3
/* 80113D88 00110CC8 3C 60 80 39 */ lis r3, lbl_8038D658@ha
/* 80113D8C 00110CCC 3B C3 D6 58 */ addi r30, r3, lbl_8038D658@l
@@ -1331,7 +1331,7 @@ lbl_801150A0:
/* 801150C4 00112004 E3 A1 01 88 */ psq_l f29, 392(r1), 0, 0
/* 801150C8 00112008 CB A1 01 80 */ lfd f29, 0x180(r1)
/* 801150CC 0011200C 39 61 01 80 */ addi r11, r1, 0x180
/* 801150D0 00112010 48 24 D1 45 */ bl func_80362214
/* 801150D0 00112010 48 24 D1 45 */ bl _restgpr_24
/* 801150D4 00112014 80 01 01 B4 */ lwz r0, 0x1b4(r1)
/* 801150D8 00112018 7C 08 03 A6 */ mtlr r0
/* 801150DC 0011201C 38 21 01 B0 */ addi r1, r1, 0x1b0
include/d/d_a/d_a_alink/asm/func_801191C4.s
+1 -1
View File
@@ -4,7 +4,7 @@
/* 801191D0 00116110 DB E1 00 30 */ stfd f31, 0x30(r1)
/* 801191D4 00116114 F3 E1 00 38 */ psq_st f31, 56(r1), 0, 0
/* 801191D8 00116118 39 61 00 30 */ addi r11, r1, 0x30
/* 801191DC 0011611C 48 24 8F F1 */ bl func_803621CC
/* 801191DC 0011611C 48 24 8F F1 */ bl _savegpr_25
/* 801191E0 00116120 7C 79 1B 78 */ mr r25, r3
/* 801191E4 00116124 7C 9F 23 78 */ mr r31, r4
/* 801191E8 00116128 7C BA 2B 78 */ mr r26, r5
include/d/d_a/d_a_alink/asm/func_801207BC.s
+2 -2
View File
@@ -4,7 +4,7 @@
/* 801207C8 0011D708 DB E1 00 30 */ stfd f31, 0x30(r1)
/* 801207CC 0011D70C F3 E1 00 38 */ psq_st f31, 56(r1), 0, 0
/* 801207D0 0011D710 39 61 00 30 */ addi r11, r1, 0x30
/* 801207D4 0011D714 48 24 19 F5 */ bl func_803621C8
/* 801207D4 0011D714 48 24 19 F5 */ bl _savegpr_24
/* 801207D8 0011D718 7C 78 1B 78 */ mr r24, r3
/* 801207DC 0011D71C 3B 20 00 00 */ li r25, 0
/* 801207E0 0011D720 3B E0 00 00 */ li r31, 0
@@ -45,7 +45,7 @@ lbl_80120844:
/* 80120860 0011D7A0 E3 E1 00 38 */ psq_l f31, 56(r1), 0, 0
/* 80120864 0011D7A4 CB E1 00 30 */ lfd f31, 0x30(r1)
/* 80120868 0011D7A8 39 61 00 30 */ addi r11, r1, 0x30
/* 8012086C 0011D7AC 48 24 19 A9 */ bl func_80362214
/* 8012086C 0011D7AC 48 24 19 A9 */ bl _restgpr_24
/* 80120870 0011D7B0 80 01 00 44 */ lwz r0, 0x44(r1)
/* 80120874 0011D7B4 7C 08 03 A6 */ mtlr r0
/* 80120878 0011D7B8 38 21 00 40 */ addi r1, r1, 0x40
include/d/d_a/d_a_alink/asm/func_8012277C.s
+2 -2
View File
@@ -4,7 +4,7 @@
/* 80122788 0011F6C8 DB E1 00 50 */ stfd f31, 0x50(r1)
/* 8012278C 0011F6CC F3 E1 00 58 */ psq_st f31, 88(r1), 0, 0
/* 80122790 0011F6D0 39 61 00 50 */ addi r11, r1, 0x50
/* 80122794 0011F6D4 48 23 FA 35 */ bl func_803621C8
/* 80122794 0011F6D4 48 23 FA 35 */ bl _savegpr_24
/* 80122798 0011F6D8 7C 7B 1B 78 */ mr r27, r3
/* 8012279C 0011F6DC 3B C0 00 00 */ li r30, 0
/* 801227A0 0011F6E0 3B 40 00 00 */ li r26, 0
@@ -95,7 +95,7 @@ lbl_801228C0:
/* 801228D4 0011F814 E3 E1 00 58 */ psq_l f31, 88(r1), 0, 0
/* 801228D8 0011F818 CB E1 00 50 */ lfd f31, 0x50(r1)
/* 801228DC 0011F81C 39 61 00 50 */ addi r11, r1, 0x50
/* 801228E0 0011F820 48 23 F9 35 */ bl func_80362214
/* 801228E0 0011F820 48 23 F9 35 */ bl _restgpr_24
/* 801228E4 0011F824 80 01 00 64 */ lwz r0, 0x64(r1)
/* 801228E8 0011F828 7C 08 03 A6 */ mtlr r0
/* 801228EC 0011F82C 38 21 00 60 */ addi r1, r1, 0x60
include/d/d_a/d_a_alink/asm/func_801241E0.s
+2 -2
View File
@@ -2,7 +2,7 @@
/* 801241E4 00121124 7C 08 02 A6 */ mflr r0
/* 801241E8 00121128 90 01 00 54 */ stw r0, 0x54(r1)
/* 801241EC 0012112C 39 61 00 50 */ addi r11, r1, 0x50
/* 801241F0 00121130 48 23 DF D9 */ bl func_803621C8
/* 801241F0 00121130 48 23 DF D9 */ bl _savegpr_24
/* 801241F4 00121134 7C 7B 1B 78 */ mr r27, r3
/* 801241F8 00121138 80 83 05 8C */ lwz r4, 0x58c(r3)
/* 801241FC 0012113C 3C 60 00 02 */ lis r3, 0x00021800@ha
@@ -206,7 +206,7 @@ lbl_801244A0:
/* 801244C4 00121404 3B 9C 00 02 */ addi r28, r28, 2
/* 801244C8 00121408 41 80 FE 74 */ blt lbl_8012433C
/* 801244CC 0012140C 39 61 00 50 */ addi r11, r1, 0x50
/* 801244D0 00121410 48 23 DD 45 */ bl func_80362214
/* 801244D0 00121410 48 23 DD 45 */ bl _restgpr_24
/* 801244D4 00121414 80 01 00 54 */ lwz r0, 0x54(r1)
/* 801244D8 00121418 7C 08 03 A6 */ mtlr r0
/* 801244DC 0012141C 38 21 00 50 */ addi r1, r1, 0x50
include/d/d_a/d_a_alink/asm/func_80124EA8.s
+2 -2
View File
@@ -2,7 +2,7 @@
/* 80124EAC 00121DEC 7C 08 02 A6 */ mflr r0
/* 80124EB0 00121DF0 90 01 00 34 */ stw r0, 0x34(r1)
/* 80124EB4 00121DF4 39 61 00 30 */ addi r11, r1, 0x30
/* 80124EB8 00121DF8 48 23 D3 11 */ bl func_803621C8
/* 80124EB8 00121DF8 48 23 D3 11 */ bl _savegpr_24
/* 80124EBC 00121DFC 7C 7B 1B 78 */ mr r27, r3
/* 80124EC0 00121E00 3B BB 32 D8 */ addi r29, r27, 0x32d8
/* 80124EC4 00121E04 80 03 05 74 */ lwz r0, 0x574(r3)
@@ -57,7 +57,7 @@ lbl_80124F00:
/* 80124F84 00121EC4 3B BD 00 30 */ addi r29, r29, 0x30
/* 80124F88 00121EC8 41 80 FF 78 */ blt lbl_80124F00
/* 80124F8C 00121ECC 39 61 00 30 */ addi r11, r1, 0x30
/* 80124F90 00121ED0 48 23 D2 85 */ bl func_80362214
/* 80124F90 00121ED0 48 23 D2 85 */ bl _restgpr_24
/* 80124F94 00121ED4 80 01 00 34 */ lwz r0, 0x34(r1)
/* 80124F98 00121ED8 7C 08 03 A6 */ mtlr r0
/* 80124F9C 00121EDC 38 21 00 30 */ addi r1, r1, 0x30
include/d/d_a/d_a_alink/asm/func_80126F3C.s
+1 -1
View File
@@ -2,7 +2,7 @@
/* 80126F40 00123E80 7C 08 02 A6 */ mflr r0
/* 80126F44 00123E84 90 01 00 44 */ stw r0, 0x44(r1)
/* 80126F48 00123E88 39 61 00 40 */ addi r11, r1, 0x40
/* 80126F4C 00123E8C 48 23 B2 81 */ bl func_803621CC
/* 80126F4C 00123E8C 48 23 B2 81 */ bl _savegpr_25
/* 80126F50 00123E90 7C 7F 1B 78 */ mr r31, r3
/* 80126F54 00123E94 7C 9D 23 78 */ mr r29, r4
/* 80126F58 00123E98 3C 60 80 39 */ lis r3, lbl_8038D658@ha
include/d/d_a/d_a_alink/asm/func_80127F50.s
+1 -1
View File
@@ -14,7 +14,7 @@
/* 80127F84 00124EC4 DB 41 00 50 */ stfd f26, 0x50(r1)
/* 80127F88 00124EC8 F3 41 00 58 */ psq_st f26, 88(r1), 0, 0
/* 80127F8C 00124ECC 39 61 00 50 */ addi r11, r1, 0x50
/* 80127F90 00124ED0 48 23 A2 3D */ bl func_803621CC
/* 80127F90 00124ED0 48 23 A2 3D */ bl _savegpr_25
/* 80127F94 00124ED4 7C 79 1B 78 */ mr r25, r3
/* 80127F98 00124ED8 C3 E2 92 C0 */ lfs f31, lbl_80452CC0-_SDA2_BASE_(r2)
/* 80127F9C 00124EDC 80 03 05 74 */ lwz r0, 0x574(r3)
include/d/d_a/d_a_alink/asm/func_8012948C.s
+1 -1
View File
@@ -10,7 +10,7 @@
/* 801294B0 001263F0 DB 81 00 30 */ stfd f28, 0x30(r1)
/* 801294B4 001263F4 F3 81 00 38 */ psq_st f28, 56(r1), 0, 0
/* 801294B8 001263F8 39 61 00 30 */ addi r11, r1, 0x30
/* 801294BC 001263FC 48 23 8D 11 */ bl func_803621CC
/* 801294BC 001263FC 48 23 8D 11 */ bl _savegpr_25
/* 801294C0 00126400 7C 7B 1B 78 */ mr r27, r3
/* 801294C4 00126404 FF 80 08 90 */ fmr f28, f1
/* 801294C8 00126408 FF A0 10 90 */ fmr f29, f2
include/d/d_a/d_a_alink/asm/func_8012A498.s
+1 -1
View File
@@ -12,7 +12,7 @@
/* 8012A4C4 00127404 DB 61 00 90 */ stfd f27, 0x90(r1)
/* 8012A4C8 00127408 F3 61 00 98 */ psq_st f27, 152(r1), 0, 0
/* 8012A4CC 0012740C 39 61 00 90 */ addi r11, r1, 0x90
/* 8012A4D0 00127410 48 23 7C FD */ bl func_803621CC
/* 8012A4D0 00127410 48 23 7C FD */ bl _savegpr_25
/* 8012A4D4 00127414 7C 7A 1B 78 */ mr r26, r3
/* 8012A4D8 00127418 80 83 05 7C */ lwz r4, 0x57c(r3)
/* 8012A4DC 0012741C 3C 60 FF 80 */ lis r3, 0xFF7FFBFF@ha
include/d/d_a/d_a_alink/asm/func_80130BC4.s
+1 -1
View File
@@ -4,7 +4,7 @@
/* 80130BD0 0012DB10 DB E1 00 40 */ stfd f31, 0x40(r1)
/* 80130BD4 0012DB14 F3 E1 00 48 */ psq_st f31, 72(r1), 0, 0
/* 80130BD8 0012DB18 39 61 00 40 */ addi r11, r1, 0x40
/* 80130BDC 0012DB1C 48 23 15 F1 */ bl func_803621CC
/* 80130BDC 0012DB1C 48 23 15 F1 */ bl _savegpr_25
/* 80130BE0 0012DB20 7C 7F 1B 78 */ mr r31, r3
/* 80130BE4 0012DB24 3B BF 1F D0 */ addi r29, r31, 0x1fd0
/* 80130BE8 0012DB28 83 83 28 10 */ lwz r28, 0x2810(r3)
include/d/d_a/d_a_alink/asm/func_80136624.s
+1 -1
View File
@@ -2,7 +2,7 @@
/* 80136628 00133568 7C 08 02 A6 */ mflr r0
/* 8013662C 0013356C 90 01 00 44 */ stw r0, 0x44(r1)
/* 80136630 00133570 39 61 00 40 */ addi r11, r1, 0x40
/* 80136634 00133574 48 22 BB 99 */ bl func_803621CC
/* 80136634 00133574 48 22 BB 99 */ bl _savegpr_25
/* 80136638 00133578 7C 7C 1B 78 */ mr r28, r3
/* 8013663C 0013357C 7C 9D 23 78 */ mr r29, r4
/* 80136640 00133580 7C B9 2B 78 */ mr r25, r5
include/d/d_a/d_a_alink/asm/func_801377F0.s
+2 -2
View File
@@ -4,7 +4,7 @@
/* 801377FC 0013473C DB E1 00 80 */ stfd f31, 0x80(r1)
/* 80137800 00134740 F3 E1 00 88 */ psq_st f31, 136(r1), 0, 0
/* 80137804 00134744 39 61 00 80 */ addi r11, r1, 0x80
/* 80137808 00134748 48 22 A9 C1 */ bl func_803621C8
/* 80137808 00134748 48 22 A9 C1 */ bl _savegpr_24
/* 8013780C 0013474C 7C 79 1B 78 */ mr r25, r3
/* 80137810 00134750 3C 80 80 39 */ lis r4, lbl_8038D658@ha
/* 80137814 00134754 3B 84 D6 58 */ addi r28, r4, lbl_8038D658@l
@@ -318,7 +318,7 @@ lbl_80137C70:
/* 80137C70 00134BB0 E3 E1 00 88 */ psq_l f31, 136(r1), 0, 0
/* 80137C74 00134BB4 CB E1 00 80 */ lfd f31, 0x80(r1)
/* 80137C78 00134BB8 39 61 00 80 */ addi r11, r1, 0x80
/* 80137C7C 00134BBC 48 22 A5 99 */ bl func_80362214
/* 80137C7C 00134BBC 48 22 A5 99 */ bl _restgpr_24
/* 80137C80 00134BC0 80 01 00 94 */ lwz r0, 0x94(r1)
/* 80137C84 00134BC4 7C 08 03 A6 */ mtlr r0
/* 80137C88 00134BC8 38 21 00 90 */ addi r1, r1, 0x90
include/d/d_a/d_a_alink/asm/func_80140FA0.s
+1 -1
View File
@@ -11,7 +11,7 @@
/* 80140FC8 0013DF08 38 03 72 18 */ addi r0, r3, lbl_803A7218@l
/* 80140FCC 0013DF0C 90 1F 01 1C */ stw r0, 0x11c(r31)
/* 80140FD0 0013DF10 38 7F 01 24 */ addi r3, r31, 0x124
/* 80140FD4 0013DF14 48 12 DF B5 */ bl cM3dGCps
/* 80140FD4 0013DF14 48 12 DF B5 */ bl __ct__8cM3dGCpsFv
/* 80140FD8 0013DF18 3C 60 80 3C */ lis r3, lbl_803C3608@ha
/* 80140FDC 0013DF1C 38 63 36 08 */ addi r3, r3, lbl_803C3608@l
/* 80140FE0 0013DF20 90 7F 01 20 */ stw r3, 0x120(r31)