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some MSL_C work (#192)

Browse Source 
* wip

* bunch of MSL_C files

thanks to pikmin2 decomp for their work

* format / asm

* progress

* fix

* fix remove-asm to work with C files

* init / start
This commit is contained in:
TakaRikka
2022-04-24 04:02:50 -07:00
committed by GitHub
parent a1099217d6
commit 589cc12296
154 changed files with 2388 additions and 3088 deletions
Download Patch File Download Diff File Expand all files Collapse all files
asm/MSL_C/MSL_Common/Src/ansi_files/__close_all.s
-47
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@@ -1,47 +0,0 @@
lbl_8036307C:
/* 8036307C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80363080 7C 08 02 A6 */ mflr r0
/* 80363084 3C 80 80 3D */ lis r4, __files@ha /* 0x803D29B0@ha */
/* 80363088 38 60 00 02 */ li r3, 2
/* 8036308C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80363090 38 04 29 B0 */ addi r0, r4, __files@l /* 0x803D29B0@l */
/* 80363094 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80363098 7C 1F 03 78 */ mr r31, r0
/* 8036309C 48 00 23 CD */ bl __begin_critical_region
/* 803630A0 48 00 00 60 */ b lbl_80363100
lbl_803630A4:
/* 803630A4 A0 1F 00 04 */ lhz r0, 4(r31)
/* 803630A8 54 00 D7 7F */ rlwinm. r0, r0, 0x1a, 0x1d, 0x1f
/* 803630AC 41 82 00 0C */ beq lbl_803630B8
/* 803630B0 7F E3 FB 78 */ mr r3, r31
/* 803630B4 48 00 29 45 */ bl fclose
lbl_803630B8:
/* 803630B8 7F E3 FB 78 */ mr r3, r31
/* 803630BC 83 FF 00 4C */ lwz r31, 0x4c(r31)
/* 803630C0 88 03 00 0C */ lbz r0, 0xc(r3)
/* 803630C4 28 00 00 00 */ cmplwi r0, 0
/* 803630C8 41 82 00 0C */ beq lbl_803630D4
/* 803630CC 4B FF FA 8D */ bl free
/* 803630D0 48 00 00 30 */ b lbl_80363100
lbl_803630D4:
/* 803630D4 A0 03 00 04 */ lhz r0, 4(r3)
/* 803630D8 38 80 00 03 */ li r4, 3
/* 803630DC 50 80 35 F2 */ rlwimi r0, r4, 6, 0x17, 0x19
/* 803630E0 28 1F 00 00 */ cmplwi r31, 0
/* 803630E4 B0 03 00 04 */ sth r0, 4(r3)
/* 803630E8 41 82 00 18 */ beq lbl_80363100
/* 803630EC 88 1F 00 0C */ lbz r0, 0xc(r31)
/* 803630F0 28 00 00 00 */ cmplwi r0, 0
/* 803630F4 41 82 00 0C */ beq lbl_80363100
/* 803630F8 38 00 00 00 */ li r0, 0
/* 803630FC 90 03 00 4C */ stw r0, 0x4c(r3)
lbl_80363100:
/* 80363100 28 1F 00 00 */ cmplwi r31, 0
/* 80363104 40 82 FF A0 */ bne lbl_803630A4
/* 80363108 38 60 00 02 */ li r3, 2
/* 8036310C 48 00 23 59 */ bl __end_critical_region
/* 80363110 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80363114 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 80363118 7C 08 03 A6 */ mtlr r0
/* 8036311C 38 21 00 10 */ addi r1, r1, 0x10
/* 80363120 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/ansi_files/__flush_all.s
-32
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@@ -1,32 +0,0 @@
lbl_8036300C:
/* 8036300C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80363010 7C 08 02 A6 */ mflr r0
/* 80363014 3C 60 80 3D */ lis r3, __files@ha /* 0x803D29B0@ha */
/* 80363018 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036301C 38 03 29 B0 */ addi r0, r3, __files@l /* 0x803D29B0@l */
/* 80363020 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80363024 3B E0 00 00 */ li r31, 0
/* 80363028 93 C1 00 08 */ stw r30, 8(r1)
/* 8036302C 7C 1E 03 78 */ mr r30, r0
/* 80363030 48 00 00 28 */ b lbl_80363058
lbl_80363034:
/* 80363034 A0 1E 00 04 */ lhz r0, 4(r30)
/* 80363038 54 00 D7 7F */ rlwinm. r0, r0, 0x1a, 0x1d, 0x1f
/* 8036303C 41 82 00 18 */ beq lbl_80363054
/* 80363040 7F C3 F3 78 */ mr r3, r30
/* 80363044 48 00 28 7D */ bl fflush
/* 80363048 2C 03 00 00 */ cmpwi r3, 0
/* 8036304C 41 82 00 08 */ beq lbl_80363054
/* 80363050 3B E0 FF FF */ li r31, -1
lbl_80363054:
/* 80363054 83 DE 00 4C */ lwz r30, 0x4c(r30)
lbl_80363058:
/* 80363058 28 1E 00 00 */ cmplwi r30, 0
/* 8036305C 40 82 FF D8 */ bne lbl_80363034
/* 80363060 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80363064 7F E3 FB 78 */ mr r3, r31
/* 80363068 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8036306C 83 C1 00 08 */ lwz r30, 8(r1)
/* 80363070 7C 08 03 A6 */ mtlr r0
/* 80363074 38 21 00 10 */ addi r1, r1, 0x10
/* 80363078 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/ctype/tolower.s
-11
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@@ -1,11 +0,0 @@
lbl_80365470:
/* 80365470 2C 03 FF FF */ cmpwi r3, -1
/* 80365474 40 82 00 0C */ bne lbl_80365480
/* 80365478 38 60 FF FF */ li r3, -1
/* 8036547C 4E 80 00 20 */ blr
lbl_80365480:
/* 80365480 3C 80 80 3D */ lis r4, __lower_map@ha /* 0x803D2D18@ha */
/* 80365484 54 60 06 3E */ clrlwi r0, r3, 0x18
/* 80365488 38 64 2D 18 */ addi r3, r4, __lower_map@l /* 0x803D2D18@l */
/* 8036548C 7C 63 00 AE */ lbzx r3, r3, r0
/* 80365490 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/mem/__memrchr.s
-14
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@@ -1,14 +0,0 @@
lbl_803660D8:
/* 803660D8 54 84 06 3E */ clrlwi r4, r4, 0x18
/* 803660DC 7C 63 2A 14 */ add r3, r3, r5
/* 803660E0 38 A5 00 01 */ addi r5, r5, 1
/* 803660E4 48 00 00 10 */ b lbl_803660F4
lbl_803660E8:
/* 803660E8 8C 03 FF FF */ lbzu r0, -1(r3)
/* 803660EC 7C 00 20 40 */ cmplw r0, r4
/* 803660F0 4D 82 00 20 */ beqlr
lbl_803660F4:
/* 803660F4 34 A5 FF FF */ addic. r5, r5, -1
/* 803660F8 40 82 FF F0 */ bne lbl_803660E8
/* 803660FC 38 60 00 00 */ li r3, 0
/* 80366100 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/mem/memchr.s
-14
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@@ -1,14 +0,0 @@
lbl_80366104:
/* 80366104 54 84 06 3E */ clrlwi r4, r4, 0x18
/* 80366108 38 63 FF FF */ addi r3, r3, -1
/* 8036610C 38 A5 00 01 */ addi r5, r5, 1
/* 80366110 48 00 00 10 */ b lbl_80366120
lbl_80366114:
/* 80366114 8C 03 00 01 */ lbzu r0, 1(r3)
/* 80366118 7C 00 20 40 */ cmplw r0, r4
/* 8036611C 4D 82 00 20 */ beqlr
lbl_80366120:
/* 80366120 34 A5 FF FF */ addic. r5, r5, -1
/* 80366124 40 82 FF F0 */ bne lbl_80366114
/* 80366128 38 60 00 00 */ li r3, 0
/* 8036612C 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/mem/memcmp.s
-22
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@@ -1,22 +0,0 @@
lbl_8036608C:
/* 8036608C 38 C3 FF FF */ addi r6, r3, -1
/* 80366090 38 E4 FF FF */ addi r7, r4, -1
/* 80366094 38 85 00 01 */ addi r4, r5, 1
/* 80366098 48 00 00 30 */ b lbl_803660C8
lbl_8036609C:
/* 8036609C 8C 66 00 01 */ lbzu r3, 1(r6)
/* 803660A0 8C 07 00 01 */ lbzu r0, 1(r7)
/* 803660A4 7C 03 00 40 */ cmplw r3, r0
/* 803660A8 41 82 00 20 */ beq lbl_803660C8
/* 803660AC 88 86 00 00 */ lbz r4, 0(r6)
/* 803660B0 38 60 00 01 */ li r3, 1
/* 803660B4 88 07 00 00 */ lbz r0, 0(r7)
/* 803660B8 7C 04 00 40 */ cmplw r4, r0
/* 803660BC 4C 80 00 20 */ bgelr
/* 803660C0 38 60 FF FF */ li r3, -1
/* 803660C4 4E 80 00 20 */ blr
lbl_803660C8:
/* 803660C8 34 84 FF FF */ addic. r4, r4, -1
/* 803660CC 40 82 FF D0 */ bne lbl_8036609C
/* 803660D0 38 60 00 00 */ li r3, 0
/* 803660D4 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/mem/memmove.s
-64
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@@ -1,64 +0,0 @@
lbl_80366130:
/* 80366130 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80366134 7C 08 02 A6 */ mflr r0
/* 80366138 28 05 00 20 */ cmplwi r5, 0x20
/* 8036613C 90 01 00 14 */ stw r0, 0x14(r1)
/* 80366140 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80366144 7C 7F 1B 78 */ mr r31, r3
/* 80366148 7F E6 22 78 */ xor r6, r31, r4
/* 8036614C 7C C0 00 34 */ cntlzw r0, r6
/* 80366150 7F E0 00 30 */ slw r0, r31, r0
/* 80366154 54 07 0F FE */ srwi r7, r0, 0x1f
/* 80366158 41 80 00 40 */ blt lbl_80366198
/* 8036615C 54 C0 07 BF */ clrlwi. r0, r6, 0x1e
/* 80366160 41 82 00 1C */ beq lbl_8036617C
/* 80366164 2C 07 00 00 */ cmpwi r7, 0
/* 80366168 40 82 00 0C */ bne lbl_80366174
/* 8036616C 48 00 01 3D */ bl __copy_longs_unaligned
/* 80366170 48 00 00 20 */ b lbl_80366190
lbl_80366174:
/* 80366174 48 00 00 89 */ bl __copy_longs_rev_unaligned
/* 80366178 48 00 00 18 */ b lbl_80366190
lbl_8036617C:
/* 8036617C 2C 07 00 00 */ cmpwi r7, 0
/* 80366180 40 82 00 0C */ bne lbl_8036618C
/* 80366184 48 00 02 8D */ bl __copy_longs_aligned
/* 80366188 48 00 00 08 */ b lbl_80366190
lbl_8036618C:
/* 8036618C 48 00 01 DD */ bl __copy_longs_rev_aligned
lbl_80366190:
/* 80366190 7F E3 FB 78 */ mr r3, r31
/* 80366194 48 00 00 54 */ b lbl_803661E8
lbl_80366198:
/* 80366198 2C 07 00 00 */ cmpwi r7, 0
/* 8036619C 40 82 00 28 */ bne lbl_803661C4
/* 803661A0 38 64 FF FF */ addi r3, r4, -1
/* 803661A4 38 9F FF FF */ addi r4, r31, -1
/* 803661A8 38 A5 00 01 */ addi r5, r5, 1
/* 803661AC 48 00 00 0C */ b lbl_803661B8
lbl_803661B0:
/* 803661B0 8C 03 00 01 */ lbzu r0, 1(r3)
/* 803661B4 9C 04 00 01 */ stbu r0, 1(r4)
lbl_803661B8:
/* 803661B8 34 A5 FF FF */ addic. r5, r5, -1
/* 803661BC 40 82 FF F4 */ bne lbl_803661B0
/* 803661C0 48 00 00 24 */ b lbl_803661E4
lbl_803661C4:
/* 803661C4 7C 64 2A 14 */ add r3, r4, r5
/* 803661C8 7C 9F 2A 14 */ add r4, r31, r5
/* 803661CC 38 A5 00 01 */ addi r5, r5, 1
/* 803661D0 48 00 00 0C */ b lbl_803661DC
lbl_803661D4:
/* 803661D4 8C 03 FF FF */ lbzu r0, -1(r3)
/* 803661D8 9C 04 FF FF */ stbu r0, -1(r4)
lbl_803661DC:
/* 803661DC 34 A5 FF FF */ addic. r5, r5, -1
/* 803661E0 40 82 FF F4 */ bne lbl_803661D4
lbl_803661E4:
/* 803661E4 7F E3 FB 78 */ mr r3, r31
lbl_803661E8:
/* 803661E8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 803661EC 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 803661F0 7C 08 03 A6 */ mtlr r0
/* 803661F4 38 21 00 10 */ addi r1, r1, 0x10
/* 803661F8 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/misc_io/__stdio_atexit.s
-5
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@@ -1,5 +0,0 @@
lbl_803664CC:
/* 803664CC 3C 60 80 36 */ lis r3, __close_all@ha /* 0x8036307C@ha */
/* 803664D0 38 03 30 7C */ addi r0, r3, __close_all@l /* 0x8036307C@l */
/* 803664D4 90 0D 94 18 */ stw r0, __stdio_exit(r13)
/* 803664D8 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/string/strcat.s
-14
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@@ -1,14 +0,0 @@
lbl_80368ABC:
/* 80368ABC 38 84 FF FF */ addi r4, r4, -1
/* 80368AC0 38 A3 FF FF */ addi r5, r3, -1
lbl_80368AC4:
/* 80368AC4 8C 05 00 01 */ lbzu r0, 1(r5)
/* 80368AC8 28 00 00 00 */ cmplwi r0, 0
/* 80368ACC 40 82 FF F8 */ bne lbl_80368AC4
/* 80368AD0 38 A5 FF FF */ addi r5, r5, -1
lbl_80368AD4:
/* 80368AD4 8C 04 00 01 */ lbzu r0, 1(r4)
/* 80368AD8 28 00 00 00 */ cmplwi r0, 0
/* 80368ADC 9C 05 00 01 */ stbu r0, 1(r5)
/* 80368AE0 40 82 FF F4 */ bne lbl_80368AD4
/* 80368AE4 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/string/strchr.s
-15
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@@ -1,15 +0,0 @@
lbl_80368924:
/* 80368924 38 63 FF FF */ addi r3, r3, -1
/* 80368928 54 80 06 3E */ clrlwi r0, r4, 0x18
/* 8036892C 48 00 00 0C */ b lbl_80368938
lbl_80368930:
/* 80368930 7C 04 00 40 */ cmplw r4, r0
/* 80368934 4D 82 00 20 */ beqlr
lbl_80368938:
/* 80368938 8C 83 00 01 */ lbzu r4, 1(r3)
/* 8036893C 28 04 00 00 */ cmplwi r4, 0
/* 80368940 40 82 FF F0 */ bne lbl_80368930
/* 80368944 28 00 00 00 */ cmplwi r0, 0
/* 80368948 4D 82 00 20 */ beqlr
/* 8036894C 38 60 00 00 */ li r3, 0
/* 80368950 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/string/strcmp.s
-88
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@@ -1,88 +0,0 @@
lbl_80368994:
/* 80368994 88 A3 00 00 */ lbz r5, 0(r3)
/* 80368998 88 04 00 00 */ lbz r0, 0(r4)
/* 8036899C 7C 00 28 51 */ subf. r0, r0, r5
/* 803689A0 41 82 00 0C */ beq lbl_803689AC
/* 803689A4 7C 03 03 78 */ mr r3, r0
/* 803689A8 4E 80 00 20 */ blr
lbl_803689AC:
/* 803689AC 54 80 07 BE */ clrlwi r0, r4, 0x1e
/* 803689B0 54 66 07 BE */ clrlwi r6, r3, 0x1e
/* 803689B4 7C 00 30 40 */ cmplw r0, r6
/* 803689B8 40 82 00 CC */ bne lbl_80368A84
/* 803689BC 28 06 00 00 */ cmplwi r6, 0
/* 803689C0 41 82 00 58 */ beq lbl_80368A18
/* 803689C4 28 05 00 00 */ cmplwi r5, 0
/* 803689C8 40 82 00 0C */ bne lbl_803689D4
/* 803689CC 38 60 00 00 */ li r3, 0
/* 803689D0 4E 80 00 20 */ blr
lbl_803689D4:
/* 803689D4 20 06 00 03 */ subfic r0, r6, 3
/* 803689D8 7C 09 03 A6 */ mtctr r0
/* 803689DC 28 00 00 00 */ cmplwi r0, 0
/* 803689E0 41 82 00 30 */ beq lbl_80368A10
lbl_803689E4:
/* 803689E4 8C A3 00 01 */ lbzu r5, 1(r3)
/* 803689E8 8C 04 00 01 */ lbzu r0, 1(r4)
/* 803689EC 7C 00 28 51 */ subf. r0, r0, r5
/* 803689F0 41 82 00 0C */ beq lbl_803689FC
/* 803689F4 7C 03 03 78 */ mr r3, r0
/* 803689F8 4E 80 00 20 */ blr
lbl_803689FC:
/* 803689FC 28 05 00 00 */ cmplwi r5, 0
/* 80368A00 40 82 00 0C */ bne lbl_80368A0C
/* 80368A04 38 60 00 00 */ li r3, 0
/* 80368A08 4E 80 00 20 */ blr
lbl_80368A0C:
/* 80368A0C 42 00 FF D8 */ bdnz lbl_803689E4
lbl_80368A10:
/* 80368A10 38 63 00 01 */ addi r3, r3, 1
/* 80368A14 38 84 00 01 */ addi r4, r4, 1
lbl_80368A18:
/* 80368A18 80 E3 00 00 */ lwz r7, 0(r3)
/* 80368A1C 3C A0 80 81 */ lis r5, 0x8081 /* 0x80808080@ha */
/* 80368A20 38 C5 80 80 */ addi r6, r5, 0x8080 /* 0x80808080@l */
/* 80368A24 81 04 00 00 */ lwz r8, 0(r4)
/* 80368A28 3C A7 FE FF */ addis r5, r7, 0xfeff
/* 80368A2C 38 05 FE FF */ addi r0, r5, -257
/* 80368A30 7C 00 30 39 */ and. r0, r0, r6
/* 80368A34 40 82 00 38 */ bne lbl_80368A6C
/* 80368A38 48 00 00 1C */ b lbl_80368A54
lbl_80368A3C:
/* 80368A3C 84 E3 00 04 */ lwzu r7, 4(r3)
/* 80368A40 85 04 00 04 */ lwzu r8, 4(r4)
/* 80368A44 3C A7 FE FF */ addis r5, r7, 0xfeff
/* 80368A48 38 05 FE FF */ addi r0, r5, -257
/* 80368A4C 7C 00 30 39 */ and. r0, r0, r6
/* 80368A50 40 82 00 1C */ bne lbl_80368A6C
lbl_80368A54:
/* 80368A54 7C 07 40 40 */ cmplw r7, r8
/* 80368A58 41 82 FF E4 */ beq lbl_80368A3C
/* 80368A5C 38 60 FF FF */ li r3, -1
/* 80368A60 4C 81 00 20 */ blelr
/* 80368A64 38 60 00 01 */ li r3, 1
/* 80368A68 4E 80 00 20 */ blr
lbl_80368A6C:
/* 80368A6C 88 A3 00 00 */ lbz r5, 0(r3)
/* 80368A70 88 04 00 00 */ lbz r0, 0(r4)
/* 80368A74 7C 00 28 51 */ subf. r0, r0, r5
/* 80368A78 41 82 00 0C */ beq lbl_80368A84
/* 80368A7C 7C 03 03 78 */ mr r3, r0
/* 80368A80 4E 80 00 20 */ blr
lbl_80368A84:
/* 80368A84 28 05 00 00 */ cmplwi r5, 0
/* 80368A88 40 82 00 0C */ bne lbl_80368A94
/* 80368A8C 38 60 00 00 */ li r3, 0
/* 80368A90 4E 80 00 20 */ blr
lbl_80368A94:
/* 80368A94 8C A3 00 01 */ lbzu r5, 1(r3)
/* 80368A98 8C 04 00 01 */ lbzu r0, 1(r4)
/* 80368A9C 7C 00 28 51 */ subf. r0, r0, r5
/* 80368AA0 41 82 00 0C */ beq lbl_80368AAC
/* 80368AA4 7C 03 03 78 */ mr r3, r0
/* 80368AA8 4E 80 00 20 */ blr
lbl_80368AAC:
/* 80368AAC 28 05 00 00 */ cmplwi r5, 0
/* 80368AB0 40 82 FF E4 */ bne lbl_80368A94
/* 80368AB4 38 60 00 00 */ li r3, 0
/* 80368AB8 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/string/strcpy.s
-53
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@@ -1,53 +0,0 @@
lbl_80368B2C:
/* 80368B2C 54 60 07 BE */ clrlwi r0, r3, 0x1e
/* 80368B30 54 85 07 BE */ clrlwi r5, r4, 0x1e
/* 80368B34 7C 00 28 40 */ cmplw r0, r5
/* 80368B38 7C 67 1B 78 */ mr r7, r3
/* 80368B3C 40 82 00 84 */ bne lbl_80368BC0
/* 80368B40 28 05 00 00 */ cmplwi r5, 0
/* 80368B44 41 82 00 40 */ beq lbl_80368B84
/* 80368B48 88 04 00 00 */ lbz r0, 0(r4)
/* 80368B4C 28 00 00 00 */ cmplwi r0, 0
/* 80368B50 98 07 00 00 */ stb r0, 0(r7)
/* 80368B54 4D 82 00 20 */ beqlr
/* 80368B58 20 05 00 03 */ subfic r0, r5, 3
/* 80368B5C 7C 09 03 A6 */ mtctr r0
/* 80368B60 28 00 00 00 */ cmplwi r0, 0
/* 80368B64 41 82 00 18 */ beq lbl_80368B7C
lbl_80368B68:
/* 80368B68 8C 04 00 01 */ lbzu r0, 1(r4)
/* 80368B6C 28 00 00 00 */ cmplwi r0, 0
/* 80368B70 9C 07 00 01 */ stbu r0, 1(r7)
/* 80368B74 4D 82 00 20 */ beqlr
/* 80368B78 42 00 FF F0 */ bdnz lbl_80368B68
lbl_80368B7C:
/* 80368B7C 38 E7 00 01 */ addi r7, r7, 1
/* 80368B80 38 84 00 01 */ addi r4, r4, 1
lbl_80368B84:
/* 80368B84 81 04 00 00 */ lwz r8, 0(r4)
/* 80368B88 3C A0 80 81 */ lis r5, 0x8081 /* 0x80808080@ha */
/* 80368B8C 38 C5 80 80 */ addi r6, r5, 0x8080 /* 0x80808080@l */
/* 80368B90 3C A8 FE FF */ addis r5, r8, 0xfeff
/* 80368B94 38 05 FE FF */ addi r0, r5, -257
/* 80368B98 7C 00 30 39 */ and. r0, r0, r6
/* 80368B9C 40 82 00 24 */ bne lbl_80368BC0
/* 80368BA0 38 E7 FF FC */ addi r7, r7, -4
lbl_80368BA4:
/* 80368BA4 95 07 00 04 */ stwu r8, 4(r7)
/* 80368BA8 85 04 00 04 */ lwzu r8, 4(r4)
/* 80368BAC 3C A8 FE FF */ addis r5, r8, 0xfeff
/* 80368BB0 38 05 FE FF */ addi r0, r5, -257
/* 80368BB4 7C 00 30 39 */ and. r0, r0, r6
/* 80368BB8 41 82 FF EC */ beq lbl_80368BA4
/* 80368BBC 38 E7 00 04 */ addi r7, r7, 4
lbl_80368BC0:
/* 80368BC0 88 04 00 00 */ lbz r0, 0(r4)
/* 80368BC4 28 00 00 00 */ cmplwi r0, 0
/* 80368BC8 98 07 00 00 */ stb r0, 0(r7)
/* 80368BCC 4D 82 00 20 */ beqlr
lbl_80368BD0:
/* 80368BD0 8C 04 00 01 */ lbzu r0, 1(r4)
/* 80368BD4 28 00 00 00 */ cmplwi r0, 0
/* 80368BD8 9C 07 00 01 */ stbu r0, 1(r7)
/* 80368BDC 40 82 FF F4 */ bne lbl_80368BD0
/* 80368BE0 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/string/strlen.s
-9
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@@ -1,9 +0,0 @@
lbl_80368BE4:
/* 80368BE4 38 83 FF FF */ addi r4, r3, -1
/* 80368BE8 38 60 FF FF */ li r3, -1
lbl_80368BEC:
/* 80368BEC 8C 04 00 01 */ lbzu r0, 1(r4)
/* 80368BF0 38 63 00 01 */ addi r3, r3, 1
/* 80368BF4 28 00 00 00 */ cmplwi r0, 0
/* 80368BF8 40 82 FF F4 */ bne lbl_80368BEC
/* 80368BFC 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/string/strncmp.s
-21
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@@ -1,21 +0,0 @@
lbl_80368954:
/* 80368954 38 63 FF FF */ addi r3, r3, -1
/* 80368958 38 84 FF FF */ addi r4, r4, -1
/* 8036895C 38 C5 00 01 */ addi r6, r5, 1
/* 80368960 48 00 00 24 */ b lbl_80368984
lbl_80368964:
/* 80368964 8C 03 00 01 */ lbzu r0, 1(r3)
/* 80368968 8C A4 00 01 */ lbzu r5, 1(r4)
/* 8036896C 7C 00 28 40 */ cmplw r0, r5
/* 80368970 41 82 00 0C */ beq lbl_8036897C
/* 80368974 7C 65 00 50 */ subf r3, r5, r0
/* 80368978 4E 80 00 20 */ blr
lbl_8036897C:
/* 8036897C 28 00 00 00 */ cmplwi r0, 0
/* 80368980 41 82 00 0C */ beq lbl_8036898C
lbl_80368984:
/* 80368984 34 C6 FF FF */ addic. r6, r6, -1
/* 80368988 40 82 FF DC */ bne lbl_80368964
lbl_8036898C:
/* 8036898C 38 60 00 00 */ li r3, 0
/* 80368990 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/string/strncpy.s
-22
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@@ -1,22 +0,0 @@
lbl_80368AE8:
/* 80368AE8 38 84 FF FF */ addi r4, r4, -1
/* 80368AEC 38 C3 FF FF */ addi r6, r3, -1
/* 80368AF0 38 A5 00 01 */ addi r5, r5, 1
/* 80368AF4 48 00 00 2C */ b lbl_80368B20
lbl_80368AF8:
/* 80368AF8 8C 04 00 01 */ lbzu r0, 1(r4)
/* 80368AFC 28 00 00 00 */ cmplwi r0, 0
/* 80368B00 9C 06 00 01 */ stbu r0, 1(r6)
/* 80368B04 40 82 00 1C */ bne lbl_80368B20
/* 80368B08 38 00 00 00 */ li r0, 0
/* 80368B0C 48 00 00 08 */ b lbl_80368B14
lbl_80368B10:
/* 80368B10 9C 06 00 01 */ stbu r0, 1(r6)
lbl_80368B14:
/* 80368B14 34 A5 FF FF */ addic. r5, r5, -1
/* 80368B18 40 82 FF F8 */ bne lbl_80368B10
/* 80368B1C 4E 80 00 20 */ blr
lbl_80368B20:
/* 80368B20 34 A5 FF FF */ addic. r5, r5, -1
/* 80368B24 40 82 FF D4 */ bne lbl_80368AF8
/* 80368B28 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/string/strrchr.s
-22
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@@ -1,22 +0,0 @@
lbl_803688DC:
/* 803688DC 38 A3 FF FF */ addi r5, r3, -1
/* 803688E0 54 80 06 3E */ clrlwi r0, r4, 0x18
/* 803688E4 38 60 00 00 */ li r3, 0
/* 803688E8 48 00 00 10 */ b lbl_803688F8
lbl_803688EC:
/* 803688EC 7C 04 00 40 */ cmplw r4, r0
/* 803688F0 40 82 00 08 */ bne lbl_803688F8
/* 803688F4 7C A3 2B 78 */ mr r3, r5
lbl_803688F8:
/* 803688F8 8C 85 00 01 */ lbzu r4, 1(r5)
/* 803688FC 28 04 00 00 */ cmplwi r4, 0
/* 80368900 40 82 FF EC */ bne lbl_803688EC
/* 80368904 28 03 00 00 */ cmplwi r3, 0
/* 80368908 4C 82 00 20 */ bnelr
/* 8036890C 28 00 00 00 */ cmplwi r0, 0
/* 80368910 41 82 00 0C */ beq lbl_8036891C
/* 80368914 38 60 00 00 */ li r3, 0
/* 80368918 4E 80 00 20 */ blr
lbl_8036891C:
/* 8036891C 7C A3 2B 78 */ mr r3, r5
/* 80368920 4E 80 00 20 */ blr
asm/MSL_C/MSL_Common/Src/wchar_io/fwide.s
-43
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@@ -1,43 +0,0 @@
lbl_80369114:
/* 80369114 28 03 00 00 */ cmplwi r3, 0
/* 80369118 41 82 00 10 */ beq lbl_80369128
/* 8036911C A0 03 00 04 */ lhz r0, 4(r3)
/* 80369120 54 00 D7 7F */ rlwinm. r0, r0, 0x1a, 0x1d, 0x1f
/* 80369124 40 82 00 0C */ bne lbl_80369130
lbl_80369128:
/* 80369128 38 60 00 00 */ li r3, 0
/* 8036912C 4E 80 00 20 */ blr
lbl_80369130:
/* 80369130 88 A3 00 05 */ lbz r5, 5(r3)
/* 80369134 54 A0 E7 BE */ rlwinm r0, r5, 0x1c, 0x1e, 0x1f
/* 80369138 2C 00 00 01 */ cmpwi r0, 1
/* 8036913C 41 82 00 58 */ beq lbl_80369194
/* 80369140 40 80 00 10 */ bge lbl_80369150
/* 80369144 2C 00 00 00 */ cmpwi r0, 0
/* 80369148 40 80 00 14 */ bge lbl_8036915C
/* 8036914C 4E 80 00 20 */ blr
lbl_80369150:
/* 80369150 2C 00 00 03 */ cmpwi r0, 3
/* 80369154 4C 80 00 20 */ bgelr
/* 80369158 48 00 00 34 */ b lbl_8036918C
lbl_8036915C:
/* 8036915C 2C 04 00 00 */ cmpwi r4, 0
/* 80369160 40 81 00 14 */ ble lbl_80369174
/* 80369164 38 00 00 02 */ li r0, 2
/* 80369168 50 05 26 B6 */ rlwimi r5, r0, 4, 0x1a, 0x1b
/* 8036916C 98 A3 00 05 */ stb r5, 5(r3)
/* 80369170 48 00 00 14 */ b lbl_80369184
lbl_80369174:
/* 80369174 40 80 00 10 */ bge lbl_80369184
/* 80369178 38 00 00 01 */ li r0, 1
/* 8036917C 50 05 26 B6 */ rlwimi r5, r0, 4, 0x1a, 0x1b
/* 80369180 98 A3 00 05 */ stb r5, 5(r3)
lbl_80369184:
/* 80369184 7C 83 23 78 */ mr r3, r4
/* 80369188 4E 80 00 20 */ blr
lbl_8036918C:
/* 8036918C 38 60 00 01 */ li r3, 1
/* 80369190 4E 80 00 20 */ blr
lbl_80369194:
/* 80369194 38 60 FF FF */ li r3, -1
/* 80369198 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/e_fmod/__ieee754_fmod.s
-250
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@@ -1,250 +0,0 @@
lbl_80369B9C:
/* 80369B9C 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 80369BA0 D8 41 00 10 */ stfd f2, 0x10(r1)
/* 80369BA4 D8 21 00 08 */ stfd f1, 8(r1)
/* 80369BA8 81 41 00 10 */ lwz r10, 0x10(r1)
/* 80369BAC 80 C1 00 08 */ lwz r6, 8(r1)
/* 80369BB0 80 A1 00 14 */ lwz r5, 0x14(r1)
/* 80369BB4 55 48 00 7E */ clrlwi r8, r10, 1
/* 80369BB8 54 C0 00 00 */ rlwinm r0, r6, 0, 0, 0
/* 80369BBC 80 81 00 0C */ lwz r4, 0xc(r1)
/* 80369BC0 7D 03 2B 79 */ or. r3, r8, r5
/* 80369BC4 7C C7 02 78 */ xor r7, r6, r0
/* 80369BC8 41 82 00 28 */ beq lbl_80369BF0
/* 80369BCC 3C C0 7F F0 */ lis r6, 0x7ff0
/* 80369BD0 7C 07 30 00 */ cmpw r7, r6
/* 80369BD4 40 80 00 1C */ bge lbl_80369BF0
/* 80369BD8 7C 65 00 D0 */ neg r3, r5
/* 80369BDC 7C A3 1B 78 */ or r3, r5, r3
/* 80369BE0 54 63 0F FE */ srwi r3, r3, 0x1f
/* 80369BE4 7D 03 1B 78 */ or r3, r8, r3
/* 80369BE8 7C 03 30 40 */ cmplw r3, r6
/* 80369BEC 40 81 00 18 */ ble lbl_80369C04
lbl_80369BF0:
/* 80369BF0 C8 21 00 08 */ lfd f1, 8(r1)
/* 80369BF4 C8 01 00 10 */ lfd f0, 0x10(r1)
/* 80369BF8 FC 01 00 32 */ fmul f0, f1, f0
/* 80369BFC FC 20 00 24 */ fdiv f1, f0, f0
/* 80369C00 48 00 02 D0 */ b lbl_80369ED0
lbl_80369C04:
/* 80369C04 7C 07 40 00 */ cmpw r7, r8
/* 80369C08 41 81 00 30 */ bgt lbl_80369C38
/* 80369C0C 41 80 00 0C */ blt lbl_80369C18
/* 80369C10 7C 04 28 40 */ cmplw r4, r5
/* 80369C14 40 80 00 0C */ bge lbl_80369C20
lbl_80369C18:
/* 80369C18 C8 21 00 08 */ lfd f1, 8(r1)
/* 80369C1C 48 00 02 B4 */ b lbl_80369ED0
lbl_80369C20:
/* 80369C20 40 82 00 18 */ bne lbl_80369C38
/* 80369C24 3C 60 80 3A */ lis r3, Zero@ha /* 0x803A2370@ha */
/* 80369C28 54 00 27 38 */ rlwinm r0, r0, 4, 0x1c, 0x1c
/* 80369C2C 38 63 23 70 */ addi r3, r3, Zero@l /* 0x803A2370@l */
/* 80369C30 7C 23 04 AE */ lfdx f1, r3, r0
/* 80369C34 48 00 02 9C */ b lbl_80369ED0
lbl_80369C38:
/* 80369C38 3C 60 00 10 */ lis r3, 0x10
/* 80369C3C 7C 07 18 00 */ cmpw r7, r3
/* 80369C40 40 80 00 4C */ bge lbl_80369C8C
/* 80369C44 2C 07 00 00 */ cmpwi r7, 0
/* 80369C48 40 82 00 24 */ bne lbl_80369C6C
/* 80369C4C 7C 83 23 78 */ mr r3, r4
/* 80369C50 39 60 FB ED */ li r11, -1043
/* 80369C54 48 00 00 0C */ b lbl_80369C60
lbl_80369C58:
/* 80369C58 54 63 08 3C */ slwi r3, r3, 1
/* 80369C5C 39 6B FF FF */ addi r11, r11, -1
lbl_80369C60:
/* 80369C60 2C 03 00 00 */ cmpwi r3, 0
/* 80369C64 41 81 FF F4 */ bgt lbl_80369C58
/* 80369C68 48 00 00 2C */ b lbl_80369C94
lbl_80369C6C:
/* 80369C6C 54 E3 58 28 */ slwi r3, r7, 0xb
/* 80369C70 39 60 FC 02 */ li r11, -1022
/* 80369C74 48 00 00 0C */ b lbl_80369C80
lbl_80369C78:
/* 80369C78 54 63 08 3C */ slwi r3, r3, 1
/* 80369C7C 39 6B FF FF */ addi r11, r11, -1
lbl_80369C80:
/* 80369C80 2C 03 00 00 */ cmpwi r3, 0
/* 80369C84 41 81 FF F4 */ bgt lbl_80369C78
/* 80369C88 48 00 00 0C */ b lbl_80369C94
lbl_80369C8C:
/* 80369C8C 7C E3 A6 70 */ srawi r3, r7, 0x14
/* 80369C90 39 63 FC 01 */ addi r11, r3, -1023
lbl_80369C94:
/* 80369C94 3C 60 00 10 */ lis r3, 0x10
/* 80369C98 7C 08 18 00 */ cmpw r8, r3
/* 80369C9C 40 80 00 4C */ bge lbl_80369CE8
/* 80369CA0 2C 08 00 00 */ cmpwi r8, 0
/* 80369CA4 40 82 00 24 */ bne lbl_80369CC8
/* 80369CA8 7C A6 2B 78 */ mr r6, r5
/* 80369CAC 38 60 FB ED */ li r3, -1043
/* 80369CB0 48 00 00 0C */ b lbl_80369CBC
lbl_80369CB4:
/* 80369CB4 54 C6 08 3C */ slwi r6, r6, 1
/* 80369CB8 38 63 FF FF */ addi r3, r3, -1
lbl_80369CBC:
/* 80369CBC 2C 06 00 00 */ cmpwi r6, 0
/* 80369CC0 41 81 FF F4 */ bgt lbl_80369CB4
/* 80369CC4 48 00 00 2C */ b lbl_80369CF0
lbl_80369CC8:
/* 80369CC8 55 06 58 28 */ slwi r6, r8, 0xb
/* 80369CCC 38 60 FC 02 */ li r3, -1022
/* 80369CD0 48 00 00 0C */ b lbl_80369CDC
lbl_80369CD4:
/* 80369CD4 54 C6 08 3C */ slwi r6, r6, 1
/* 80369CD8 38 63 FF FF */ addi r3, r3, -1
lbl_80369CDC:
/* 80369CDC 2C 06 00 00 */ cmpwi r6, 0
/* 80369CE0 41 81 FF F4 */ bgt lbl_80369CD4
/* 80369CE4 48 00 00 0C */ b lbl_80369CF0
lbl_80369CE8:
/* 80369CE8 7D 03 A6 70 */ srawi r3, r8, 0x14
/* 80369CEC 38 63 FC 01 */ addi r3, r3, -1023
lbl_80369CF0:
/* 80369CF0 2C 0B FC 02 */ cmpwi r11, -1022
/* 80369CF4 41 80 00 10 */ blt lbl_80369D04
/* 80369CF8 54 E6 03 3E */ clrlwi r6, r7, 0xc
/* 80369CFC 64 C9 00 10 */ oris r9, r6, 0x10
/* 80369D00 48 00 00 34 */ b lbl_80369D34
lbl_80369D04:
/* 80369D04 21 2B FC 02 */ subfic r9, r11, -1022
/* 80369D08 2C 09 00 1F */ cmpwi r9, 0x1f
/* 80369D0C 41 81 00 1C */ bgt lbl_80369D28
/* 80369D10 20 C9 00 20 */ subfic r6, r9, 0x20
/* 80369D14 7C E7 48 30 */ slw r7, r7, r9
/* 80369D18 7C 86 34 30 */ srw r6, r4, r6
/* 80369D1C 7C 84 48 30 */ slw r4, r4, r9
/* 80369D20 7C E9 33 78 */ or r9, r7, r6
/* 80369D24 48 00 00 10 */ b lbl_80369D34
lbl_80369D28:
/* 80369D28 38 C9 FF E0 */ addi r6, r9, -32
/* 80369D2C 7C 89 30 30 */ slw r9, r4, r6
/* 80369D30 38 80 00 00 */ li r4, 0
lbl_80369D34:
/* 80369D34 2C 03 FC 02 */ cmpwi r3, -1022
/* 80369D38 41 80 00 10 */ blt lbl_80369D48
/* 80369D3C 55 46 03 3E */ clrlwi r6, r10, 0xc
/* 80369D40 64 C7 00 10 */ oris r7, r6, 0x10
/* 80369D44 48 00 00 34 */ b lbl_80369D78
lbl_80369D48:
/* 80369D48 21 43 FC 02 */ subfic r10, r3, -1022
/* 80369D4C 2C 0A 00 1F */ cmpwi r10, 0x1f
/* 80369D50 41 81 00 1C */ bgt lbl_80369D6C
/* 80369D54 20 CA 00 20 */ subfic r6, r10, 0x20
/* 80369D58 7D 07 50 30 */ slw r7, r8, r10
/* 80369D5C 7C A6 34 30 */ srw r6, r5, r6
/* 80369D60 7C A5 50 30 */ slw r5, r5, r10
/* 80369D64 7C E7 33 78 */ or r7, r7, r6
/* 80369D68 48 00 00 10 */ b lbl_80369D78
lbl_80369D6C:
/* 80369D6C 38 CA FF E0 */ addi r6, r10, -32
/* 80369D70 7C A7 30 30 */ slw r7, r5, r6
/* 80369D74 38 A0 00 00 */ li r5, 0
lbl_80369D78:
/* 80369D78 7C C3 58 51 */ subf. r6, r3, r11
/* 80369D7C 7C C9 03 A6 */ mtctr r6
/* 80369D80 41 82 00 64 */ beq lbl_80369DE4
lbl_80369D84:
/* 80369D84 7C 04 28 40 */ cmplw r4, r5
/* 80369D88 7D 07 48 50 */ subf r8, r7, r9
/* 80369D8C 7D 45 20 50 */ subf r10, r5, r4
/* 80369D90 40 80 00 08 */ bge lbl_80369D98
/* 80369D94 39 08 FF FF */ addi r8, r8, -1
lbl_80369D98:
/* 80369D98 2C 08 00 00 */ cmpwi r8, 0
/* 80369D9C 40 80 00 18 */ bge lbl_80369DB4
/* 80369DA0 54 86 0F FE */ srwi r6, r4, 0x1f
/* 80369DA4 7C 84 22 14 */ add r4, r4, r4
/* 80369DA8 7C C9 32 14 */ add r6, r9, r6
/* 80369DAC 7D 29 32 14 */ add r9, r9, r6
/* 80369DB0 48 00 00 30 */ b lbl_80369DE0
lbl_80369DB4:
/* 80369DB4 7D 04 53 79 */ or. r4, r8, r10
/* 80369DB8 40 82 00 18 */ bne lbl_80369DD0
/* 80369DBC 3C 60 80 3A */ lis r3, Zero@ha /* 0x803A2370@ha */
/* 80369DC0 54 00 27 38 */ rlwinm r0, r0, 4, 0x1c, 0x1c
/* 80369DC4 38 63 23 70 */ addi r3, r3, Zero@l /* 0x803A2370@l */
/* 80369DC8 7C 23 04 AE */ lfdx f1, r3, r0
/* 80369DCC 48 00 01 04 */ b lbl_80369ED0
lbl_80369DD0:
/* 80369DD0 55 46 0F FE */ srwi r6, r10, 0x1f
/* 80369DD4 7C 8A 52 14 */ add r4, r10, r10
/* 80369DD8 7D 28 32 14 */ add r9, r8, r6
/* 80369DDC 7D 28 4A 14 */ add r9, r8, r9
lbl_80369DE0:
/* 80369DE0 42 00 FF A4 */ bdnz lbl_80369D84
lbl_80369DE4:
/* 80369DE4 7C 04 28 40 */ cmplw r4, r5
/* 80369DE8 7C C7 48 50 */ subf r6, r7, r9
/* 80369DEC 7C A5 20 50 */ subf r5, r5, r4
/* 80369DF0 40 80 00 08 */ bge lbl_80369DF8
/* 80369DF4 38 C6 FF FF */ addi r6, r6, -1
lbl_80369DF8:
/* 80369DF8 2C 06 00 00 */ cmpwi r6, 0
/* 80369DFC 41 80 00 0C */ blt lbl_80369E08
/* 80369E00 7C C9 33 78 */ mr r9, r6
/* 80369E04 7C A4 2B 78 */ mr r4, r5
lbl_80369E08:
/* 80369E08 7D 25 23 79 */ or. r5, r9, r4
/* 80369E0C 40 82 00 18 */ bne lbl_80369E24
/* 80369E10 3C 60 80 3A */ lis r3, Zero@ha /* 0x803A2370@ha */
/* 80369E14 54 00 27 38 */ rlwinm r0, r0, 4, 0x1c, 0x1c
/* 80369E18 38 63 23 70 */ addi r3, r3, Zero@l /* 0x803A2370@l */
/* 80369E1C 7C 23 04 AE */ lfdx f1, r3, r0
/* 80369E20 48 00 00 B0 */ b lbl_80369ED0
lbl_80369E24:
/* 80369E24 3C A0 00 10 */ lis r5, 0x10
/* 80369E28 48 00 00 18 */ b lbl_80369E40
lbl_80369E2C:
/* 80369E2C 54 86 0F FE */ srwi r6, r4, 0x1f
/* 80369E30 7C 84 22 14 */ add r4, r4, r4
/* 80369E34 7C C9 32 14 */ add r6, r9, r6
/* 80369E38 38 63 FF FF */ addi r3, r3, -1
/* 80369E3C 7D 29 32 14 */ add r9, r9, r6
lbl_80369E40:
/* 80369E40 7C 09 28 00 */ cmpw r9, r5
/* 80369E44 41 80 FF E8 */ blt lbl_80369E2C
/* 80369E48 2C 03 FC 02 */ cmpwi r3, -1022
/* 80369E4C 41 80 00 24 */ blt lbl_80369E70
/* 80369E50 38 63 03 FF */ addi r3, r3, 0x3ff
/* 80369E54 3C A9 FF F0 */ addis r5, r9, 0xfff0
/* 80369E58 54 63 A0 16 */ slwi r3, r3, 0x14
/* 80369E5C 90 81 00 0C */ stw r4, 0xc(r1)
/* 80369E60 7C A3 1B 78 */ or r3, r5, r3
/* 80369E64 7C 60 03 78 */ or r0, r3, r0
/* 80369E68 90 01 00 08 */ stw r0, 8(r1)
/* 80369E6C 48 00 00 60 */ b lbl_80369ECC
lbl_80369E70:
/* 80369E70 20 C3 FC 02 */ subfic r6, r3, -1022
/* 80369E74 2C 06 00 14 */ cmpwi r6, 0x14
/* 80369E78 41 81 00 1C */ bgt lbl_80369E94
/* 80369E7C 20 66 00 20 */ subfic r3, r6, 0x20
/* 80369E80 7C 84 34 30 */ srw r4, r4, r6
/* 80369E84 7D 23 18 30 */ slw r3, r9, r3
/* 80369E88 7D 29 36 30 */ sraw r9, r9, r6
/* 80369E8C 7C 83 1B 78 */ or r3, r4, r3
/* 80369E90 48 00 00 30 */ b lbl_80369EC0
lbl_80369E94:
/* 80369E94 2C 06 00 1F */ cmpwi r6, 0x1f
/* 80369E98 41 81 00 1C */ bgt lbl_80369EB4
/* 80369E9C 20 A6 00 20 */ subfic r5, r6, 0x20
/* 80369EA0 7C 83 34 30 */ srw r3, r4, r6
/* 80369EA4 7D 24 28 30 */ slw r4, r9, r5
/* 80369EA8 7C 09 03 78 */ mr r9, r0
/* 80369EAC 7C 83 1B 78 */ or r3, r4, r3
/* 80369EB0 48 00 00 10 */ b lbl_80369EC0
lbl_80369EB4:
/* 80369EB4 38 66 FF E0 */ addi r3, r6, -32
/* 80369EB8 7D 23 1E 30 */ sraw r3, r9, r3
/* 80369EBC 7C 09 03 78 */ mr r9, r0
lbl_80369EC0:
/* 80369EC0 7D 20 03 78 */ or r0, r9, r0
/* 80369EC4 90 61 00 0C */ stw r3, 0xc(r1)
/* 80369EC8 90 01 00 08 */ stw r0, 8(r1)
lbl_80369ECC:
/* 80369ECC C8 21 00 08 */ lfd f1, 8(r1)
lbl_80369ED0:
/* 80369ED0 38 21 00 20 */ addi r1, r1, 0x20
/* 80369ED4 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/s_ceil/ceil.s
-94
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@@ -1,94 +0,0 @@
lbl_8036BEBC:
/* 8036BEBC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036BEC0 D8 21 00 08 */ stfd f1, 8(r1)
/* 8036BEC4 80 A1 00 08 */ lwz r5, 8(r1)
/* 8036BEC8 80 C1 00 0C */ lwz r6, 0xc(r1)
/* 8036BECC 54 A3 65 7E */ rlwinm r3, r5, 0xc, 0x15, 0x1f
/* 8036BED0 38 E3 FC 01 */ addi r7, r3, -1023
/* 8036BED4 2C 07 00 14 */ cmpwi r7, 0x14
/* 8036BED8 40 80 00 94 */ bge lbl_8036BF6C
/* 8036BEDC 2C 07 00 00 */ cmpwi r7, 0
/* 8036BEE0 40 80 00 40 */ bge lbl_8036BF20
/* 8036BEE4 C8 42 D0 E0 */ lfd f2, lit_124(r2)
/* 8036BEE8 C8 02 D0 E8 */ lfd f0, lit_125(r2)
/* 8036BEEC FC 22 08 2A */ fadd f1, f2, f1
/* 8036BEF0 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8036BEF4 40 81 00 F8 */ ble lbl_8036BFEC
/* 8036BEF8 2C 05 00 00 */ cmpwi r5, 0
/* 8036BEFC 40 80 00 10 */ bge lbl_8036BF0C
/* 8036BF00 3C A0 80 00 */ lis r5, 0x8000
/* 8036BF04 38 C0 00 00 */ li r6, 0
/* 8036BF08 48 00 00 E4 */ b lbl_8036BFEC
lbl_8036BF0C:
/* 8036BF0C 7C A0 33 79 */ or. r0, r5, r6
/* 8036BF10 41 82 00 DC */ beq lbl_8036BFEC
/* 8036BF14 3C A0 3F F0 */ lis r5, 0x3ff0
/* 8036BF18 38 C0 00 00 */ li r6, 0
/* 8036BF1C 48 00 00 D0 */ b lbl_8036BFEC
lbl_8036BF20:
/* 8036BF20 3C 60 00 10 */ lis r3, 0x0010 /* 0x000FFFFF@ha */
/* 8036BF24 38 03 FF FF */ addi r0, r3, 0xFFFF /* 0x000FFFFF@l */
/* 8036BF28 7C 04 3E 30 */ sraw r4, r0, r7
/* 8036BF2C 7C A0 20 38 */ and r0, r5, r4
/* 8036BF30 7C C0 03 79 */ or. r0, r6, r0
/* 8036BF34 40 82 00 08 */ bne lbl_8036BF3C
/* 8036BF38 48 00 00 C0 */ b lbl_8036BFF8
lbl_8036BF3C:
/* 8036BF3C C8 42 D0 E0 */ lfd f2, lit_124(r2)
/* 8036BF40 C8 02 D0 E8 */ lfd f0, lit_125(r2)
/* 8036BF44 FC 22 08 2A */ fadd f1, f2, f1
/* 8036BF48 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8036BF4C 40 81 00 A0 */ ble lbl_8036BFEC
/* 8036BF50 2C 05 00 00 */ cmpwi r5, 0
/* 8036BF54 40 81 00 0C */ ble lbl_8036BF60
/* 8036BF58 7C 60 3E 30 */ sraw r0, r3, r7
/* 8036BF5C 7C A5 02 14 */ add r5, r5, r0
lbl_8036BF60:
/* 8036BF60 7C A5 20 78 */ andc r5, r5, r4
/* 8036BF64 38 C0 00 00 */ li r6, 0
/* 8036BF68 48 00 00 84 */ b lbl_8036BFEC
lbl_8036BF6C:
/* 8036BF6C 2C 07 00 33 */ cmpwi r7, 0x33
/* 8036BF70 40 81 00 14 */ ble lbl_8036BF84
/* 8036BF74 2C 07 04 00 */ cmpwi r7, 0x400
/* 8036BF78 40 82 00 80 */ bne lbl_8036BFF8
/* 8036BF7C FC 21 08 2A */ fadd f1, f1, f1
/* 8036BF80 48 00 00 78 */ b lbl_8036BFF8
lbl_8036BF84:
/* 8036BF84 38 07 FF EC */ addi r0, r7, -20
/* 8036BF88 38 60 FF FF */ li r3, -1
/* 8036BF8C 7C 64 04 30 */ srw r4, r3, r0
/* 8036BF90 7C C0 20 39 */ and. r0, r6, r4
/* 8036BF94 40 82 00 08 */ bne lbl_8036BF9C
/* 8036BF98 48 00 00 60 */ b lbl_8036BFF8
lbl_8036BF9C:
/* 8036BF9C C8 42 D0 E0 */ lfd f2, lit_124(r2)
/* 8036BFA0 C8 02 D0 E8 */ lfd f0, lit_125(r2)
/* 8036BFA4 FC 22 08 2A */ fadd f1, f2, f1
/* 8036BFA8 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8036BFAC 40 81 00 40 */ ble lbl_8036BFEC
/* 8036BFB0 2C 05 00 00 */ cmpwi r5, 0
/* 8036BFB4 40 81 00 34 */ ble lbl_8036BFE8
/* 8036BFB8 2C 07 00 14 */ cmpwi r7, 0x14
/* 8036BFBC 40 82 00 0C */ bne lbl_8036BFC8
/* 8036BFC0 38 A5 00 01 */ addi r5, r5, 1
/* 8036BFC4 48 00 00 24 */ b lbl_8036BFE8
lbl_8036BFC8:
/* 8036BFC8 20 07 00 34 */ subfic r0, r7, 0x34
/* 8036BFCC 38 60 00 01 */ li r3, 1
/* 8036BFD0 7C 60 00 30 */ slw r0, r3, r0
/* 8036BFD4 7C 06 02 14 */ add r0, r6, r0
/* 8036BFD8 7C 00 30 40 */ cmplw r0, r6
/* 8036BFDC 40 80 00 08 */ bge lbl_8036BFE4
/* 8036BFE0 38 A5 00 01 */ addi r5, r5, 1
lbl_8036BFE4:
/* 8036BFE4 7C 06 03 78 */ mr r6, r0
lbl_8036BFE8:
/* 8036BFE8 7C C6 20 78 */ andc r6, r6, r4
lbl_8036BFEC:
/* 8036BFEC 90 A1 00 08 */ stw r5, 8(r1)
/* 8036BFF0 90 C1 00 0C */ stw r6, 0xc(r1)
/* 8036BFF4 C8 21 00 08 */ lfd f1, 8(r1)
lbl_8036BFF8:
/* 8036BFF8 38 21 00 10 */ addi r1, r1, 0x10
/* 8036BFFC 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/s_copysign/copysign.s
-11
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@@ -1,11 +0,0 @@
lbl_8036C000:
/* 8036C000 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8036C004 D8 21 00 08 */ stfd f1, 8(r1)
/* 8036C008 D8 41 00 10 */ stfd f2, 0x10(r1)
/* 8036C00C 80 61 00 08 */ lwz r3, 8(r1)
/* 8036C010 80 01 00 10 */ lwz r0, 0x10(r1)
/* 8036C014 50 60 00 7E */ rlwimi r0, r3, 0, 1, 0x1f
/* 8036C018 90 01 00 08 */ stw r0, 8(r1)
/* 8036C01C C8 21 00 08 */ lfd f1, 8(r1)
/* 8036C020 38 21 00 20 */ addi r1, r1, 0x20
/* 8036C024 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/s_cos/cos.s
-62
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@@ -1,62 +0,0 @@
lbl_8036C028:
/* 8036C028 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8036C02C 7C 08 02 A6 */ mflr r0
/* 8036C030 3C 60 3F E9 */ lis r3, 0x3FE9 /* 0x3FE921FB@ha */
/* 8036C034 D8 21 00 08 */ stfd f1, 8(r1)
/* 8036C038 90 01 00 24 */ stw r0, 0x24(r1)
/* 8036C03C 38 03 21 FB */ addi r0, r3, 0x21FB /* 0x3FE921FB@l */
/* 8036C040 80 61 00 08 */ lwz r3, 8(r1)
/* 8036C044 54 63 00 7E */ clrlwi r3, r3, 1
/* 8036C048 7C 03 00 00 */ cmpw r3, r0
/* 8036C04C 41 81 00 10 */ bgt lbl_8036C05C
/* 8036C050 C8 42 D0 F0 */ lfd f2, lit_67(r2)
/* 8036C054 4B FF EA 55 */ bl __kernel_cos
/* 8036C058 48 00 00 94 */ b lbl_8036C0EC
lbl_8036C05C:
/* 8036C05C 3C 00 7F F0 */ lis r0, 0x7ff0
/* 8036C060 7C 03 00 00 */ cmpw r3, r0
/* 8036C064 41 80 00 0C */ blt lbl_8036C070
/* 8036C068 FC 21 08 28 */ fsub f1, f1, f1
/* 8036C06C 48 00 00 80 */ b lbl_8036C0EC
lbl_8036C070:
/* 8036C070 38 61 00 10 */ addi r3, r1, 0x10
/* 8036C074 4B FF E6 95 */ bl __ieee754_rem_pio2
/* 8036C078 54 60 07 BE */ clrlwi r0, r3, 0x1e
/* 8036C07C 2C 00 00 01 */ cmpwi r0, 1
/* 8036C080 41 82 00 30 */ beq lbl_8036C0B0
/* 8036C084 40 80 00 10 */ bge lbl_8036C094
/* 8036C088 2C 00 00 00 */ cmpwi r0, 0
/* 8036C08C 40 80 00 14 */ bge lbl_8036C0A0
/* 8036C090 48 00 00 4C */ b lbl_8036C0DC
lbl_8036C094:
/* 8036C094 2C 00 00 03 */ cmpwi r0, 3
/* 8036C098 40 80 00 44 */ bge lbl_8036C0DC
/* 8036C09C 48 00 00 2C */ b lbl_8036C0C8
lbl_8036C0A0:
/* 8036C0A0 C8 21 00 10 */ lfd f1, 0x10(r1)
/* 8036C0A4 C8 41 00 18 */ lfd f2, 0x18(r1)
/* 8036C0A8 4B FF EA 01 */ bl __kernel_cos
/* 8036C0AC 48 00 00 40 */ b lbl_8036C0EC
lbl_8036C0B0:
/* 8036C0B0 C8 21 00 10 */ lfd f1, 0x10(r1)
/* 8036C0B4 38 60 00 01 */ li r3, 1
/* 8036C0B8 C8 41 00 18 */ lfd f2, 0x18(r1)
/* 8036C0BC 4B FF F9 35 */ bl __kernel_sin
/* 8036C0C0 FC 20 08 50 */ fneg f1, f1
/* 8036C0C4 48 00 00 28 */ b lbl_8036C0EC
lbl_8036C0C8:
/* 8036C0C8 C8 21 00 10 */ lfd f1, 0x10(r1)
/* 8036C0CC C8 41 00 18 */ lfd f2, 0x18(r1)
/* 8036C0D0 4B FF E9 D9 */ bl __kernel_cos
/* 8036C0D4 FC 20 08 50 */ fneg f1, f1
/* 8036C0D8 48 00 00 14 */ b lbl_8036C0EC
lbl_8036C0DC:
/* 8036C0DC C8 21 00 10 */ lfd f1, 0x10(r1)
/* 8036C0E0 38 60 00 01 */ li r3, 1
/* 8036C0E4 C8 41 00 18 */ lfd f2, 0x18(r1)
/* 8036C0E8 4B FF F9 09 */ bl __kernel_sin
lbl_8036C0EC:
/* 8036C0EC 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8036C0F0 7C 08 03 A6 */ mtlr r0
/* 8036C0F4 38 21 00 20 */ addi r1, r1, 0x20
/* 8036C0F8 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/s_floor/floor.s
-95
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@@ -1,95 +0,0 @@
lbl_8036C0FC:
/* 8036C0FC 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036C100 D8 21 00 08 */ stfd f1, 8(r1)
/* 8036C104 80 A1 00 08 */ lwz r5, 8(r1)
/* 8036C108 80 C1 00 0C */ lwz r6, 0xc(r1)
/* 8036C10C 54 A3 65 7E */ rlwinm r3, r5, 0xc, 0x15, 0x1f
/* 8036C110 38 E3 FC 01 */ addi r7, r3, -1023
/* 8036C114 2C 07 00 14 */ cmpwi r7, 0x14
/* 8036C118 40 80 00 98 */ bge lbl_8036C1B0
/* 8036C11C 2C 07 00 00 */ cmpwi r7, 0
/* 8036C120 40 80 00 44 */ bge lbl_8036C164
/* 8036C124 C8 42 D0 F8 */ lfd f2, lit_124(r2)
/* 8036C128 C8 02 D1 00 */ lfd f0, lit_125(r2)
/* 8036C12C FC 22 08 2A */ fadd f1, f2, f1
/* 8036C130 FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8036C134 40 81 00 FC */ ble lbl_8036C230
/* 8036C138 2C 05 00 00 */ cmpwi r5, 0
/* 8036C13C 41 80 00 10 */ blt lbl_8036C14C
/* 8036C140 38 C0 00 00 */ li r6, 0
/* 8036C144 38 A0 00 00 */ li r5, 0
/* 8036C148 48 00 00 E8 */ b lbl_8036C230
lbl_8036C14C:
/* 8036C14C 54 A0 00 7E */ clrlwi r0, r5, 1
/* 8036C150 7C 00 33 79 */ or. r0, r0, r6
/* 8036C154 41 82 00 DC */ beq lbl_8036C230
/* 8036C158 3C A0 BF F0 */ lis r5, 0xbff0
/* 8036C15C 38 C0 00 00 */ li r6, 0
/* 8036C160 48 00 00 D0 */ b lbl_8036C230
lbl_8036C164:
/* 8036C164 3C 60 00 10 */ lis r3, 0x0010 /* 0x000FFFFF@ha */
/* 8036C168 38 03 FF FF */ addi r0, r3, 0xFFFF /* 0x000FFFFF@l */
/* 8036C16C 7C 04 3E 30 */ sraw r4, r0, r7
/* 8036C170 7C A0 20 38 */ and r0, r5, r4
/* 8036C174 7C C0 03 79 */ or. r0, r6, r0
/* 8036C178 40 82 00 08 */ bne lbl_8036C180
/* 8036C17C 48 00 00 C0 */ b lbl_8036C23C
lbl_8036C180:
/* 8036C180 C8 42 D0 F8 */ lfd f2, lit_124(r2)
/* 8036C184 C8 02 D1 00 */ lfd f0, lit_125(r2)
/* 8036C188 FC 22 08 2A */ fadd f1, f2, f1
/* 8036C18C FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8036C190 40 81 00 A0 */ ble lbl_8036C230
/* 8036C194 2C 05 00 00 */ cmpwi r5, 0
/* 8036C198 40 80 00 0C */ bge lbl_8036C1A4
/* 8036C19C 7C 60 3E 30 */ sraw r0, r3, r7
/* 8036C1A0 7C A5 02 14 */ add r5, r5, r0
lbl_8036C1A4:
/* 8036C1A4 7C A5 20 78 */ andc r5, r5, r4
/* 8036C1A8 38 C0 00 00 */ li r6, 0
/* 8036C1AC 48 00 00 84 */ b lbl_8036C230
lbl_8036C1B0:
/* 8036C1B0 2C 07 00 33 */ cmpwi r7, 0x33
/* 8036C1B4 40 81 00 14 */ ble lbl_8036C1C8
/* 8036C1B8 2C 07 04 00 */ cmpwi r7, 0x400
/* 8036C1BC 40 82 00 80 */ bne lbl_8036C23C
/* 8036C1C0 FC 21 08 2A */ fadd f1, f1, f1
/* 8036C1C4 48 00 00 78 */ b lbl_8036C23C
lbl_8036C1C8:
/* 8036C1C8 38 07 FF EC */ addi r0, r7, -20
/* 8036C1CC 38 60 FF FF */ li r3, -1
/* 8036C1D0 7C 64 04 30 */ srw r4, r3, r0
/* 8036C1D4 7C C0 20 39 */ and. r0, r6, r4
/* 8036C1D8 40 82 00 08 */ bne lbl_8036C1E0
/* 8036C1DC 48 00 00 60 */ b lbl_8036C23C
lbl_8036C1E0:
/* 8036C1E0 C8 42 D0 F8 */ lfd f2, lit_124(r2)
/* 8036C1E4 C8 02 D1 00 */ lfd f0, lit_125(r2)
/* 8036C1E8 FC 22 08 2A */ fadd f1, f2, f1
/* 8036C1EC FC 01 00 40 */ fcmpo cr0, f1, f0
/* 8036C1F0 40 81 00 40 */ ble lbl_8036C230
/* 8036C1F4 2C 05 00 00 */ cmpwi r5, 0
/* 8036C1F8 40 80 00 34 */ bge lbl_8036C22C
/* 8036C1FC 2C 07 00 14 */ cmpwi r7, 0x14
/* 8036C200 40 82 00 0C */ bne lbl_8036C20C
/* 8036C204 38 A5 00 01 */ addi r5, r5, 1
/* 8036C208 48 00 00 24 */ b lbl_8036C22C
lbl_8036C20C:
/* 8036C20C 20 07 00 34 */ subfic r0, r7, 0x34
/* 8036C210 38 60 00 01 */ li r3, 1
/* 8036C214 7C 60 00 30 */ slw r0, r3, r0
/* 8036C218 7C 06 02 14 */ add r0, r6, r0
/* 8036C21C 7C 00 30 40 */ cmplw r0, r6
/* 8036C220 40 80 00 08 */ bge lbl_8036C228
/* 8036C224 38 A5 00 01 */ addi r5, r5, 1
lbl_8036C228:
/* 8036C228 7C 06 03 78 */ mr r6, r0
lbl_8036C22C:
/* 8036C22C 7C C6 20 78 */ andc r6, r6, r4
lbl_8036C230:
/* 8036C230 90 A1 00 08 */ stw r5, 8(r1)
/* 8036C234 90 C1 00 0C */ stw r6, 0xc(r1)
/* 8036C238 C8 21 00 08 */ lfd f1, 8(r1)
lbl_8036C23C:
/* 8036C23C 38 21 00 10 */ addi r1, r1, 0x10
/* 8036C240 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/s_frexp/frexp.s
-40
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@@ -1,40 +0,0 @@
lbl_8036C244:
/* 8036C244 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036C248 38 80 00 00 */ li r4, 0
/* 8036C24C 3C 00 7F F0 */ lis r0, 0x7ff0
/* 8036C250 D8 21 00 08 */ stfd f1, 8(r1)
/* 8036C254 80 A1 00 08 */ lwz r5, 8(r1)
/* 8036C258 90 83 00 00 */ stw r4, 0(r3)
/* 8036C25C 54 A4 00 7E */ clrlwi r4, r5, 1
/* 8036C260 80 C1 00 0C */ lwz r6, 0xc(r1)
/* 8036C264 7C 04 00 00 */ cmpw r4, r0
/* 8036C268 40 80 00 0C */ bge lbl_8036C274
/* 8036C26C 7C 80 33 79 */ or. r0, r4, r6
/* 8036C270 40 82 00 0C */ bne lbl_8036C27C
lbl_8036C274:
/* 8036C274 C8 21 00 08 */ lfd f1, 8(r1)
/* 8036C278 48 00 00 50 */ b lbl_8036C2C8
lbl_8036C27C:
/* 8036C27C 3C 00 00 10 */ lis r0, 0x10
/* 8036C280 7C 04 00 00 */ cmpw r4, r0
/* 8036C284 40 80 00 20 */ bge lbl_8036C2A4
/* 8036C288 C8 02 D1 08 */ lfd f0, lit_57(r2)
/* 8036C28C 38 00 FF CA */ li r0, -54
/* 8036C290 90 03 00 00 */ stw r0, 0(r3)
/* 8036C294 FC 01 00 32 */ fmul f0, f1, f0
/* 8036C298 D8 01 00 08 */ stfd f0, 8(r1)
/* 8036C29C 80 A1 00 08 */ lwz r5, 8(r1)
/* 8036C2A0 54 A4 00 7E */ clrlwi r4, r5, 1
lbl_8036C2A4:
/* 8036C2A4 54 A0 03 00 */ rlwinm r0, r5, 0, 0xc, 0
/* 8036C2A8 80 A3 00 00 */ lwz r5, 0(r3)
/* 8036C2AC 7C 84 A6 70 */ srawi r4, r4, 0x14
/* 8036C2B0 64 00 3F E0 */ oris r0, r0, 0x3fe0
/* 8036C2B4 90 01 00 08 */ stw r0, 8(r1)
/* 8036C2B8 7C 84 2A 14 */ add r4, r4, r5
/* 8036C2BC 38 04 FC 02 */ addi r0, r4, -1022
/* 8036C2C0 90 03 00 00 */ stw r0, 0(r3)
/* 8036C2C4 C8 21 00 08 */ lfd f1, 8(r1)
lbl_8036C2C8:
/* 8036C2C8 38 21 00 10 */ addi r1, r1, 0x10
/* 8036C2CC 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/s_modf/modf.s
-70
View File
@@ -1,70 +0,0 @@
lbl_8036C494:
/* 8036C494 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036C498 D8 21 00 08 */ stfd f1, 8(r1)
/* 8036C49C 80 A1 00 08 */ lwz r5, 8(r1)
/* 8036C4A0 80 C1 00 0C */ lwz r6, 0xc(r1)
/* 8036C4A4 54 A4 65 7E */ rlwinm r4, r5, 0xc, 0x15, 0x1f
/* 8036C4A8 38 E4 FC 01 */ addi r7, r4, -1023
/* 8036C4AC 2C 07 00 14 */ cmpwi r7, 0x14
/* 8036C4B0 40 80 00 70 */ bge lbl_8036C520
/* 8036C4B4 2C 07 00 00 */ cmpwi r7, 0
/* 8036C4B8 40 80 00 18 */ bge lbl_8036C4D0
/* 8036C4BC 54 A4 00 00 */ rlwinm r4, r5, 0, 0, 0
/* 8036C4C0 38 00 00 00 */ li r0, 0
/* 8036C4C4 90 83 00 00 */ stw r4, 0(r3)
/* 8036C4C8 90 03 00 04 */ stw r0, 4(r3)
/* 8036C4CC 48 00 00 BC */ b lbl_8036C588
lbl_8036C4D0:
/* 8036C4D0 3C 80 00 10 */ lis r4, 0x0010 /* 0x000FFFFF@ha */
/* 8036C4D4 38 04 FF FF */ addi r0, r4, 0xFFFF /* 0x000FFFFF@l */
/* 8036C4D8 7C 04 3E 30 */ sraw r4, r0, r7
/* 8036C4DC 7C A0 20 38 */ and r0, r5, r4
/* 8036C4E0 7C C0 03 79 */ or. r0, r6, r0
/* 8036C4E4 40 82 00 20 */ bne lbl_8036C504
/* 8036C4E8 54 A4 00 00 */ rlwinm r4, r5, 0, 0, 0
/* 8036C4EC 38 00 00 00 */ li r0, 0
/* 8036C4F0 90 81 00 08 */ stw r4, 8(r1)
/* 8036C4F4 90 01 00 0C */ stw r0, 0xc(r1)
/* 8036C4F8 D8 23 00 00 */ stfd f1, 0(r3)
/* 8036C4FC C8 21 00 08 */ lfd f1, 8(r1)
/* 8036C500 48 00 00 88 */ b lbl_8036C588
lbl_8036C504:
/* 8036C504 7C A4 20 78 */ andc r4, r5, r4
/* 8036C508 38 00 00 00 */ li r0, 0
/* 8036C50C 90 83 00 00 */ stw r4, 0(r3)
/* 8036C510 90 03 00 04 */ stw r0, 4(r3)
/* 8036C514 C8 03 00 00 */ lfd f0, 0(r3)
/* 8036C518 FC 21 00 28 */ fsub f1, f1, f0
/* 8036C51C 48 00 00 6C */ b lbl_8036C588
lbl_8036C520:
/* 8036C520 2C 07 00 33 */ cmpwi r7, 0x33
/* 8036C524 40 81 00 20 */ ble lbl_8036C544
/* 8036C528 54 A4 00 00 */ rlwinm r4, r5, 0, 0, 0
/* 8036C52C 38 00 00 00 */ li r0, 0
/* 8036C530 90 81 00 08 */ stw r4, 8(r1)
/* 8036C534 90 01 00 0C */ stw r0, 0xc(r1)
/* 8036C538 D8 23 00 00 */ stfd f1, 0(r3)
/* 8036C53C C8 21 00 08 */ lfd f1, 8(r1)
/* 8036C540 48 00 00 48 */ b lbl_8036C588
lbl_8036C544:
/* 8036C544 38 07 FF EC */ addi r0, r7, -20
/* 8036C548 38 80 FF FF */ li r4, -1
/* 8036C54C 7C 84 04 30 */ srw r4, r4, r0
/* 8036C550 7C C0 20 39 */ and. r0, r6, r4
/* 8036C554 40 82 00 20 */ bne lbl_8036C574
/* 8036C558 54 A4 00 00 */ rlwinm r4, r5, 0, 0, 0
/* 8036C55C 38 00 00 00 */ li r0, 0
/* 8036C560 90 81 00 08 */ stw r4, 8(r1)
/* 8036C564 90 01 00 0C */ stw r0, 0xc(r1)
/* 8036C568 D8 23 00 00 */ stfd f1, 0(r3)
/* 8036C56C C8 21 00 08 */ lfd f1, 8(r1)
/* 8036C570 48 00 00 18 */ b lbl_8036C588
lbl_8036C574:
/* 8036C574 90 A3 00 00 */ stw r5, 0(r3)
/* 8036C578 7C C0 20 78 */ andc r0, r6, r4
/* 8036C57C 90 03 00 04 */ stw r0, 4(r3)
/* 8036C580 C8 03 00 00 */ lfd f0, 0(r3)
/* 8036C584 FC 21 00 28 */ fsub f1, f1, f0
lbl_8036C588:
/* 8036C588 38 21 00 10 */ addi r1, r1, 0x10
/* 8036C58C 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/s_sin/sin.s
-63
View File
@@ -1,63 +0,0 @@
lbl_8036C590:
/* 8036C590 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8036C594 7C 08 02 A6 */ mflr r0
/* 8036C598 3C 60 3F E9 */ lis r3, 0x3FE9 /* 0x3FE921FB@ha */
/* 8036C59C D8 21 00 08 */ stfd f1, 8(r1)
/* 8036C5A0 90 01 00 24 */ stw r0, 0x24(r1)
/* 8036C5A4 38 03 21 FB */ addi r0, r3, 0x21FB /* 0x3FE921FB@l */
/* 8036C5A8 80 61 00 08 */ lwz r3, 8(r1)
/* 8036C5AC 54 63 00 7E */ clrlwi r3, r3, 1
/* 8036C5B0 7C 03 00 00 */ cmpw r3, r0
/* 8036C5B4 41 81 00 14 */ bgt lbl_8036C5C8
/* 8036C5B8 C8 42 D1 38 */ lfd f2, lit_67(r2)
/* 8036C5BC 38 60 00 00 */ li r3, 0
/* 8036C5C0 4B FF F4 31 */ bl __kernel_sin
/* 8036C5C4 48 00 00 94 */ b lbl_8036C658
lbl_8036C5C8:
/* 8036C5C8 3C 00 7F F0 */ lis r0, 0x7ff0
/* 8036C5CC 7C 03 00 00 */ cmpw r3, r0
/* 8036C5D0 41 80 00 0C */ blt lbl_8036C5DC
/* 8036C5D4 FC 21 08 28 */ fsub f1, f1, f1
/* 8036C5D8 48 00 00 80 */ b lbl_8036C658
lbl_8036C5DC:
/* 8036C5DC 38 61 00 10 */ addi r3, r1, 0x10
/* 8036C5E0 4B FF E1 29 */ bl __ieee754_rem_pio2
/* 8036C5E4 54 60 07 BE */ clrlwi r0, r3, 0x1e
/* 8036C5E8 2C 00 00 01 */ cmpwi r0, 1
/* 8036C5EC 41 82 00 34 */ beq lbl_8036C620
/* 8036C5F0 40 80 00 10 */ bge lbl_8036C600
/* 8036C5F4 2C 00 00 00 */ cmpwi r0, 0
/* 8036C5F8 40 80 00 14 */ bge lbl_8036C60C
/* 8036C5FC 48 00 00 4C */ b lbl_8036C648
lbl_8036C600:
/* 8036C600 2C 00 00 03 */ cmpwi r0, 3
/* 8036C604 40 80 00 44 */ bge lbl_8036C648
/* 8036C608 48 00 00 28 */ b lbl_8036C630
lbl_8036C60C:
/* 8036C60C C8 21 00 10 */ lfd f1, 0x10(r1)
/* 8036C610 38 60 00 01 */ li r3, 1
/* 8036C614 C8 41 00 18 */ lfd f2, 0x18(r1)
/* 8036C618 4B FF F3 D9 */ bl __kernel_sin
/* 8036C61C 48 00 00 3C */ b lbl_8036C658
lbl_8036C620:
/* 8036C620 C8 21 00 10 */ lfd f1, 0x10(r1)
/* 8036C624 C8 41 00 18 */ lfd f2, 0x18(r1)
/* 8036C628 4B FF E4 81 */ bl __kernel_cos
/* 8036C62C 48 00 00 2C */ b lbl_8036C658
lbl_8036C630:
/* 8036C630 C8 21 00 10 */ lfd f1, 0x10(r1)
/* 8036C634 38 60 00 01 */ li r3, 1
/* 8036C638 C8 41 00 18 */ lfd f2, 0x18(r1)
/* 8036C63C 4B FF F3 B5 */ bl __kernel_sin
/* 8036C640 FC 20 08 50 */ fneg f1, f1
/* 8036C644 48 00 00 14 */ b lbl_8036C658
lbl_8036C648:
/* 8036C648 C8 21 00 10 */ lfd f1, 0x10(r1)
/* 8036C64C C8 41 00 18 */ lfd f2, 0x18(r1)
/* 8036C650 4B FF E4 59 */ bl __kernel_cos
/* 8036C654 FC 20 08 50 */ fneg f1, f1
lbl_8036C658:
/* 8036C658 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8036C65C 7C 08 03 A6 */ mtlr r0
/* 8036C660 38 21 00 20 */ addi r1, r1, 0x20
/* 8036C664 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/s_tan/tan.s
-34
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@@ -1,34 +0,0 @@
lbl_8036C668:
/* 8036C668 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8036C66C 7C 08 02 A6 */ mflr r0
/* 8036C670 3C 60 3F E9 */ lis r3, 0x3FE9 /* 0x3FE921FB@ha */
/* 8036C674 D8 21 00 08 */ stfd f1, 8(r1)
/* 8036C678 90 01 00 24 */ stw r0, 0x24(r1)
/* 8036C67C 38 03 21 FB */ addi r0, r3, 0x21FB /* 0x3FE921FB@l */
/* 8036C680 80 61 00 08 */ lwz r3, 8(r1)
/* 8036C684 54 63 00 7E */ clrlwi r3, r3, 1
/* 8036C688 7C 03 00 00 */ cmpw r3, r0
/* 8036C68C 41 81 00 14 */ bgt lbl_8036C6A0
/* 8036C690 C8 42 D1 40 */ lfd f2, lit_58(r2)
/* 8036C694 38 60 00 01 */ li r3, 1
/* 8036C698 4B FF F3 F9 */ bl __kernel_tan
/* 8036C69C 48 00 00 34 */ b lbl_8036C6D0
lbl_8036C6A0:
/* 8036C6A0 3C 00 7F F0 */ lis r0, 0x7ff0
/* 8036C6A4 7C 03 00 00 */ cmpw r3, r0
/* 8036C6A8 41 80 00 0C */ blt lbl_8036C6B4
/* 8036C6AC FC 21 08 28 */ fsub f1, f1, f1
/* 8036C6B0 48 00 00 20 */ b lbl_8036C6D0
lbl_8036C6B4:
/* 8036C6B4 38 61 00 10 */ addi r3, r1, 0x10
/* 8036C6B8 4B FF E0 51 */ bl __ieee754_rem_pio2
/* 8036C6BC 54 60 0F BC */ rlwinm r0, r3, 1, 0x1e, 0x1e
/* 8036C6C0 C8 21 00 10 */ lfd f1, 0x10(r1)
/* 8036C6C4 C8 41 00 18 */ lfd f2, 0x18(r1)
/* 8036C6C8 20 60 00 01 */ subfic r3, r0, 1
/* 8036C6CC 4B FF F3 C5 */ bl __kernel_tan
lbl_8036C6D0:
/* 8036C6D0 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8036C6D4 7C 08 03 A6 */ mtlr r0
/* 8036C6D8 38 21 00 20 */ addi r1, r1, 0x20
/* 8036C6DC 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/w_acos/acos.s
-9
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@@ -1,9 +0,0 @@
lbl_8036C6E0:
/* 8036C6E0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036C6E4 7C 08 02 A6 */ mflr r0
/* 8036C6E8 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036C6EC 4B FF CB 89 */ bl __ieee754_acos
/* 8036C6F0 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8036C6F4 7C 08 03 A6 */ mtlr r0
/* 8036C6F8 38 21 00 10 */ addi r1, r1, 0x10
/* 8036C6FC 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/w_asin/asin.s
-9
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@@ -1,9 +0,0 @@
lbl_8036C700:
/* 8036C700 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036C704 7C 08 02 A6 */ mflr r0
/* 8036C708 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036C70C 4B FF CD A5 */ bl __ieee754_asin
/* 8036C710 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8036C714 7C 08 03 A6 */ mtlr r0
/* 8036C718 38 21 00 10 */ addi r1, r1, 0x10
/* 8036C71C 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/w_atan2/atan2.s
-9
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@@ -1,9 +0,0 @@
lbl_8036C720:
/* 8036C720 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036C724 7C 08 02 A6 */ mflr r0
/* 8036C728 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036C72C 4B FF CF BD */ bl __ieee754_atan2
/* 8036C730 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8036C734 7C 08 03 A6 */ mtlr r0
/* 8036C738 38 21 00 10 */ addi r1, r1, 0x10
/* 8036C73C 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/w_exp/exp.s
-9
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@@ -1,9 +0,0 @@
lbl_8036C740:
/* 8036C740 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036C744 7C 08 02 A6 */ mflr r0
/* 8036C748 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036C74C 4B FF D2 2D */ bl __ieee754_exp
/* 8036C750 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8036C754 7C 08 03 A6 */ mtlr r0
/* 8036C758 38 21 00 10 */ addi r1, r1, 0x10
/* 8036C75C 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/w_fmod/fmod.s
-9
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@@ -1,9 +0,0 @@
lbl_8036C760:
/* 8036C760 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036C764 7C 08 02 A6 */ mflr r0
/* 8036C768 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036C76C 4B FF D4 31 */ bl __ieee754_fmod
/* 8036C770 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8036C774 7C 08 03 A6 */ mtlr r0
/* 8036C778 38 21 00 10 */ addi r1, r1, 0x10
/* 8036C77C 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/w_pow/pow.s
-9
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@@ -1,9 +0,0 @@
lbl_8036C780:
/* 8036C780 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036C784 7C 08 02 A6 */ mflr r0
/* 8036C788 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036C78C 4B FF D7 4D */ bl __ieee754_pow
/* 8036C790 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8036C794 7C 08 03 A6 */ mtlr r0
/* 8036C798 38 21 00 10 */ addi r1, r1, 0x10
/* 8036C79C 4E 80 00 20 */ blr
asm/MSL_C/Math/Double_precision/w_sqrt/sqrt.s
-9
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@@ -1,9 +0,0 @@
lbl_8036CA54:
/* 8036CA54 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036CA58 7C 08 02 A6 */ mflr r0
/* 8036CA5C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036CA60 4B FF FD 41 */ bl __ieee754_sqrt
/* 8036CA64 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8036CA68 7C 08 03 A6 */ mtlr r0
/* 8036CA6C 38 21 00 10 */ addi r1, r1, 0x10
/* 8036CA70 4E 80 00 20 */ blr
asm/MSL_C/PPC_EABI/Src/math_ppc/acosf.s
-10
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@@ -1,10 +0,0 @@
lbl_8036CA30:
/* 8036CA30 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036CA34 7C 08 02 A6 */ mflr r0
/* 8036CA38 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036CA3C 4B FF FC A5 */ bl acos
/* 8036CA40 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8036CA44 FC 20 08 18 */ frsp f1, f1
/* 8036CA48 7C 08 03 A6 */ mtlr r0
/* 8036CA4C 38 21 00 10 */ addi r1, r1, 0x10
/* 8036CA50 4E 80 00 20 */ blr
asm/MSL_C/PPC_EABI/Src/math_ppc/cosf.s
-10
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@@ -1,10 +0,0 @@
lbl_8036CA0C:
/* 8036CA0C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036CA10 7C 08 02 A6 */ mflr r0
/* 8036CA14 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036CA18 4B FF F6 11 */ bl cos
/* 8036CA1C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8036CA20 FC 20 08 18 */ frsp f1, f1
/* 8036CA24 7C 08 03 A6 */ mtlr r0
/* 8036CA28 38 21 00 10 */ addi r1, r1, 0x10
/* 8036CA2C 4E 80 00 20 */ blr
asm/MSL_C/PPC_EABI/Src/math_ppc/sinf.s
-10
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@@ -1,10 +0,0 @@
lbl_8036C9E8:
/* 8036C9E8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036C9EC 7C 08 02 A6 */ mflr r0
/* 8036C9F0 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036C9F4 4B FF FB 9D */ bl sin
/* 8036C9F8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8036C9FC FC 20 08 18 */ frsp f1, f1
/* 8036CA00 7C 08 03 A6 */ mtlr r0
/* 8036CA04 38 21 00 10 */ addi r1, r1, 0x10
/* 8036CA08 4E 80 00 20 */ blr
asm/MSL_C/PPC_EABI/Src/math_ppc/tanf.s
-10
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@@ -1,10 +0,0 @@
lbl_8036C9C4:
/* 8036C9C4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8036C9C8 7C 08 02 A6 */ mflr r0
/* 8036C9CC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8036C9D0 4B FF FC 99 */ bl tan
/* 8036C9D4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8036C9D8 FC 20 08 18 */ frsp f1, f1
/* 8036C9DC 7C 08 03 A6 */ mtlr r0
/* 8036C9E0 38 21 00 10 */ addi r1, r1, 0x10
/* 8036C9E4 4E 80 00 20 */ blr
asm/MSL_C/PPC_EABI/Src/uart_console_io_gcn/__write_console.s
-57
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@@ -1,57 +0,0 @@
lbl_803691A4:
/* 803691A4 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 803691A8 7C 08 02 A6 */ mflr r0
/* 803691AC 90 01 00 24 */ stw r0, 0x24(r1)
/* 803691B0 93 E1 00 1C */ stw r31, 0x1c(r1)
/* 803691B4 7C DF 33 78 */ mr r31, r6
/* 803691B8 93 C1 00 18 */ stw r30, 0x18(r1)
/* 803691BC 7C BE 2B 78 */ mr r30, r5
/* 803691C0 93 A1 00 14 */ stw r29, 0x14(r1)
/* 803691C4 7C 9D 23 78 */ mr r29, r4
/* 803691C8 93 81 00 10 */ stw r28, 0x10(r1)
/* 803691CC 7C 7C 1B 78 */ mr r28, r3
/* 803691D0 4B FD 0D 2D */ bl OSGetConsoleType
/* 803691D4 54 60 00 85 */ rlwinm. r0, r3, 0, 2, 2
/* 803691D8 40 82 00 64 */ bne lbl_8036923C
/* 803691DC 80 0D 94 30 */ lwz r0, initialized(r13)
/* 803691E0 38 60 00 00 */ li r3, 0
/* 803691E4 2C 00 00 00 */ cmpwi r0, 0
/* 803691E8 40 82 00 20 */ bne lbl_80369208
/* 803691EC 3C 60 00 01 */ lis r3, 0x0001 /* 0x0000E100@ha */
/* 803691F0 38 63 E1 00 */ addi r3, r3, 0xE100 /* 0x0000E100@l */
/* 803691F4 4B FD B7 3D */ bl InitializeUART
/* 803691F8 2C 03 00 00 */ cmpwi r3, 0
/* 803691FC 40 82 00 0C */ bne lbl_80369208
/* 80369200 38 00 00 01 */ li r0, 1
/* 80369204 90 0D 94 30 */ stw r0, initialized(r13)
lbl_80369208:
/* 80369208 2C 03 00 00 */ cmpwi r3, 0
/* 8036920C 41 82 00 0C */ beq lbl_80369218
/* 80369210 38 60 00 01 */ li r3, 1
/* 80369214 48 00 00 40 */ b lbl_80369254
lbl_80369218:
/* 80369218 80 9E 00 00 */ lwz r4, 0(r30)
/* 8036921C 7F A3 EB 78 */ mr r3, r29
/* 80369220 4B FD B7 81 */ bl WriteUARTN
/* 80369224 2C 03 00 00 */ cmpwi r3, 0
/* 80369228 41 82 00 14 */ beq lbl_8036923C
/* 8036922C 38 00 00 00 */ li r0, 0
/* 80369230 38 60 00 01 */ li r3, 1
/* 80369234 90 1E 00 00 */ stw r0, 0(r30)
/* 80369238 48 00 00 1C */ b lbl_80369254
lbl_8036923C:
/* 8036923C 7F 83 E3 78 */ mr r3, r28
/* 80369240 7F A4 EB 78 */ mr r4, r29
/* 80369244 7F C5 F3 78 */ mr r5, r30
/* 80369248 7F E6 FB 78 */ mr r6, r31
/* 8036924C 48 00 8F 51 */ bl __TRK_write_console
/* 80369250 38 60 00 00 */ li r3, 0
lbl_80369254:
/* 80369254 80 01 00 24 */ lwz r0, 0x24(r1)
/* 80369258 83 E1 00 1C */ lwz r31, 0x1c(r1)
/* 8036925C 83 C1 00 18 */ lwz r30, 0x18(r1)
/* 80369260 83 A1 00 14 */ lwz r29, 0x14(r1)
/* 80369264 83 81 00 10 */ lwz r28, 0x10(r1)
/* 80369268 7C 08 03 A6 */ mtlr r0
/* 8036926C 38 21 00 20 */ addi r1, r1, 0x20
/* 80369270 4E 80 00 20 */ blr
asm/init/TRK_memcpy.s
-12
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@@ -1,12 +0,0 @@
lbl_800035C0:
/* 800035C0 38 84 FF FF */ addi r4, r4, -1
/* 800035C4 38 C3 FF FF */ addi r6, r3, -1
/* 800035C8 38 A5 00 01 */ addi r5, r5, 1
/* 800035CC 48 00 00 0C */ b lbl_800035D8
lbl_800035D0:
/* 800035D0 8C 04 00 01 */ lbzu r0, 1(r4)
/* 800035D4 9C 06 00 01 */ stbu r0, 1(r6)
lbl_800035D8:
/* 800035D8 34 A5 FF FF */ addic. r5, r5, -1
/* 800035DC 40 82 FF F4 */ bne lbl_800035D0
/* 800035E0 4E 80 00 20 */ blr
asm/init/TRK_memset.s
-13
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@@ -1,13 +0,0 @@
lbl_80003590:
/* 80003590 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80003594 7C 08 02 A6 */ mflr r0
/* 80003598 90 01 00 14 */ stw r0, 0x14(r1)
/* 8000359C 93 E1 00 0C */ stw r31, 0xc(r1)
/* 800035A0 7C 7F 1B 78 */ mr r31, r3
/* 800035A4 48 36 BF DD */ bl TRK_fill_mem
/* 800035A8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800035AC 7F E3 FB 78 */ mr r3, r31
/* 800035B0 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 800035B4 7C 08 03 A6 */ mtlr r0
/* 800035B8 38 21 00 10 */ addi r1, r1, 0x10
/* 800035BC 4E 80 00 20 */ blr
asm/init/__TRK_reset.s
-12
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@@ -1,12 +0,0 @@
lbl_80005518:
/* 80005518 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8000551C 7C 08 02 A6 */ mflr r0
/* 80005520 38 60 00 00 */ li r3, 0
/* 80005524 38 80 00 00 */ li r4, 0
/* 80005528 90 01 00 14 */ stw r0, 0x14(r1)
/* 8000552C 38 A0 00 00 */ li r5, 0
/* 80005530 48 33 A3 7D */ bl OSResetSystem
/* 80005534 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80005538 7C 08 03 A6 */ mtlr r0
/* 8000553C 38 21 00 10 */ addi r1, r1, 0x10
/* 80005540 4E 80 00 20 */ blr
asm/init/__check_pad3.s
-18
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@@ -1,18 +0,0 @@
lbl_80003100:
/* 80003100 7C 08 02 A6 */ mflr r0
/* 80003104 3C 60 80 00 */ lis r3, 0x8000 /* 0x800030E4@ha */
/* 80003108 90 01 00 04 */ stw r0, 4(r1)
/* 8000310C 94 21 FF F8 */ stwu r1, -8(r1)
/* 80003110 A0 03 30 E4 */ lhz r0, 0x30E4(r3) /* 0x800030E4@l */
/* 80003114 70 00 0E EF */ andi. r0, r0, 0xeef
/* 80003118 2C 00 0E EF */ cmpwi r0, 0xeef
/* 8000311C 40 82 00 14 */ bne lbl_80003130
/* 80003120 38 60 00 00 */ li r3, 0
/* 80003124 38 80 00 00 */ li r4, 0
/* 80003128 38 A0 00 00 */ li r5, 0
/* 8000312C 48 33 C7 81 */ bl OSResetSystem
lbl_80003130:
/* 80003130 80 01 00 0C */ lwz r0, 0xc(r1)
/* 80003134 38 21 00 08 */ addi r1, r1, 8
/* 80003138 7C 08 03 A6 */ mtlr r0
/* 8000313C 4E 80 00 20 */ blr
asm/init/__fill_mem.s
-56
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@@ -1,56 +0,0 @@
lbl_80003488:
/* 80003488 28 05 00 20 */ cmplwi r5, 0x20
/* 8000348C 54 84 06 3E */ clrlwi r4, r4, 0x18
/* 80003490 38 C3 FF FF */ addi r6, r3, -1
/* 80003494 7C 87 23 78 */ mr r7, r4
/* 80003498 41 80 00 90 */ blt lbl_80003528
/* 8000349C 7C C0 30 F8 */ nor r0, r6, r6
/* 800034A0 54 03 07 BF */ clrlwi. r3, r0, 0x1e
/* 800034A4 41 82 00 14 */ beq lbl_800034B8
/* 800034A8 7C A3 28 50 */ subf r5, r3, r5
lbl_800034AC:
/* 800034AC 34 63 FF FF */ addic. r3, r3, -1
/* 800034B0 9C E6 00 01 */ stbu r7, 1(r6)
/* 800034B4 40 82 FF F8 */ bne lbl_800034AC
lbl_800034B8:
/* 800034B8 28 07 00 00 */ cmplwi r7, 0
/* 800034BC 41 82 00 1C */ beq lbl_800034D8
/* 800034C0 54 E3 C0 0E */ slwi r3, r7, 0x18
/* 800034C4 54 E0 80 1E */ slwi r0, r7, 0x10
/* 800034C8 54 E4 40 2E */ slwi r4, r7, 8
/* 800034CC 7C 60 03 78 */ or r0, r3, r0
/* 800034D0 7C 80 03 78 */ or r0, r4, r0
/* 800034D4 7C E7 03 78 */ or r7, r7, r0
lbl_800034D8:
/* 800034D8 54 A3 D9 7F */ rlwinm. r3, r5, 0x1b, 5, 0x1f
/* 800034DC 38 86 FF FD */ addi r4, r6, -3
/* 800034E0 41 82 00 2C */ beq lbl_8000350C
lbl_800034E4:
/* 800034E4 90 E4 00 04 */ stw r7, 4(r4)
/* 800034E8 34 63 FF FF */ addic. r3, r3, -1
/* 800034EC 90 E4 00 08 */ stw r7, 8(r4)
/* 800034F0 90 E4 00 0C */ stw r7, 0xc(r4)
/* 800034F4 90 E4 00 10 */ stw r7, 0x10(r4)
/* 800034F8 90 E4 00 14 */ stw r7, 0x14(r4)
/* 800034FC 90 E4 00 18 */ stw r7, 0x18(r4)
/* 80003500 90 E4 00 1C */ stw r7, 0x1c(r4)
/* 80003504 94 E4 00 20 */ stwu r7, 0x20(r4)
/* 80003508 40 82 FF DC */ bne lbl_800034E4
lbl_8000350C:
/* 8000350C 54 A3 F7 7F */ rlwinm. r3, r5, 0x1e, 0x1d, 0x1f
/* 80003510 41 82 00 10 */ beq lbl_80003520
lbl_80003514:
/* 80003514 34 63 FF FF */ addic. r3, r3, -1
/* 80003518 94 E4 00 04 */ stwu r7, 4(r4)
/* 8000351C 40 82 FF F8 */ bne lbl_80003514
lbl_80003520:
/* 80003520 38 C4 00 03 */ addi r6, r4, 3
/* 80003524 54 A5 07 BE */ clrlwi r5, r5, 0x1e
lbl_80003528:
/* 80003528 28 05 00 00 */ cmplwi r5, 0
/* 8000352C 4D 82 00 20 */ beqlr
lbl_80003530:
/* 80003530 34 A5 FF FF */ addic. r5, r5, -1
/* 80003534 9C E6 00 01 */ stbu r7, 1(r6)
/* 80003538 40 82 FF F8 */ bne lbl_80003530
/* 8000353C 4E 80 00 20 */ blr
asm/init/__set_debug_bba.s
-4
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@@ -1,4 +0,0 @@
lbl_80003140:
/* 80003140 38 00 00 01 */ li r0, 1
/* 80003144 98 0D 91 50 */ stb r0, data_804516D0(r13)
/* 80003148 4E 80 00 20 */ blr
asm/init/memcpy.s
-26
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@@ -1,26 +0,0 @@
lbl_80003540:
/* 80003540 7C 04 18 40 */ cmplw r4, r3
/* 80003544 41 80 00 28 */ blt lbl_8000356C
/* 80003548 38 84 FF FF */ addi r4, r4, -1
/* 8000354C 38 C3 FF FF */ addi r6, r3, -1
/* 80003550 38 A5 00 01 */ addi r5, r5, 1
/* 80003554 48 00 00 0C */ b lbl_80003560
lbl_80003558:
/* 80003558 8C 04 00 01 */ lbzu r0, 1(r4)
/* 8000355C 9C 06 00 01 */ stbu r0, 1(r6)
lbl_80003560:
/* 80003560 34 A5 FF FF */ addic. r5, r5, -1
/* 80003564 40 82 FF F4 */ bne lbl_80003558
/* 80003568 4E 80 00 20 */ blr
lbl_8000356C:
/* 8000356C 7C 84 2A 14 */ add r4, r4, r5
/* 80003570 7C C3 2A 14 */ add r6, r3, r5
/* 80003574 38 A5 00 01 */ addi r5, r5, 1
/* 80003578 48 00 00 0C */ b lbl_80003584
lbl_8000357C:
/* 8000357C 8C 04 FF FF */ lbzu r0, -1(r4)
/* 80003580 9C 06 FF FF */ stbu r0, -1(r6)
lbl_80003584:
/* 80003584 34 A5 FF FF */ addic. r5, r5, -1
/* 80003588 40 82 FF F4 */ bne lbl_8000357C
/* 8000358C 4E 80 00 20 */ blr
asm/init/memset.s
-13
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@@ -1,13 +0,0 @@
lbl_80003458:
/* 80003458 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8000345C 7C 08 02 A6 */ mflr r0
/* 80003460 90 01 00 14 */ stw r0, 0x14(r1)
/* 80003464 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80003468 7C 7F 1B 78 */ mr r31, r3
/* 8000346C 48 00 00 1D */ bl __fill_mem
/* 80003470 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80003474 7F E3 FB 78 */ mr r3, r31
/* 80003478 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8000347C 7C 08 03 A6 */ mtlr r0
/* 80003480 38 21 00 10 */ addi r1, r1, 0x10
/* 80003484 4E 80 00 20 */ blr