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some MSL_C work (#192)

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* wip

* bunch of MSL_C files

thanks to pikmin2 decomp for their work

* format / asm

* progress

* fix

* fix remove-asm to work with C files

* init / start
This commit is contained in:
TakaRikka
2022-04-24 04:02:50 -07:00
committed by GitHub
parent a1099217d6
commit 589cc12296
154 changed files with 2388 additions and 3088 deletions
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asm/init/TRK_memcpy.s
-12
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@@ -1,12 +0,0 @@
lbl_800035C0:
/* 800035C0 38 84 FF FF */ addi r4, r4, -1
/* 800035C4 38 C3 FF FF */ addi r6, r3, -1
/* 800035C8 38 A5 00 01 */ addi r5, r5, 1
/* 800035CC 48 00 00 0C */ b lbl_800035D8
lbl_800035D0:
/* 800035D0 8C 04 00 01 */ lbzu r0, 1(r4)
/* 800035D4 9C 06 00 01 */ stbu r0, 1(r6)
lbl_800035D8:
/* 800035D8 34 A5 FF FF */ addic. r5, r5, -1
/* 800035DC 40 82 FF F4 */ bne lbl_800035D0
/* 800035E0 4E 80 00 20 */ blr
asm/init/TRK_memset.s
-13
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@@ -1,13 +0,0 @@
lbl_80003590:
/* 80003590 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 80003594 7C 08 02 A6 */ mflr r0
/* 80003598 90 01 00 14 */ stw r0, 0x14(r1)
/* 8000359C 93 E1 00 0C */ stw r31, 0xc(r1)
/* 800035A0 7C 7F 1B 78 */ mr r31, r3
/* 800035A4 48 36 BF DD */ bl TRK_fill_mem
/* 800035A8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 800035AC 7F E3 FB 78 */ mr r3, r31
/* 800035B0 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 800035B4 7C 08 03 A6 */ mtlr r0
/* 800035B8 38 21 00 10 */ addi r1, r1, 0x10
/* 800035BC 4E 80 00 20 */ blr
asm/init/__TRK_reset.s
-12
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@@ -1,12 +0,0 @@
lbl_80005518:
/* 80005518 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8000551C 7C 08 02 A6 */ mflr r0
/* 80005520 38 60 00 00 */ li r3, 0
/* 80005524 38 80 00 00 */ li r4, 0
/* 80005528 90 01 00 14 */ stw r0, 0x14(r1)
/* 8000552C 38 A0 00 00 */ li r5, 0
/* 80005530 48 33 A3 7D */ bl OSResetSystem
/* 80005534 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80005538 7C 08 03 A6 */ mtlr r0
/* 8000553C 38 21 00 10 */ addi r1, r1, 0x10
/* 80005540 4E 80 00 20 */ blr
asm/init/__check_pad3.s
-18
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@@ -1,18 +0,0 @@
lbl_80003100:
/* 80003100 7C 08 02 A6 */ mflr r0
/* 80003104 3C 60 80 00 */ lis r3, 0x8000 /* 0x800030E4@ha */
/* 80003108 90 01 00 04 */ stw r0, 4(r1)
/* 8000310C 94 21 FF F8 */ stwu r1, -8(r1)
/* 80003110 A0 03 30 E4 */ lhz r0, 0x30E4(r3) /* 0x800030E4@l */
/* 80003114 70 00 0E EF */ andi. r0, r0, 0xeef
/* 80003118 2C 00 0E EF */ cmpwi r0, 0xeef
/* 8000311C 40 82 00 14 */ bne lbl_80003130
/* 80003120 38 60 00 00 */ li r3, 0
/* 80003124 38 80 00 00 */ li r4, 0
/* 80003128 38 A0 00 00 */ li r5, 0
/* 8000312C 48 33 C7 81 */ bl OSResetSystem
lbl_80003130:
/* 80003130 80 01 00 0C */ lwz r0, 0xc(r1)
/* 80003134 38 21 00 08 */ addi r1, r1, 8
/* 80003138 7C 08 03 A6 */ mtlr r0
/* 8000313C 4E 80 00 20 */ blr
asm/init/__fill_mem.s
-56
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@@ -1,56 +0,0 @@
lbl_80003488:
/* 80003488 28 05 00 20 */ cmplwi r5, 0x20
/* 8000348C 54 84 06 3E */ clrlwi r4, r4, 0x18
/* 80003490 38 C3 FF FF */ addi r6, r3, -1
/* 80003494 7C 87 23 78 */ mr r7, r4
/* 80003498 41 80 00 90 */ blt lbl_80003528
/* 8000349C 7C C0 30 F8 */ nor r0, r6, r6
/* 800034A0 54 03 07 BF */ clrlwi. r3, r0, 0x1e
/* 800034A4 41 82 00 14 */ beq lbl_800034B8
/* 800034A8 7C A3 28 50 */ subf r5, r3, r5
lbl_800034AC:
/* 800034AC 34 63 FF FF */ addic. r3, r3, -1
/* 800034B0 9C E6 00 01 */ stbu r7, 1(r6)
/* 800034B4 40 82 FF F8 */ bne lbl_800034AC
lbl_800034B8:
/* 800034B8 28 07 00 00 */ cmplwi r7, 0
/* 800034BC 41 82 00 1C */ beq lbl_800034D8
/* 800034C0 54 E3 C0 0E */ slwi r3, r7, 0x18
/* 800034C4 54 E0 80 1E */ slwi r0, r7, 0x10
/* 800034C8 54 E4 40 2E */ slwi r4, r7, 8
/* 800034CC 7C 60 03 78 */ or r0, r3, r0
/* 800034D0 7C 80 03 78 */ or r0, r4, r0
/* 800034D4 7C E7 03 78 */ or r7, r7, r0
lbl_800034D8:
/* 800034D8 54 A3 D9 7F */ rlwinm. r3, r5, 0x1b, 5, 0x1f
/* 800034DC 38 86 FF FD */ addi r4, r6, -3
/* 800034E0 41 82 00 2C */ beq lbl_8000350C
lbl_800034E4:
/* 800034E4 90 E4 00 04 */ stw r7, 4(r4)
/* 800034E8 34 63 FF FF */ addic. r3, r3, -1
/* 800034EC 90 E4 00 08 */ stw r7, 8(r4)
/* 800034F0 90 E4 00 0C */ stw r7, 0xc(r4)
/* 800034F4 90 E4 00 10 */ stw r7, 0x10(r4)
/* 800034F8 90 E4 00 14 */ stw r7, 0x14(r4)
/* 800034FC 90 E4 00 18 */ stw r7, 0x18(r4)
/* 80003500 90 E4 00 1C */ stw r7, 0x1c(r4)
/* 80003504 94 E4 00 20 */ stwu r7, 0x20(r4)
/* 80003508 40 82 FF DC */ bne lbl_800034E4
lbl_8000350C:
/* 8000350C 54 A3 F7 7F */ rlwinm. r3, r5, 0x1e, 0x1d, 0x1f
/* 80003510 41 82 00 10 */ beq lbl_80003520
lbl_80003514:
/* 80003514 34 63 FF FF */ addic. r3, r3, -1
/* 80003518 94 E4 00 04 */ stwu r7, 4(r4)
/* 8000351C 40 82 FF F8 */ bne lbl_80003514
lbl_80003520:
/* 80003520 38 C4 00 03 */ addi r6, r4, 3
/* 80003524 54 A5 07 BE */ clrlwi r5, r5, 0x1e
lbl_80003528:
/* 80003528 28 05 00 00 */ cmplwi r5, 0
/* 8000352C 4D 82 00 20 */ beqlr
lbl_80003530:
/* 80003530 34 A5 FF FF */ addic. r5, r5, -1
/* 80003534 9C E6 00 01 */ stbu r7, 1(r6)
/* 80003538 40 82 FF F8 */ bne lbl_80003530
/* 8000353C 4E 80 00 20 */ blr
asm/init/__set_debug_bba.s
-4
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@@ -1,4 +0,0 @@
lbl_80003140:
/* 80003140 38 00 00 01 */ li r0, 1
/* 80003144 98 0D 91 50 */ stb r0, data_804516D0(r13)
/* 80003148 4E 80 00 20 */ blr
asm/init/memcpy.s
-26
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@@ -1,26 +0,0 @@
lbl_80003540:
/* 80003540 7C 04 18 40 */ cmplw r4, r3
/* 80003544 41 80 00 28 */ blt lbl_8000356C
/* 80003548 38 84 FF FF */ addi r4, r4, -1
/* 8000354C 38 C3 FF FF */ addi r6, r3, -1
/* 80003550 38 A5 00 01 */ addi r5, r5, 1
/* 80003554 48 00 00 0C */ b lbl_80003560
lbl_80003558:
/* 80003558 8C 04 00 01 */ lbzu r0, 1(r4)
/* 8000355C 9C 06 00 01 */ stbu r0, 1(r6)
lbl_80003560:
/* 80003560 34 A5 FF FF */ addic. r5, r5, -1
/* 80003564 40 82 FF F4 */ bne lbl_80003558
/* 80003568 4E 80 00 20 */ blr
lbl_8000356C:
/* 8000356C 7C 84 2A 14 */ add r4, r4, r5
/* 80003570 7C C3 2A 14 */ add r6, r3, r5
/* 80003574 38 A5 00 01 */ addi r5, r5, 1
/* 80003578 48 00 00 0C */ b lbl_80003584
lbl_8000357C:
/* 8000357C 8C 04 FF FF */ lbzu r0, -1(r4)
/* 80003580 9C 06 FF FF */ stbu r0, -1(r6)
lbl_80003584:
/* 80003584 34 A5 FF FF */ addic. r5, r5, -1
/* 80003588 40 82 FF F4 */ bne lbl_8000357C
/* 8000358C 4E 80 00 20 */ blr
asm/init/memset.s
-13
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@@ -1,13 +0,0 @@
lbl_80003458:
/* 80003458 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8000345C 7C 08 02 A6 */ mflr r0
/* 80003460 90 01 00 14 */ stw r0, 0x14(r1)
/* 80003464 93 E1 00 0C */ stw r31, 0xc(r1)
/* 80003468 7C 7F 1B 78 */ mr r31, r3
/* 8000346C 48 00 00 1D */ bl __fill_mem
/* 80003470 80 01 00 14 */ lwz r0, 0x14(r1)
/* 80003474 7F E3 FB 78 */ mr r3, r31
/* 80003478 83 E1 00 0C */ lwz r31, 0xc(r1)
/* 8000347C 7C 08 03 A6 */ mtlr r0
/* 80003480 38 21 00 10 */ addi r1, r1, 0x10
/* 80003484 4E 80 00 20 */ blr