mirror/tp
1
0
Fork 0
mirror of https://github.com/zeldaret/tp synced 2026-07-01 20:20:21 -04:00
Code Issues Packages Projects Releases Wiki Activity

fapGm_After OK, split f_op_scene_mng, split f_op_camera_mng, split f_op_overlap_mng

Browse Source
This commit is contained in:
Pheenoh
2021-02-13 15:42:35 -05:00
parent 304cae803a
commit 86a69bbb4b
35 changed files with 588 additions and 402 deletions
Download Patch File Download Diff File Expand all files Collapse all files
include/f/f_op/f_op_camera_mng.h
+6
View File
@@ -0,0 +1,6 @@
#ifndef F_F_OP_CAMERA_MNG_H_
#define F_F_OP_CAMERA_MNG_H_
void fopCamM_Management(void);
#endif
include/f/f_op/f_op_overlap_mng.h
+6
View File
@@ -0,0 +1,6 @@
#ifndef F_F_OP_OVERLAP_MNG_H_
#define F_F_OP_OVERLAP_MNG_H_
void fopOvlpM_Management(void);
#endif
include/f/f_op/f_op_scene_mng.h
+5
View File
@@ -0,0 +1,5 @@
#ifndef F_F_OP_SCENE_MNG_H_
#define F_F_OP_SCENE_MNG_H_
void fopScnM_Management(void);
#endif
include/f/f_op_camera_mng/asm/func_8001E308.s
+2
View File
@@ -0,0 +1,2 @@
/* 8001E308 0001B248 80 63 00 B0 */ lwz r3, 0xb0(r3)
/* 8001E30C 0001B24C 4E 80 00 20 */ blr
include/f/f_op_camera_mng/asm/func_8001E310.s
+25
View File
@@ -0,0 +1,25 @@
/* 8001E310 0001B250 94 21 FF E0 */ stwu r1, -0x20(r1)
/* 8001E314 0001B254 7C 08 02 A6 */ mflr r0
/* 8001E318 0001B258 90 01 00 24 */ stw r0, 0x24(r1)
/* 8001E31C 0001B25C 39 61 00 20 */ addi r11, r1, 0x20
/* 8001E320 0001B260 48 34 3E BD */ bl _savegpr_29
/* 8001E324 0001B264 7C 7D 1B 78 */ mr r29, r3
/* 8001E328 0001B268 7C 9E 23 78 */ mr r30, r4
/* 8001E32C 0001B26C 7C BF 2B 78 */ mr r31, r5
/* 8001E330 0001B270 48 00 33 C5 */ bl fpcLy_CurrentLayer
/* 8001E334 0001B274 7F C4 F3 78 */ mr r4, r30
/* 8001E338 0001B278 38 A0 00 00 */ li r5, 0
/* 8001E33C 0001B27C 38 C0 00 00 */ li r6, 0
/* 8001E340 0001B280 7F E7 FB 78 */ mr r7, r31
/* 8001E344 0001B284 48 00 5A 51 */ bl fpcSCtRq_Request
/* 8001E348 0001B288 57 A0 10 3A */ slwi r0, r29, 2
/* 8001E34C 0001B28C 3C 80 80 3F */ lis r4, lbl_803F1DD8@ha
/* 8001E350 0001B290 38 84 1D D8 */ addi r4, r4, lbl_803F1DD8@l
/* 8001E354 0001B294 7C 64 01 2E */ stwx r3, r4, r0
/* 8001E358 0001B298 7C 64 00 2E */ lwzx r3, r4, r0
/* 8001E35C 0001B29C 39 61 00 20 */ addi r11, r1, 0x20
/* 8001E360 0001B2A0 48 34 3E C9 */ bl _restgpr_29
/* 8001E364 0001B2A4 80 01 00 24 */ lwz r0, 0x24(r1)
/* 8001E368 0001B2A8 7C 08 03 A6 */ mtlr r0
/* 8001E36C 0001B2AC 38 21 00 20 */ addi r1, r1, 0x20
/* 8001E370 0001B2B0 4E 80 00 20 */ blr
include/f/f_op_camera_mng/asm/func_8001E374.s
+1
View File
@@ -0,0 +1 @@
/* 8001E374 0001B2B4 4E 80 00 20 */ blr
include/f/f_op_camera_mng/asm/func_8001E378.s
+1
View File
@@ -0,0 +1 @@
/* 8001E378 0001B2B8 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E484.s
+18
View File
@@ -0,0 +1,18 @@
/* 8001E484 0001B3C4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E488 0001B3C8 7C 08 02 A6 */ mflr r0
/* 8001E48C 0001B3CC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E490 0001B3D0 80 6D 80 30 */ lwz r3, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E494 0001B3D4 28 03 00 00 */ cmplwi r3, 0
/* 8001E498 0001B3D8 41 82 00 18 */ beq lbl_8001E4B0
/* 8001E49C 0001B3DC 80 63 00 20 */ lwz r3, 0x20(r3)
/* 8001E4A0 0001B3E0 80 63 00 C8 */ lwz r3, 0xc8(r3)
/* 8001E4A4 0001B3E4 48 00 2E B5 */ bl fpcEx_SearchByID
/* 8001E4A8 0001B3E8 48 00 20 A1 */ bl fopScnPause_Enable
/* 8001E4AC 0001B3EC 48 00 00 08 */ b lbl_8001E4B4
lbl_8001E4B0:
/* 8001E4B0 0001B3F0 38 60 00 00 */ li r3, 0
lbl_8001E4B4:
/* 8001E4B4 0001B3F4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E4B8 0001B3F8 7C 08 03 A6 */ mtlr r0
/* 8001E4BC 0001B3FC 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E4C0 0001B400 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E4C4.s
+18
View File
@@ -0,0 +1,18 @@
/* 8001E4C4 0001B404 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E4C8 0001B408 7C 08 02 A6 */ mflr r0
/* 8001E4CC 0001B40C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E4D0 0001B410 80 6D 80 30 */ lwz r3, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E4D4 0001B414 28 03 00 00 */ cmplwi r3, 0
/* 8001E4D8 0001B418 41 82 00 18 */ beq lbl_8001E4F0
/* 8001E4DC 0001B41C 80 63 00 20 */ lwz r3, 0x20(r3)
/* 8001E4E0 0001B420 80 63 00 C8 */ lwz r3, 0xc8(r3)
/* 8001E4E4 0001B424 48 00 2E 75 */ bl fpcEx_SearchByID
/* 8001E4E8 0001B428 48 00 20 AD */ bl fopScnPause_Disable
/* 8001E4EC 0001B42C 48 00 00 08 */ b lbl_8001E4F4
lbl_8001E4F0:
/* 8001E4F0 0001B430 38 60 00 00 */ li r3, 0
lbl_8001E4F4:
/* 8001E4F4 0001B434 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E4F8 0001B438 7C 08 03 A6 */ mtlr r0
/* 8001E4FC 0001B43C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E500 0001B440 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E504.s
+6
View File
@@ -0,0 +1,6 @@
/* 8001E504 0001B444 88 03 00 C4 */ lbz r0, 0xc4(r3)
/* 8001E508 0001B448 54 00 06 BE */ clrlwi r0, r0, 0x1a
/* 8001E50C 0001B44C 20 00 00 02 */ subfic r0, r0, 2
/* 8001E510 0001B450 7C 00 00 34 */ cntlzw r0, r0
/* 8001E514 0001B454 54 03 DE 3E */ rlwinm r3, r0, 0x1b, 0x18, 0x1f
/* 8001E518 0001B458 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E51C.s
+9
View File
@@ -0,0 +1,9 @@
/* 8001E51C 0001B45C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E520 0001B460 7C 08 02 A6 */ mflr r0
/* 8001E524 0001B464 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E528 0001B468 38 63 00 C4 */ addi r3, r3, 0xc4
/* 8001E52C 0001B46C 48 24 82 D5 */ bl cReq_Done__FP18request_base_class
/* 8001E530 0001B470 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E534 0001B474 7C 08 03 A6 */ mtlr r0
/* 8001E538 0001B478 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E53C 0001B47C 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E540.s
+6
View File
@@ -0,0 +1,6 @@
/* 8001E540 0001B480 80 8D 80 30 */ lwz r4, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E544 0001B484 28 04 00 00 */ cmplwi r4, 0
/* 8001E548 0001B488 4D 82 00 20 */ beqlr
/* 8001E54C 0001B48C 80 84 00 20 */ lwz r4, 0x20(r4)
/* 8001E550 0001B490 90 64 00 C8 */ stw r3, 0xc8(r4)
/* 8001E554 0001B494 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E558.s
+8
View File
@@ -0,0 +1,8 @@
/* 8001E558 0001B498 80 6D 80 30 */ lwz r3, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E55C 0001B49C 28 03 00 00 */ cmplwi r3, 0
/* 8001E560 0001B4A0 41 82 00 0C */ beq lbl_8001E56C
/* 8001E564 0001B4A4 80 63 00 08 */ lwz r3, 8(r3)
/* 8001E568 0001B4A8 4E 80 00 20 */ blr
lbl_8001E56C:
/* 8001E56C 0001B4AC 38 60 00 00 */ li r3, 0
/* 8001E570 0001B4B0 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E574.s
+15
View File
@@ -0,0 +1,15 @@
/* 8001E574 0001B4B4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E578 0001B4B8 7C 08 02 A6 */ mflr r0
/* 8001E57C 0001B4BC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E580 0001B4C0 80 6D 80 30 */ lwz r3, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E584 0001B4C4 28 03 00 00 */ cmplwi r3, 0
/* 8001E588 0001B4C8 41 82 00 0C */ beq lbl_8001E594
/* 8001E58C 0001B4CC 48 24 82 49 */ bl cReq_Is_Done__FP18request_base_class
/* 8001E590 0001B4D0 48 00 00 08 */ b lbl_8001E598
lbl_8001E594:
/* 8001E594 0001B4D4 38 60 00 00 */ li r3, 0
lbl_8001E598:
/* 8001E598 0001B4D8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E59C 0001B4DC 7C 08 03 A6 */ mtlr r0
/* 8001E5A0 0001B4E0 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E5A4 0001B4E4 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E5A8.s
+11
View File
@@ -0,0 +1,11 @@
/* 8001E5A8 0001B4E8 80 6D 80 30 */ lwz r3, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E5AC 0001B4EC 28 03 00 00 */ cmplwi r3, 0
/* 8001E5B0 0001B4F0 41 82 00 18 */ beq lbl_8001E5C8
/* 8001E5B4 0001B4F4 A0 03 00 04 */ lhz r0, 4(r3)
/* 8001E5B8 0001B4F8 28 00 00 01 */ cmplwi r0, 1
/* 8001E5BC 0001B4FC 40 82 00 0C */ bne lbl_8001E5C8
/* 8001E5C0 0001B500 38 60 00 01 */ li r3, 1
/* 8001E5C4 0001B504 4E 80 00 20 */ blr
lbl_8001E5C8:
/* 8001E5C8 0001B508 38 60 00 00 */ li r3, 0
/* 8001E5CC 0001B50C 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E5D0.s
+15
View File
@@ -0,0 +1,15 @@
/* 8001E5D0 0001B510 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E5D4 0001B514 7C 08 02 A6 */ mflr r0
/* 8001E5D8 0001B518 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E5DC 0001B51C 80 6D 80 30 */ lwz r3, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E5E0 0001B520 28 03 00 00 */ cmplwi r3, 0
/* 8001E5E4 0001B524 41 82 00 0C */ beq lbl_8001E5F0
/* 8001E5E8 0001B528 48 00 04 F1 */ bl fopOvlpReq_OverlapClr
/* 8001E5EC 0001B52C 48 00 00 08 */ b lbl_8001E5F4
lbl_8001E5F0:
/* 8001E5F0 0001B530 38 60 00 00 */ li r3, 0
lbl_8001E5F4:
/* 8001E5F4 0001B534 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E5F8 0001B538 7C 08 03 A6 */ mtlr r0
/* 8001E5FC 0001B53C 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E600 0001B540 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E604.s
+21
View File
@@ -0,0 +1,21 @@
/* 8001E604 0001B544 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E608 0001B548 7C 08 02 A6 */ mflr r0
/* 8001E60C 0001B54C 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E610 0001B550 7C 66 1B 78 */ mr r6, r3
/* 8001E614 0001B554 7C 85 23 78 */ mr r5, r4
/* 8001E618 0001B558 80 0D 80 30 */ lwz r0, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E61C 0001B55C 28 00 00 00 */ cmplwi r0, 0
/* 8001E620 0001B560 40 82 00 1C */ bne lbl_8001E63C
/* 8001E624 0001B564 3C 60 80 3F */ lis r3, lbl_803F1DE8@ha
/* 8001E628 0001B568 38 63 1D E8 */ addi r3, r3, lbl_803F1DE8@l
/* 8001E62C 0001B56C 7C C4 33 78 */ mr r4, r6
/* 8001E630 0001B570 48 00 03 25 */ bl fopOvlpReq_Request
/* 8001E634 0001B574 90 6D 80 30 */ stw r3, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E638 0001B578 48 00 00 08 */ b lbl_8001E640
lbl_8001E63C:
/* 8001E63C 0001B57C 38 60 00 00 */ li r3, 0
lbl_8001E640:
/* 8001E640 0001B580 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E644 0001B584 7C 08 03 A6 */ mtlr r0
/* 8001E648 0001B588 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E64C 0001B58C 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E650.s
+20
View File
@@ -0,0 +1,20 @@
/* 8001E650 0001B590 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E654 0001B594 7C 08 02 A6 */ mflr r0
/* 8001E658 0001B598 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E65C 0001B59C 80 6D 80 30 */ lwz r3, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E660 0001B5A0 28 03 00 00 */ cmplwi r3, 0
/* 8001E664 0001B5A4 41 82 00 24 */ beq lbl_8001E688
/* 8001E668 0001B5A8 48 00 03 89 */ bl fopOvlpReq_Handler
/* 8001E66C 0001B5AC 2C 03 00 06 */ cmpwi r3, 6
/* 8001E670 0001B5B0 40 80 00 18 */ bge lbl_8001E688
/* 8001E674 0001B5B4 2C 03 00 03 */ cmpwi r3, 3
/* 8001E678 0001B5B8 40 80 00 08 */ bge lbl_8001E680
/* 8001E67C 0001B5BC 48 00 00 0C */ b lbl_8001E688
lbl_8001E680:
/* 8001E680 0001B5C0 38 00 00 00 */ li r0, 0
/* 8001E684 0001B5C4 90 0D 80 30 */ stw r0, lbl_804505B0-_SDA_BASE_(r13)
lbl_8001E688:
/* 8001E688 0001B5C8 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E68C 0001B5CC 7C 08 03 A6 */ mtlr r0
/* 8001E690 0001B5D0 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E694 0001B5D4 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E698.s
+23
View File
@@ -0,0 +1,23 @@
/* 8001E698 0001B5D8 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001E69C 0001B5DC 7C 08 02 A6 */ mflr r0
/* 8001E6A0 0001B5E0 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001E6A4 0001B5E4 80 6D 80 30 */ lwz r3, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E6A8 0001B5E8 28 03 00 00 */ cmplwi r3, 0
/* 8001E6AC 0001B5EC 40 82 00 0C */ bne lbl_8001E6B8
/* 8001E6B0 0001B5F0 38 60 00 01 */ li r3, 1
/* 8001E6B4 0001B5F4 48 00 00 24 */ b lbl_8001E6D8
lbl_8001E6B8:
/* 8001E6B8 0001B5F8 48 00 03 D1 */ bl fopOvlpReq_Cancel
/* 8001E6BC 0001B5FC 2C 03 00 01 */ cmpwi r3, 1
/* 8001E6C0 0001B600 40 82 00 14 */ bne lbl_8001E6D4
/* 8001E6C4 0001B604 38 00 00 00 */ li r0, 0
/* 8001E6C8 0001B608 90 0D 80 30 */ stw r0, lbl_804505B0-_SDA_BASE_(r13)
/* 8001E6CC 0001B60C 38 60 00 01 */ li r3, 1
/* 8001E6D0 0001B610 48 00 00 08 */ b lbl_8001E6D8
lbl_8001E6D4:
/* 8001E6D4 0001B614 38 60 00 00 */ li r3, 0
lbl_8001E6D8:
/* 8001E6D8 0001B618 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001E6DC 0001B61C 7C 08 03 A6 */ mtlr r0
/* 8001E6E0 0001B620 38 21 00 10 */ addi r1, r1, 0x10
/* 8001E6E4 0001B624 4E 80 00 20 */ blr
include/f/f_op_overlap_mng/asm/func_8001E6E8.s
+1
View File
@@ -0,0 +1 @@
/* 8001E6E8 0001B628 4E 80 00 20 */ blr
include/f/f_op_scene_mng/asm/func_8001ECB0.s
+14
View File
@@ -0,0 +1,14 @@
/* 8001ECB0 0001BBF0 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001ECB4 0001BBF4 7C 08 02 A6 */ mflr r0
/* 8001ECB8 0001BBF8 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001ECBC 0001BBFC 90 61 00 08 */ stw r3, 8(r1)
/*.global fpcSch_JudgeByID*/
/* 8001ECC0 0001BC00 3C 60 80 02 */ lis r3, fpcSch_JudgeByID@ha
/*.global fpcSch_JudgeByID*/
/* 8001ECC4 0001BC04 38 63 35 90 */ addi r3, r3, fpcSch_JudgeByID@l
/* 8001ECC8 0001BC08 38 81 00 08 */ addi r4, r1, 8
/* 8001ECCC 0001BC0C 4B FF FF A9 */ bl fopScnIt_Judge
/* 8001ECD0 0001BC10 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001ECD4 0001BC14 7C 08 03 A6 */ mtlr r0
/* 8001ECD8 0001BC18 38 21 00 10 */ addi r1, r1, 0x10
/* 8001ECDC 0001BC1C 4E 80 00 20 */ blr
include/f/f_op_scene_mng/asm/func_8001ECE0.s
+25
View File
@@ -0,0 +1,25 @@
/* 8001ECE0 0001BC20 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001ECE4 0001BC24 7C 08 02 A6 */ mflr r0
/* 8001ECE8 0001BC28 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001ECEC 0001BC2C 7C 69 1B 78 */ mr r9, r3
/* 8001ECF0 0001BC30 7C 80 23 78 */ mr r0, r4
/* 8001ECF4 0001BC34 7C A7 2B 78 */ mr r7, r5
/* 8001ECF8 0001BC38 7C C8 33 78 */ mr r8, r6
/* 8001ECFC 0001BC3C 38 60 00 02 */ li r3, 2
/* 8001ED00 0001BC40 7D 24 4B 78 */ mr r4, r9
/* 8001ED04 0001BC44 7C 05 03 78 */ mr r5, r0
/* 8001ED08 0001BC48 38 C0 00 00 */ li r6, 0
/* 8001ED0C 0001BC4C 48 00 03 29 */ bl fopScnRq_Request
/* 8001ED10 0001BC50 3C 03 00 01 */ addis r0, r3, 1
/* 8001ED14 0001BC54 28 00 FF FF */ cmplwi r0, 0xffff
/* 8001ED18 0001BC58 40 82 00 0C */ bne lbl_8001ED24
/* 8001ED1C 0001BC5C 38 60 00 00 */ li r3, 0
/* 8001ED20 0001BC60 48 00 00 0C */ b lbl_8001ED2C
lbl_8001ED24:
/* 8001ED24 0001BC64 90 6D 80 38 */ stw r3, lbl_804505B8-_SDA_BASE_(r13)
/* 8001ED28 0001BC68 38 60 00 01 */ li r3, 1
lbl_8001ED2C:
/* 8001ED2C 0001BC6C 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001ED30 0001BC70 7C 08 03 A6 */ mtlr r0
/* 8001ED34 0001BC74 38 21 00 10 */ addi r1, r1, 0x10
/* 8001ED38 0001BC78 4E 80 00 20 */ blr
include/f/f_op_scene_mng/asm/func_8001ED3C.s
+18
View File
@@ -0,0 +1,18 @@
/* 8001ED3C 0001BC7C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001ED40 0001BC80 7C 08 02 A6 */ mflr r0
/* 8001ED44 0001BC84 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001ED48 0001BC88 7C 64 1B 78 */ mr r4, r3
/* 8001ED4C 0001BC8C 38 60 00 01 */ li r3, 1
/* 8001ED50 0001BC90 38 A0 7F FF */ li r5, 0x7fff
/* 8001ED54 0001BC94 38 C0 00 00 */ li r6, 0
/* 8001ED58 0001BC98 38 E0 7F FF */ li r7, 0x7fff
/* 8001ED5C 0001BC9C 39 00 00 00 */ li r8, 0
/* 8001ED60 0001BCA0 48 00 02 D5 */ bl fopScnRq_Request
/* 8001ED64 0001BCA4 20 63 FF FF */ subfic r3, r3, -1
/* 8001ED68 0001BCA8 30 03 FF FF */ addic r0, r3, -1
/* 8001ED6C 0001BCAC 7C 00 19 10 */ subfe r0, r0, r3
/* 8001ED70 0001BCB0 54 03 06 3E */ clrlwi r3, r0, 0x18
/* 8001ED74 0001BCB4 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001ED78 0001BCB8 7C 08 03 A6 */ mtlr r0
/* 8001ED7C 0001BCBC 38 21 00 10 */ addi r1, r1, 0x10
/* 8001ED80 0001BCC0 4E 80 00 20 */ blr
include/f/f_op_scene_mng/asm/func_8001ED84.s
+18
View File
@@ -0,0 +1,18 @@
/* 8001ED84 0001BCC4 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001ED88 0001BCC8 7C 08 02 A6 */ mflr r0
/* 8001ED8C 0001BCCC 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001ED90 0001BCD0 7C 60 1B 78 */ mr r0, r3
/* 8001ED94 0001BCD4 7C 87 23 78 */ mr r7, r4
/* 8001ED98 0001BCD8 7C A8 2B 78 */ mr r8, r5
/* 8001ED9C 0001BCDC 38 60 00 00 */ li r3, 0
/* 8001EDA0 0001BCE0 38 80 00 00 */ li r4, 0
/* 8001EDA4 0001BCE4 7C 05 03 78 */ mr r5, r0
/* 8001EDA8 0001BCE8 48 00 02 8D */ bl fopScnRq_Request
/* 8001EDAC 0001BCEC 20 63 FF FF */ subfic r3, r3, -1
/* 8001EDB0 0001BCF0 30 03 FF FF */ addic r0, r3, -1
/* 8001EDB4 0001BCF4 7C 00 19 10 */ subfe r0, r0, r3
/* 8001EDB8 0001BCF8 54 03 06 3E */ clrlwi r3, r0, 0x18
/* 8001EDBC 0001BCFC 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EDC0 0001BD00 7C 08 03 A6 */ mtlr r0
/* 8001EDC4 0001BD04 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EDC8 0001BD08 4E 80 00 20 */ blr
include/f/f_op_scene_mng/asm/func_8001EDCC.s
+19
View File
@@ -0,0 +1,19 @@
/* 8001EDCC 0001BD0C 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EDD0 0001BD10 7C 08 02 A6 */ mflr r0
/* 8001EDD4 0001BD14 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EDD8 0001BD18 7C 66 1B 78 */ mr r6, r3
/* 8001EDDC 0001BD1C 7C 85 23 78 */ mr r5, r4
/* 8001EDE0 0001BD20 80 6D 80 38 */ lwz r3, lbl_804505B8-_SDA_BASE_(r13)
/* 8001EDE4 0001BD24 3C 03 00 01 */ addis r0, r3, 1
/* 8001EDE8 0001BD28 28 00 FF FF */ cmplwi r0, 0xffff
/* 8001EDEC 0001BD2C 40 82 00 0C */ bne lbl_8001EDF8
/* 8001EDF0 0001BD30 38 60 00 00 */ li r3, 0
/* 8001EDF4 0001BD34 48 00 00 0C */ b lbl_8001EE00
lbl_8001EDF8:
/* 8001EDF8 0001BD38 7C C4 33 78 */ mr r4, r6
/* 8001EDFC 0001BD3C 48 00 03 01 */ bl fopScnRq_ReRequest
lbl_8001EE00:
/* 8001EE00 0001BD40 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EE04 0001BD44 7C 08 03 A6 */ mtlr r0
/* 8001EE08 0001BD48 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EE0C 0001BD4C 4E 80 00 20 */ blr
include/f/f_op_scene_mng/asm/func_8001EE10.s
+8
View File
@@ -0,0 +1,8 @@
/* 8001EE10 0001BD50 94 21 FF F0 */ stwu r1, -0x10(r1)
/* 8001EE14 0001BD54 7C 08 02 A6 */ mflr r0
/* 8001EE18 0001BD58 90 01 00 14 */ stw r0, 0x14(r1)
/* 8001EE1C 0001BD5C 48 00 03 01 */ bl fopScnRq_Handler
/* 8001EE20 0001BD60 80 01 00 14 */ lwz r0, 0x14(r1)
/* 8001EE24 0001BD64 7C 08 03 A6 */ mtlr r0
/* 8001EE28 0001BD68 38 21 00 10 */ addi r1, r1, 0x10
/* 8001EE2C 0001BD6C 4E 80 00 20 */ blr
include/f/f_op_scene_mng/asm/func_8001EE30.s
+1
View File
@@ -0,0 +1 @@
/* 8001EE30 0001BD70 4E 80 00 20 */ blr