diff --git a/asm/f/op/overlap/f_op_overlap_req.s b/asm/f/op/overlap/f_op_overlap_req.s
deleted file mode 100644
index cc0fada7ca..0000000000
--- a/asm/f/op/overlap/f_op_overlap_req.s
+++ /dev/null
@@ -1,324 +0,0 @@
-.include "macros.inc"
-
-.section .text, "ax" # 8001e6ec
-
-
-.global fopOvlpReq_phase_Done
-fopOvlpReq_phase_Done:
-/* 8001E6EC 0001B62C  94 21 FF F0 */	stwu r1, -0x10(r1)
-/* 8001E6F0 0001B630  7C 08 02 A6 */	mflr r0
-/* 8001E6F4 0001B634  90 01 00 14 */	stw r0, 0x14(r1)
-/* 8001E6F8 0001B638  93 E1 00 0C */	stw r31, 0xc(r1)
-/* 8001E6FC 0001B63C  7C 7F 1B 78 */	mr r31, r3
-/* 8001E700 0001B640  80 63 00 20 */	lwz r3, 0x20(r3)
-/* 8001E704 0001B644  48 00 3A 15 */	bl fpcM_Delete
-/* 8001E708 0001B648  2C 03 00 01 */	cmpwi r3, 1
-/* 8001E70C 0001B64C  40 82 00 24 */	bne lbl_8001E730
-/* 8001E710 0001B650  38 00 00 00 */	li r0, 0
-/* 8001E714 0001B654  90 1F 00 20 */	stw r0, 0x20(r31)
-/* 8001E718 0001B658  B0 1F 00 04 */	sth r0, 4(r31)
-/* 8001E71C 0001B65C  B0 1F 00 06 */	sth r0, 6(r31)
-/* 8001E720 0001B660  90 1F 00 08 */	stw r0, 8(r31)
-/* 8001E724 0001B664  90 1F 00 0C */	stw r0, 0xc(r31)
-/* 8001E728 0001B668  38 60 00 02 */	li r3, 2
-/* 8001E72C 0001B66C  48 00 00 08 */	b lbl_8001E734
-lbl_8001E730:
-/* 8001E730 0001B670  38 60 00 00 */	li r3, 0
-lbl_8001E734:
-/* 8001E734 0001B674  83 E1 00 0C */	lwz r31, 0xc(r1)
-/* 8001E738 0001B678  80 01 00 14 */	lwz r0, 0x14(r1)
-/* 8001E73C 0001B67C  7C 08 03 A6 */	mtlr r0
-/* 8001E740 0001B680  38 21 00 10 */	addi r1, r1, 0x10
-/* 8001E744 0001B684  4E 80 00 20 */	blr 
-/* 8001E748 0001B688  94 21 FF F0 */	stwu r1, -0x10(r1)
-/* 8001E74C 0001B68C  7C 08 02 A6 */	mflr r0
-/* 8001E750 0001B690  90 01 00 14 */	stw r0, 0x14(r1)
-/* 8001E754 0001B694  93 E1 00 0C */	stw r31, 0xc(r1)
-/* 8001E758 0001B698  7C 7F 1B 78 */	mr r31, r3
-/* 8001E75C 0001B69C  48 24 80 A5 */	bl cReq_Done__FP18request_base_class
-/* 8001E760 0001B6A0  A8 7F 00 02 */	lha r3, 2(r31)
-/* 8001E764 0001B6A4  38 03 FF FF */	addi r0, r3, -1
-/* 8001E768 0001B6A8  B0 1F 00 02 */	sth r0, 2(r31)
-/* 8001E76C 0001B6AC  7C 03 00 D0 */	neg r0, r3
-/* 8001E770 0001B6B0  7C 60 03 38 */	orc r0, r3, r0
-/* 8001E774 0001B6B4  7C 03 FE 70 */	srawi r3, r0, 0x1f
-/* 8001E778 0001B6B8  38 00 00 02 */	li r0, 2
-/* 8001E77C 0001B6BC  7C 03 18 38 */	and r3, r0, r3
-/* 8001E780 0001B6C0  83 E1 00 0C */	lwz r31, 0xc(r1)
-/* 8001E784 0001B6C4  80 01 00 14 */	lwz r0, 0x14(r1)
-/* 8001E788 0001B6C8  7C 08 03 A6 */	mtlr r0
-/* 8001E78C 0001B6CC  38 21 00 10 */	addi r1, r1, 0x10
-/* 8001E790 0001B6D0  4E 80 00 20 */	blr 
-/* 8001E794 0001B6D4  94 21 FF F0 */	stwu r1, -0x10(r1)
-/* 8001E798 0001B6D8  7C 08 02 A6 */	mflr r0
-/* 8001E79C 0001B6DC  90 01 00 14 */	stw r0, 0x14(r1)
-/* 8001E7A0 0001B6E0  93 E1 00 0C */	stw r31, 0xc(r1)
-/* 8001E7A4 0001B6E4  7C 7F 1B 78 */	mr r31, r3
-/* 8001E7A8 0001B6E8  80 63 00 20 */	lwz r3, 0x20(r3)
-/* 8001E7AC 0001B6EC  38 63 00 C4 */	addi r3, r3, 0xc4
-/* 8001E7B0 0001B6F0  48 24 80 25 */	bl cReq_Is_Done__FP18request_base_class
-/* 8001E7B4 0001B6F4  2C 03 00 00 */	cmpwi r3, 0
-/* 8001E7B8 0001B6F8  41 82 00 14 */	beq lbl_8001E7CC
-/* 8001E7BC 0001B6FC  38 00 00 00 */	li r0, 0
-/* 8001E7C0 0001B700  90 1F 00 08 */	stw r0, 8(r31)
-/* 8001E7C4 0001B704  38 60 00 02 */	li r3, 2
-/* 8001E7C8 0001B708  48 00 00 08 */	b lbl_8001E7D0
-lbl_8001E7CC:
-/* 8001E7CC 0001B70C  38 60 00 00 */	li r3, 0
-lbl_8001E7D0:
-/* 8001E7D0 0001B710  83 E1 00 0C */	lwz r31, 0xc(r1)
-/* 8001E7D4 0001B714  80 01 00 14 */	lwz r0, 0x14(r1)
-/* 8001E7D8 0001B718  7C 08 03 A6 */	mtlr r0
-/* 8001E7DC 0001B71C  38 21 00 10 */	addi r1, r1, 0x10
-/* 8001E7E0 0001B720  4E 80 00 20 */	blr 
-/* 8001E7E4 0001B724  94 21 FF F0 */	stwu r1, -0x10(r1)
-/* 8001E7E8 0001B728  7C 08 02 A6 */	mflr r0
-/* 8001E7EC 0001B72C  90 01 00 14 */	stw r0, 0x14(r1)
-/* 8001E7F0 0001B730  A0 83 00 06 */	lhz r4, 6(r3)
-/* 8001E7F4 0001B734  28 04 00 00 */	cmplwi r4, 0
-/* 8001E7F8 0001B738  41 82 00 0C */	beq lbl_8001E804
-/* 8001E7FC 0001B73C  38 04 FF FF */	addi r0, r4, -1
-/* 8001E800 0001B740  B0 03 00 06 */	sth r0, 6(r3)
-lbl_8001E804:
-/* 8001E804 0001B744  88 03 00 00 */	lbz r0, 0(r3)
-/* 8001E808 0001B748  54 00 06 BE */	clrlwi r0, r0, 0x1a
-/* 8001E80C 0001B74C  28 00 00 02 */	cmplwi r0, 2
-/* 8001E810 0001B750  40 82 00 28 */	bne lbl_8001E838
-/* 8001E814 0001B754  A0 03 00 06 */	lhz r0, 6(r3)
-/* 8001E818 0001B758  28 00 00 00 */	cmplwi r0, 0
-/* 8001E81C 0001B75C  40 82 00 1C */	bne lbl_8001E838
-/* 8001E820 0001B760  80 63 00 20 */	lwz r3, 0x20(r3)
-/* 8001E824 0001B764  38 63 00 C4 */	addi r3, r3, 0xc4
-/* 8001E828 0001B768  38 80 00 02 */	li r4, 2
-/* 8001E82C 0001B76C  48 24 80 05 */	bl cReq_Command__FP18request_base_classUc
-/* 8001E830 0001B770  38 60 00 02 */	li r3, 2
-/* 8001E834 0001B774  48 00 00 10 */	b lbl_8001E844
-lbl_8001E838:
-/* 8001E838 0001B778  38 00 00 01 */	li r0, 1
-/* 8001E83C 0001B77C  90 03 00 08 */	stw r0, 8(r3)
-/* 8001E840 0001B780  38 60 00 00 */	li r3, 0
-lbl_8001E844:
-/* 8001E844 0001B784  80 01 00 14 */	lwz r0, 0x14(r1)
-/* 8001E848 0001B788  7C 08 03 A6 */	mtlr r0
-/* 8001E84C 0001B78C  38 21 00 10 */	addi r1, r1, 0x10
-/* 8001E850 0001B790  4E 80 00 20 */	blr 
-/* 8001E854 0001B794  94 21 FF F0 */	stwu r1, -0x10(r1)
-/* 8001E858 0001B798  7C 08 02 A6 */	mflr r0
-/* 8001E85C 0001B79C  90 01 00 14 */	stw r0, 0x14(r1)
-/* 8001E860 0001B7A0  93 E1 00 0C */	stw r31, 0xc(r1)
-/* 8001E864 0001B7A4  7C 7F 1B 78 */	mr r31, r3
-/* 8001E868 0001B7A8  80 63 00 20 */	lwz r3, 0x20(r3)
-/* 8001E86C 0001B7AC  38 63 00 C4 */	addi r3, r3, 0xc4
-/* 8001E870 0001B7B0  48 24 7F 65 */	bl cReq_Is_Done__FP18request_base_class
-/* 8001E874 0001B7B4  2C 03 00 00 */	cmpwi r3, 0
-/* 8001E878 0001B7B8  41 82 00 14 */	beq lbl_8001E88C
-/* 8001E87C 0001B7BC  7F E3 FB 78 */	mr r3, r31
-/* 8001E880 0001B7C0  48 24 7F 81 */	bl cReq_Done__FP18request_base_class
-/* 8001E884 0001B7C4  38 60 00 02 */	li r3, 2
-/* 8001E888 0001B7C8  48 00 00 08 */	b lbl_8001E890
-lbl_8001E88C:
-/* 8001E88C 0001B7CC  38 60 00 00 */	li r3, 0
-lbl_8001E890:
-/* 8001E890 0001B7D0  83 E1 00 0C */	lwz r31, 0xc(r1)
-/* 8001E894 0001B7D4  80 01 00 14 */	lwz r0, 0x14(r1)
-/* 8001E898 0001B7D8  7C 08 03 A6 */	mtlr r0
-/* 8001E89C 0001B7DC  38 21 00 10 */	addi r1, r1, 0x10
-/* 8001E8A0 0001B7E0  4E 80 00 20 */	blr 
-/* 8001E8A4 0001B7E4  94 21 FF F0 */	stwu r1, -0x10(r1)
-/* 8001E8A8 0001B7E8  7C 08 02 A6 */	mflr r0
-/* 8001E8AC 0001B7EC  90 01 00 14 */	stw r0, 0x14(r1)
-/* 8001E8B0 0001B7F0  93 E1 00 0C */	stw r31, 0xc(r1)
-/* 8001E8B4 0001B7F4  7C 7F 1B 78 */	mr r31, r3
-/* 8001E8B8 0001B7F8  80 63 00 14 */	lwz r3, 0x14(r3)
-/* 8001E8BC 0001B7FC  48 00 38 7D */	bl fpcM_IsCreating
-/* 8001E8C0 0001B800  2C 03 00 00 */	cmpwi r3, 0
-/* 8001E8C4 0001B804  40 82 00 28 */	bne lbl_8001E8EC
-/* 8001E8C8 0001B808  80 7F 00 14 */	lwz r3, 0x14(r31)
-/* 8001E8CC 0001B80C  48 00 2A 8D */	bl fpcEx_SearchByID
-/* 8001E8D0 0001B810  28 03 00 00 */	cmplwi r3, 0
-/* 8001E8D4 0001B814  40 82 00 0C */	bne lbl_8001E8E0
-/* 8001E8D8 0001B818  38 60 00 05 */	li r3, 5
-/* 8001E8DC 0001B81C  48 00 00 14 */	b lbl_8001E8F0
-lbl_8001E8E0:
-/* 8001E8E0 0001B820  90 7F 00 20 */	stw r3, 0x20(r31)
-/* 8001E8E4 0001B824  38 60 00 02 */	li r3, 2
-/* 8001E8E8 0001B828  48 00 00 08 */	b lbl_8001E8F0
-lbl_8001E8EC:
-/* 8001E8EC 0001B82C  38 60 00 00 */	li r3, 0
-lbl_8001E8F0:
-/* 8001E8F0 0001B830  83 E1 00 0C */	lwz r31, 0xc(r1)
-/* 8001E8F4 0001B834  80 01 00 14 */	lwz r0, 0x14(r1)
-/* 8001E8F8 0001B838  7C 08 03 A6 */	mtlr r0
-/* 8001E8FC 0001B83C  38 21 00 10 */	addi r1, r1, 0x10
-/* 8001E900 0001B840  4E 80 00 20 */	blr 
-/* 8001E904 0001B844  94 21 FF F0 */	stwu r1, -0x10(r1)
-/* 8001E908 0001B848  7C 08 02 A6 */	mflr r0
-/* 8001E90C 0001B84C  90 01 00 14 */	stw r0, 0x14(r1)
-/* 8001E910 0001B850  93 E1 00 0C */	stw r31, 0xc(r1)
-/* 8001E914 0001B854  7C 7F 1B 78 */	mr r31, r3
-/* 8001E918 0001B858  80 63 00 24 */	lwz r3, 0x24(r3)
-/* 8001E91C 0001B85C  48 00 2D D1 */	bl fpcLy_SetCurrentLayer
-/* 8001E920 0001B860  48 00 2D D5 */	bl fpcLy_CurrentLayer
-/* 8001E924 0001B864  A8 9F 00 10 */	lha r4, 0x10(r31)
-/* 8001E928 0001B868  38 A0 00 00 */	li r5, 0
-/* 8001E92C 0001B86C  38 C0 00 00 */	li r6, 0
-/* 8001E930 0001B870  38 E0 00 00 */	li r7, 0
-/* 8001E934 0001B874  48 00 54 61 */	bl fpcSCtRq_Request
-/* 8001E938 0001B878  90 7F 00 14 */	stw r3, 0x14(r31)
-/* 8001E93C 0001B87C  38 60 00 02 */	li r3, 2
-/* 8001E940 0001B880  83 E1 00 0C */	lwz r31, 0xc(r1)
-/* 8001E944 0001B884  80 01 00 14 */	lwz r0, 0x14(r1)
-/* 8001E948 0001B888  7C 08 03 A6 */	mtlr r0
-/* 8001E94C 0001B88C  38 21 00 10 */	addi r1, r1, 0x10
-/* 8001E950 0001B890  4E 80 00 20 */	blr 
-
-.global fopOvlpReq_Request__FP21overlap_request_classsUs
-fopOvlpReq_Request__FP21overlap_request_classsUs:
-/* 8001E954 0001B894  94 21 FF E0 */	stwu r1, -0x20(r1)
-/* 8001E958 0001B898  7C 08 02 A6 */	mflr r0
-/* 8001E95C 0001B89C  90 01 00 24 */	stw r0, 0x24(r1)
-/* 8001E960 0001B8A0  39 61 00 20 */	addi r11, r1, 0x20
-/* 8001E964 0001B8A4  48 34 38 79 */	bl _savegpr_29
-/* 8001E968 0001B8A8  7C 7D 1B 78 */	mr r29, r3
-/* 8001E96C 0001B8AC  7C 9E 23 78 */	mr r30, r4
-/* 8001E970 0001B8B0  7C BF 2B 78 */	mr r31, r5
-/* 8001E974 0001B8B4  A0 03 00 04 */	lhz r0, 4(r3)
-/* 8001E978 0001B8B8  28 00 00 01 */	cmplwi r0, 1
-/* 8001E97C 0001B8BC  40 82 00 0C */	bne lbl_8001E988
-/* 8001E980 0001B8C0  38 60 00 00 */	li r3, 0
-/* 8001E984 0001B8C4  48 00 00 54 */	b lbl_8001E9D8
-lbl_8001E988:
-/* 8001E988 0001B8C8  38 80 00 01 */	li r4, 1
-/* 8001E98C 0001B8CC  48 24 7E A5 */	bl cReq_Command__FP18request_base_classUc
-/* 8001E990 0001B8D0  B3 DD 00 10 */	sth r30, 0x10(r29)
-/* 8001E994 0001B8D4  38 7D 00 18 */	addi r3, r29, 0x18
-/* 8001E998 0001B8D8  3C 80 80 3A */	lis r4, lbl_803A3890@ha
-/* 8001E99C 0001B8DC  38 84 38 90 */	addi r4, r4, lbl_803A3890@l
-/* 8001E9A0 0001B8E0  48 24 7C 91 */	bl cPhs_Set
-/* 8001E9A4 0001B8E4  7F A3 EB 78 */	mr r3, r29
-/* 8001E9A8 0001B8E8  7F E4 FB 78 */	mr r4, r31
-/* 8001E9AC 0001B8EC  48 00 01 19 */	bl fopOvlpReq_SetPeektime
-/* 8001E9B0 0001B8F0  38 00 00 01 */	li r0, 1
-/* 8001E9B4 0001B8F4  B0 1D 00 04 */	sth r0, 4(r29)
-/* 8001E9B8 0001B8F8  B0 1D 00 02 */	sth r0, 2(r29)
-/* 8001E9BC 0001B8FC  38 00 00 00 */	li r0, 0
-/* 8001E9C0 0001B900  90 1D 00 20 */	stw r0, 0x20(r29)
-/* 8001E9C4 0001B904  90 1D 00 08 */	stw r0, 8(r29)
-/* 8001E9C8 0001B908  90 1D 00 0C */	stw r0, 0xc(r29)
-/* 8001E9CC 0001B90C  48 00 2D 11 */	bl fpcLy_RootLayer
-/* 8001E9D0 0001B910  90 7D 00 24 */	stw r3, 0x24(r29)
-/* 8001E9D4 0001B914  7F A3 EB 78 */	mr r3, r29
-lbl_8001E9D8:
-/* 8001E9D8 0001B918  39 61 00 20 */	addi r11, r1, 0x20
-/* 8001E9DC 0001B91C  48 34 38 4D */	bl _restgpr_29
-/* 8001E9E0 0001B920  80 01 00 24 */	lwz r0, 0x24(r1)
-/* 8001E9E4 0001B924  7C 08 03 A6 */	mtlr r0
-/* 8001E9E8 0001B928  38 21 00 20 */	addi r1, r1, 0x20
-/* 8001E9EC 0001B92C  4E 80 00 20 */	blr 
-
-.global fopOvlpReq_Handler__FP21overlap_request_class
-fopOvlpReq_Handler__FP21overlap_request_class:
-/* 8001E9F0 0001B930  94 21 FF F0 */	stwu r1, -0x10(r1)
-/* 8001E9F4 0001B934  7C 08 02 A6 */	mflr r0
-/* 8001E9F8 0001B938  90 01 00 14 */	stw r0, 0x14(r1)
-/* 8001E9FC 0001B93C  93 E1 00 0C */	stw r31, 0xc(r1)
-/* 8001EA00 0001B940  7C 7F 1B 78 */	mr r31, r3
-/* 8001EA04 0001B944  38 7F 00 18 */	addi r3, r31, 0x18
-/* 8001EA08 0001B948  7F E4 FB 78 */	mr r4, r31
-/* 8001EA0C 0001B94C  48 24 7C CD */	bl cPhs_Do
-/* 8001EA10 0001B950  2C 03 00 03 */	cmpwi r3, 3
-/* 8001EA14 0001B954  41 82 00 54 */	beq lbl_8001EA68
-/* 8001EA18 0001B958  40 80 00 1C */	bge lbl_8001EA34
-/* 8001EA1C 0001B95C  2C 03 00 01 */	cmpwi r3, 1
-/* 8001EA20 0001B960  41 82 00 38 */	beq lbl_8001EA58
-/* 8001EA24 0001B964  40 80 00 20 */	bge lbl_8001EA44
-/* 8001EA28 0001B968  2C 03 00 00 */	cmpwi r3, 0
-/* 8001EA2C 0001B96C  40 80 00 24 */	bge lbl_8001EA50
-/* 8001EA30 0001B970  48 00 00 40 */	b lbl_8001EA70
-lbl_8001EA34:
-/* 8001EA34 0001B974  2C 03 00 05 */	cmpwi r3, 5
-/* 8001EA38 0001B978  41 82 00 30 */	beq lbl_8001EA68
-/* 8001EA3C 0001B97C  40 80 00 34 */	bge lbl_8001EA70
-/* 8001EA40 0001B980  48 00 00 20 */	b lbl_8001EA60
-lbl_8001EA44:
-/* 8001EA44 0001B984  7F E3 FB 78 */	mr r3, r31
-/* 8001EA48 0001B988  4B FF FF A9 */	bl fopOvlpReq_Handler__FP21overlap_request_class
-/* 8001EA4C 0001B98C  48 00 00 28 */	b lbl_8001EA74
-lbl_8001EA50:
-/* 8001EA50 0001B990  38 60 00 00 */	li r3, 0
-/* 8001EA54 0001B994  48 00 00 20 */	b lbl_8001EA74
-lbl_8001EA58:
-/* 8001EA58 0001B998  38 60 00 00 */	li r3, 0
-/* 8001EA5C 0001B99C  48 00 00 18 */	b lbl_8001EA74
-lbl_8001EA60:
-/* 8001EA60 0001B9A0  38 60 00 04 */	li r3, 4
-/* 8001EA64 0001B9A4  48 00 00 10 */	b lbl_8001EA74
-lbl_8001EA68:
-/* 8001EA68 0001B9A8  38 60 00 05 */	li r3, 5
-/* 8001EA6C 0001B9AC  48 00 00 08 */	b lbl_8001EA74
-lbl_8001EA70:
-/* 8001EA70 0001B9B0  38 60 00 05 */	li r3, 5
-lbl_8001EA74:
-/* 8001EA74 0001B9B4  83 E1 00 0C */	lwz r31, 0xc(r1)
-/* 8001EA78 0001B9B8  80 01 00 14 */	lwz r0, 0x14(r1)
-/* 8001EA7C 0001B9BC  7C 08 03 A6 */	mtlr r0
-/* 8001EA80 0001B9C0  38 21 00 10 */	addi r1, r1, 0x10
-/* 8001EA84 0001B9C4  4E 80 00 20 */	blr 
-
-.global fopOvlpReq_Cancel__FP21overlap_request_class
-fopOvlpReq_Cancel__FP21overlap_request_class:
-/* 8001EA88 0001B9C8  94 21 FF F0 */	stwu r1, -0x10(r1)
-/* 8001EA8C 0001B9CC  7C 08 02 A6 */	mflr r0
-/* 8001EA90 0001B9D0  90 01 00 14 */	stw r0, 0x14(r1)
-/* 8001EA94 0001B9D4  4B FF FC 59 */	bl fopOvlpReq_phase_Done
-/* 8001EA98 0001B9D8  20 03 00 02 */	subfic r0, r3, 2
-/* 8001EA9C 0001B9DC  7C 00 00 34 */	cntlzw r0, r0
-/* 8001EAA0 0001B9E0  54 03 D9 7E */	srwi r3, r0, 5
-/* 8001EAA4 0001B9E4  80 01 00 14 */	lwz r0, 0x14(r1)
-/* 8001EAA8 0001B9E8  7C 08 03 A6 */	mtlr r0
-/* 8001EAAC 0001B9EC  38 21 00 10 */	addi r1, r1, 0x10
-/* 8001EAB0 0001B9F0  4E 80 00 20 */	blr 
-
-.global fopOvlpReq_Is_PeektimeLimit
-fopOvlpReq_Is_PeektimeLimit:
-/* 8001EAB4 0001B9F4  A0 03 00 06 */	lhz r0, 6(r3)
-/* 8001EAB8 0001B9F8  7C 00 00 34 */	cntlzw r0, r0
-/* 8001EABC 0001B9FC  54 03 D9 7E */	srwi r3, r0, 5
-/* 8001EAC0 0001BA00  4E 80 00 20 */	blr 
-
-.global fopOvlpReq_SetPeektime
-fopOvlpReq_SetPeektime:
-/* 8001EAC4 0001BA04  54 80 04 3E */	clrlwi r0, r4, 0x10
-/* 8001EAC8 0001BA08  28 00 7F FF */	cmplwi r0, 0x7fff
-/* 8001EACC 0001BA0C  4D 81 00 20 */	bgtlr 
-/* 8001EAD0 0001BA10  B0 83 00 06 */	sth r4, 6(r3)
-/* 8001EAD4 0001BA14  4E 80 00 20 */	blr 
-
-.global fopOvlpReq_OverlapClr__FP21overlap_request_class
-fopOvlpReq_OverlapClr__FP21overlap_request_class:
-/* 8001EAD8 0001BA18  94 21 FF F0 */	stwu r1, -0x10(r1)
-/* 8001EADC 0001BA1C  7C 08 02 A6 */	mflr r0
-/* 8001EAE0 0001BA20  90 01 00 14 */	stw r0, 0x14(r1)
-/* 8001EAE4 0001BA24  93 E1 00 0C */	stw r31, 0xc(r1)
-/* 8001EAE8 0001BA28  7C 7F 1B 78 */	mr r31, r3
-/* 8001EAEC 0001BA2C  88 03 00 00 */	lbz r0, 0(r3)
-/* 8001EAF0 0001BA30  54 00 CF FE */	rlwinm r0, r0, 0x19, 0x1f, 0x1f
-/* 8001EAF4 0001BA34  28 00 00 01 */	cmplwi r0, 1
-/* 8001EAF8 0001BA38  41 82 00 10 */	beq lbl_8001EB08
-/* 8001EAFC 0001BA3C  4B FF FF B9 */	bl fopOvlpReq_Is_PeektimeLimit
-/* 8001EB00 0001BA40  2C 03 00 00 */	cmpwi r3, 0
-/* 8001EB04 0001BA44  40 82 00 0C */	bne lbl_8001EB10
-lbl_8001EB08:
-/* 8001EB08 0001BA48  38 60 00 00 */	li r3, 0
-/* 8001EB0C 0001BA4C  48 00 00 14 */	b lbl_8001EB20
-lbl_8001EB10:
-/* 8001EB10 0001BA50  7F E3 FB 78 */	mr r3, r31
-/* 8001EB14 0001BA54  38 80 00 02 */	li r4, 2
-/* 8001EB18 0001BA58  48 24 7D 39 */	bl cReq_Create__FP18request_base_classUc
-/* 8001EB1C 0001BA5C  38 60 00 01 */	li r3, 1
-lbl_8001EB20:
-/* 8001EB20 0001BA60  83 E1 00 0C */	lwz r31, 0xc(r1)
-/* 8001EB24 0001BA64  80 01 00 14 */	lwz r0, 0x14(r1)
-/* 8001EB28 0001BA68  7C 08 03 A6 */	mtlr r0
-/* 8001EB2C 0001BA6C  38 21 00 10 */	addi r1, r1, 0x10
-/* 8001EB30 0001BA70  4E 80 00 20 */	blr 
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001E6EC.s b/include/f/f_op/f_op_overlap_req/asm/func_8001E6EC.s
new file mode 100644
index 0000000000..95a1fd2730
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001E6EC.s
@@ -0,0 +1,25 @@
+/* 8001E6EC 0001B62C  94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 8001E6F0 0001B630  7C 08 02 A6 */ mflr r0
+/* 8001E6F4 0001B634  90 01 00 14 */ stw r0, 0x14(r1)
+/* 8001E6F8 0001B638  93 E1 00 0C */ stw r31, 0xc(r1)
+/* 8001E6FC 0001B63C  7C 7F 1B 78 */ mr r31, r3
+/* 8001E700 0001B640  80 63 00 20 */ lwz r3, 0x20(r3)
+/* 8001E704 0001B644  48 00 3A 15 */ bl fpcM_Delete
+/* 8001E708 0001B648  2C 03 00 01 */ cmpwi r3, 1
+/* 8001E70C 0001B64C  40 82 00 24 */ bne lbl_8001E730
+/* 8001E710 0001B650  38 00 00 00 */ li r0, 0
+/* 8001E714 0001B654  90 1F 00 20 */ stw r0, 0x20(r31)
+/* 8001E718 0001B658  B0 1F 00 04 */ sth r0, 4(r31)
+/* 8001E71C 0001B65C  B0 1F 00 06 */ sth r0, 6(r31)
+/* 8001E720 0001B660  90 1F 00 08 */ stw r0, 8(r31)
+/* 8001E724 0001B664  90 1F 00 0C */ stw r0, 0xc(r31)
+/* 8001E728 0001B668  38 60 00 02 */ li r3, 2
+/* 8001E72C 0001B66C  48 00 00 08 */ b lbl_8001E734
+lbl_8001E730:
+/* 8001E730 0001B670  38 60 00 00 */ li r3, 0
+lbl_8001E734:
+/* 8001E734 0001B674  83 E1 00 0C */ lwz r31, 0xc(r1)
+/* 8001E738 0001B678  80 01 00 14 */ lwz r0, 0x14(r1)
+/* 8001E73C 0001B67C  7C 08 03 A6 */ mtlr r0
+/* 8001E740 0001B680  38 21 00 10 */ addi r1, r1, 0x10
+/* 8001E744 0001B684  4E 80 00 20 */ blr
\ No newline at end of file
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001E748.s b/include/f/f_op/f_op_overlap_req/asm/func_8001E748.s
new file mode 100644
index 0000000000..2f8c18275f
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001E748.s
@@ -0,0 +1,19 @@
+/* 8001E748 0001B688  94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 8001E74C 0001B68C  7C 08 02 A6 */ mflr r0
+/* 8001E750 0001B690  90 01 00 14 */ stw r0, 0x14(r1)
+/* 8001E754 0001B694  93 E1 00 0C */ stw r31, 0xc(r1)
+/* 8001E758 0001B698  7C 7F 1B 78 */ mr r31, r3
+/* 8001E75C 0001B69C  48 24 80 A5 */ bl cReq_Done__FP18request_base_class
+/* 8001E760 0001B6A0  A8 7F 00 02 */ lha r3, 2(r31)
+/* 8001E764 0001B6A4  38 03 FF FF */ addi r0, r3, -1
+/* 8001E768 0001B6A8  B0 1F 00 02 */ sth r0, 2(r31)
+/* 8001E76C 0001B6AC  7C 03 00 D0 */ neg r0, r3
+/* 8001E770 0001B6B0  7C 60 03 38 */ orc r0, r3, r0
+/* 8001E774 0001B6B4  7C 03 FE 70 */ srawi r3, r0, 0x1f
+/* 8001E778 0001B6B8  38 00 00 02 */ li r0, 2
+/* 8001E77C 0001B6BC  7C 03 18 38 */ and r3, r0, r3
+/* 8001E780 0001B6C0  83 E1 00 0C */ lwz r31, 0xc(r1)
+/* 8001E784 0001B6C4  80 01 00 14 */ lwz r0, 0x14(r1)
+/* 8001E788 0001B6C8  7C 08 03 A6 */ mtlr r0
+/* 8001E78C 0001B6CC  38 21 00 10 */ addi r1, r1, 0x10
+/* 8001E790 0001B6D0  4E 80 00 20 */ blr
\ No newline at end of file
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001E794.s b/include/f/f_op/f_op_overlap_req/asm/func_8001E794.s
new file mode 100644
index 0000000000..26cac77b59
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001E794.s
@@ -0,0 +1,22 @@
+/* 8001E794 0001B6D4  94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 8001E798 0001B6D8  7C 08 02 A6 */ mflr r0
+/* 8001E79C 0001B6DC  90 01 00 14 */ stw r0, 0x14(r1)
+/* 8001E7A0 0001B6E0  93 E1 00 0C */ stw r31, 0xc(r1)
+/* 8001E7A4 0001B6E4  7C 7F 1B 78 */ mr r31, r3
+/* 8001E7A8 0001B6E8  80 63 00 20 */ lwz r3, 0x20(r3)
+/* 8001E7AC 0001B6EC  38 63 00 C4 */ addi r3, r3, 0xc4
+/* 8001E7B0 0001B6F0  48 24 80 25 */ bl cReq_Is_Done__FP18request_base_class
+/* 8001E7B4 0001B6F4  2C 03 00 00 */ cmpwi r3, 0
+/* 8001E7B8 0001B6F8  41 82 00 14 */ beq lbl_8001E7CC
+/* 8001E7BC 0001B6FC  38 00 00 00 */ li r0, 0
+/* 8001E7C0 0001B700  90 1F 00 08 */ stw r0, 8(r31)
+/* 8001E7C4 0001B704  38 60 00 02 */ li r3, 2
+/* 8001E7C8 0001B708  48 00 00 08 */ b lbl_8001E7D0
+lbl_8001E7CC:
+/* 8001E7CC 0001B70C  38 60 00 00 */ li r3, 0
+lbl_8001E7D0:
+/* 8001E7D0 0001B710  83 E1 00 0C */ lwz r31, 0xc(r1)
+/* 8001E7D4 0001B714  80 01 00 14 */ lwz r0, 0x14(r1)
+/* 8001E7D8 0001B718  7C 08 03 A6 */ mtlr r0
+/* 8001E7DC 0001B71C  38 21 00 10 */ addi r1, r1, 0x10
+/* 8001E7E0 0001B720  4E 80 00 20 */ blr
\ No newline at end of file
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001E7E4.s b/include/f/f_op/f_op_overlap_req/asm/func_8001E7E4.s
new file mode 100644
index 0000000000..1402c99c06
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001E7E4.s
@@ -0,0 +1,31 @@
+/* 8001E7E4 0001B724  94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 8001E7E8 0001B728  7C 08 02 A6 */ mflr r0
+/* 8001E7EC 0001B72C  90 01 00 14 */ stw r0, 0x14(r1)
+/* 8001E7F0 0001B730  A0 83 00 06 */ lhz r4, 6(r3)
+/* 8001E7F4 0001B734  28 04 00 00 */ cmplwi r4, 0
+/* 8001E7F8 0001B738  41 82 00 0C */ beq lbl_8001E804
+/* 8001E7FC 0001B73C  38 04 FF FF */ addi r0, r4, -1
+/* 8001E800 0001B740  B0 03 00 06 */ sth r0, 6(r3)
+lbl_8001E804:
+/* 8001E804 0001B744  88 03 00 00 */ lbz r0, 0(r3)
+/* 8001E808 0001B748  54 00 06 BE */ clrlwi r0, r0, 0x1a
+/* 8001E80C 0001B74C  28 00 00 02 */ cmplwi r0, 2
+/* 8001E810 0001B750  40 82 00 28 */ bne lbl_8001E838
+/* 8001E814 0001B754  A0 03 00 06 */ lhz r0, 6(r3)
+/* 8001E818 0001B758  28 00 00 00 */ cmplwi r0, 0
+/* 8001E81C 0001B75C  40 82 00 1C */ bne lbl_8001E838
+/* 8001E820 0001B760  80 63 00 20 */ lwz r3, 0x20(r3)
+/* 8001E824 0001B764  38 63 00 C4 */ addi r3, r3, 0xc4
+/* 8001E828 0001B768  38 80 00 02 */ li r4, 2
+/* 8001E82C 0001B76C  48 24 80 05 */ bl cReq_Command__FP18request_base_classUc
+/* 8001E830 0001B770  38 60 00 02 */ li r3, 2
+/* 8001E834 0001B774  48 00 00 10 */ b lbl_8001E844
+lbl_8001E838:
+/* 8001E838 0001B778  38 00 00 01 */ li r0, 1
+/* 8001E83C 0001B77C  90 03 00 08 */ stw r0, 8(r3)
+/* 8001E840 0001B780  38 60 00 00 */ li r3, 0
+lbl_8001E844:
+/* 8001E844 0001B784  80 01 00 14 */ lwz r0, 0x14(r1)
+/* 8001E848 0001B788  7C 08 03 A6 */ mtlr r0
+/* 8001E84C 0001B78C  38 21 00 10 */ addi r1, r1, 0x10
+/* 8001E850 0001B790  4E 80 00 20 */ blr
\ No newline at end of file
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001E854.s b/include/f/f_op/f_op_overlap_req/asm/func_8001E854.s
new file mode 100644
index 0000000000..4c8d415e26
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001E854.s
@@ -0,0 +1,22 @@
+/* 8001E854 0001B794  94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 8001E858 0001B798  7C 08 02 A6 */ mflr r0
+/* 8001E85C 0001B79C  90 01 00 14 */ stw r0, 0x14(r1)
+/* 8001E860 0001B7A0  93 E1 00 0C */ stw r31, 0xc(r1)
+/* 8001E864 0001B7A4  7C 7F 1B 78 */ mr r31, r3
+/* 8001E868 0001B7A8  80 63 00 20 */ lwz r3, 0x20(r3)
+/* 8001E86C 0001B7AC  38 63 00 C4 */ addi r3, r3, 0xc4
+/* 8001E870 0001B7B0  48 24 7F 65 */ bl cReq_Is_Done__FP18request_base_class
+/* 8001E874 0001B7B4  2C 03 00 00 */ cmpwi r3, 0
+/* 8001E878 0001B7B8  41 82 00 14 */ beq lbl_8001E88C
+/* 8001E87C 0001B7BC  7F E3 FB 78 */ mr r3, r31
+/* 8001E880 0001B7C0  48 24 7F 81 */ bl cReq_Done__FP18request_base_class
+/* 8001E884 0001B7C4  38 60 00 02 */ li r3, 2
+/* 8001E888 0001B7C8  48 00 00 08 */ b lbl_8001E890
+lbl_8001E88C:
+/* 8001E88C 0001B7CC  38 60 00 00 */ li r3, 0
+lbl_8001E890:
+/* 8001E890 0001B7D0  83 E1 00 0C */ lwz r31, 0xc(r1)
+/* 8001E894 0001B7D4  80 01 00 14 */ lwz r0, 0x14(r1)
+/* 8001E898 0001B7D8  7C 08 03 A6 */ mtlr r0
+/* 8001E89C 0001B7DC  38 21 00 10 */ addi r1, r1, 0x10
+/* 8001E8A0 0001B7E0  4E 80 00 20 */ blr
\ No newline at end of file
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001E8A4.s b/include/f/f_op/f_op_overlap_req/asm/func_8001E8A4.s
new file mode 100644
index 0000000000..a96c14762a
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001E8A4.s
@@ -0,0 +1,27 @@
+/* 8001E8A4 0001B7E4  94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 8001E8A8 0001B7E8  7C 08 02 A6 */ mflr r0
+/* 8001E8AC 0001B7EC  90 01 00 14 */ stw r0, 0x14(r1)
+/* 8001E8B0 0001B7F0  93 E1 00 0C */ stw r31, 0xc(r1)
+/* 8001E8B4 0001B7F4  7C 7F 1B 78 */ mr r31, r3
+/* 8001E8B8 0001B7F8  80 63 00 14 */ lwz r3, 0x14(r3)
+/* 8001E8BC 0001B7FC  48 00 38 7D */ bl fpcM_IsCreating
+/* 8001E8C0 0001B800  2C 03 00 00 */ cmpwi r3, 0
+/* 8001E8C4 0001B804  40 82 00 28 */ bne lbl_8001E8EC
+/* 8001E8C8 0001B808  80 7F 00 14 */ lwz r3, 0x14(r31)
+/* 8001E8CC 0001B80C  48 00 2A 8D */ bl fpcEx_SearchByID
+/* 8001E8D0 0001B810  28 03 00 00 */ cmplwi r3, 0
+/* 8001E8D4 0001B814  40 82 00 0C */ bne lbl_8001E8E0
+/* 8001E8D8 0001B818  38 60 00 05 */ li r3, 5
+/* 8001E8DC 0001B81C  48 00 00 14 */ b lbl_8001E8F0
+lbl_8001E8E0:
+/* 8001E8E0 0001B820  90 7F 00 20 */ stw r3, 0x20(r31)
+/* 8001E8E4 0001B824  38 60 00 02 */ li r3, 2
+/* 8001E8E8 0001B828  48 00 00 08 */ b lbl_8001E8F0
+lbl_8001E8EC:
+/* 8001E8EC 0001B82C  38 60 00 00 */ li r3, 0
+lbl_8001E8F0:
+/* 8001E8F0 0001B830  83 E1 00 0C */ lwz r31, 0xc(r1)
+/* 8001E8F4 0001B834  80 01 00 14 */ lwz r0, 0x14(r1)
+/* 8001E8F8 0001B838  7C 08 03 A6 */ mtlr r0
+/* 8001E8FC 0001B83C  38 21 00 10 */ addi r1, r1, 0x10
+/* 8001E900 0001B840  4E 80 00 20 */ blr
\ No newline at end of file
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001E904.s b/include/f/f_op/f_op_overlap_req/asm/func_8001E904.s
new file mode 100644
index 0000000000..0a8482a056
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001E904.s
@@ -0,0 +1,20 @@
+/* 8001E904 0001B844  94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 8001E908 0001B848  7C 08 02 A6 */ mflr r0
+/* 8001E90C 0001B84C  90 01 00 14 */ stw r0, 0x14(r1)
+/* 8001E910 0001B850  93 E1 00 0C */ stw r31, 0xc(r1)
+/* 8001E914 0001B854  7C 7F 1B 78 */ mr r31, r3
+/* 8001E918 0001B858  80 63 00 24 */ lwz r3, 0x24(r3)
+/* 8001E91C 0001B85C  48 00 2D D1 */ bl fpcLy_SetCurrentLayer
+/* 8001E920 0001B860  48 00 2D D5 */ bl fpcLy_CurrentLayer
+/* 8001E924 0001B864  A8 9F 00 10 */ lha r4, 0x10(r31)
+/* 8001E928 0001B868  38 A0 00 00 */ li r5, 0
+/* 8001E92C 0001B86C  38 C0 00 00 */ li r6, 0
+/* 8001E930 0001B870  38 E0 00 00 */ li r7, 0
+/* 8001E934 0001B874  48 00 54 61 */ bl fpcSCtRq_Request
+/* 8001E938 0001B878  90 7F 00 14 */ stw r3, 0x14(r31)
+/* 8001E93C 0001B87C  38 60 00 02 */ li r3, 2
+/* 8001E940 0001B880  83 E1 00 0C */ lwz r31, 0xc(r1)
+/* 8001E944 0001B884  80 01 00 14 */ lwz r0, 0x14(r1)
+/* 8001E948 0001B888  7C 08 03 A6 */ mtlr r0
+/* 8001E94C 0001B88C  38 21 00 10 */ addi r1, r1, 0x10
+/* 8001E950 0001B890  4E 80 00 20 */ blr
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001E954.s b/include/f/f_op/f_op_overlap_req/asm/func_8001E954.s
new file mode 100644
index 0000000000..9dfa7a4adf
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001E954.s
@@ -0,0 +1,41 @@
+/* 8001E954 0001B894  94 21 FF E0 */ stwu r1, -0x20(r1)
+/* 8001E958 0001B898  7C 08 02 A6 */ mflr r0
+/* 8001E95C 0001B89C  90 01 00 24 */ stw r0, 0x24(r1)
+/* 8001E960 0001B8A0  39 61 00 20 */ addi r11, r1, 0x20
+/* 8001E964 0001B8A4  48 34 38 79 */ bl _savegpr_29
+/* 8001E968 0001B8A8  7C 7D 1B 78 */ mr r29, r3
+/* 8001E96C 0001B8AC  7C 9E 23 78 */ mr r30, r4
+/* 8001E970 0001B8B0  7C BF 2B 78 */ mr r31, r5
+/* 8001E974 0001B8B4  A0 03 00 04 */ lhz r0, 4(r3)
+/* 8001E978 0001B8B8  28 00 00 01 */ cmplwi r0, 1
+/* 8001E97C 0001B8BC  40 82 00 0C */ bne lbl_8001E988
+/* 8001E980 0001B8C0  38 60 00 00 */ li r3, 0
+/* 8001E984 0001B8C4  48 00 00 54 */ b lbl_8001E9D8
+lbl_8001E988:
+/* 8001E988 0001B8C8  38 80 00 01 */ li r4, 1
+/* 8001E98C 0001B8CC  48 24 7E A5 */ bl cReq_Command__FP18request_base_classUc
+/* 8001E990 0001B8D0  B3 DD 00 10 */ sth r30, 0x10(r29)
+/* 8001E994 0001B8D4  38 7D 00 18 */ addi r3, r29, 0x18
+/* 8001E998 0001B8D8  3C 80 80 3A */ lis r4, lbl_803A3890@ha
+/* 8001E99C 0001B8DC  38 84 38 90 */ addi r4, r4, lbl_803A3890@l
+/* 8001E9A0 0001B8E0  48 24 7C 91 */ bl cPhs_Set
+/* 8001E9A4 0001B8E4  7F A3 EB 78 */ mr r3, r29
+/* 8001E9A8 0001B8E8  7F E4 FB 78 */ mr r4, r31
+/* 8001E9AC 0001B8EC  48 00 01 19 */ bl fopOvlpReq_SetPeektime
+/* 8001E9B0 0001B8F0  38 00 00 01 */ li r0, 1
+/* 8001E9B4 0001B8F4  B0 1D 00 04 */ sth r0, 4(r29)
+/* 8001E9B8 0001B8F8  B0 1D 00 02 */ sth r0, 2(r29)
+/* 8001E9BC 0001B8FC  38 00 00 00 */ li r0, 0
+/* 8001E9C0 0001B900  90 1D 00 20 */ stw r0, 0x20(r29)
+/* 8001E9C4 0001B904  90 1D 00 08 */ stw r0, 8(r29)
+/* 8001E9C8 0001B908  90 1D 00 0C */ stw r0, 0xc(r29)
+/* 8001E9CC 0001B90C  48 00 2D 11 */ bl fpcLy_RootLayer
+/* 8001E9D0 0001B910  90 7D 00 24 */ stw r3, 0x24(r29)
+/* 8001E9D4 0001B914  7F A3 EB 78 */ mr r3, r29
+lbl_8001E9D8:
+/* 8001E9D8 0001B918  39 61 00 20 */ addi r11, r1, 0x20
+/* 8001E9DC 0001B91C  48 34 38 4D */ bl _restgpr_29
+/* 8001E9E0 0001B920  80 01 00 24 */ lwz r0, 0x24(r1)
+/* 8001E9E4 0001B924  7C 08 03 A6 */ mtlr r0
+/* 8001E9E8 0001B928  38 21 00 20 */ addi r1, r1, 0x20
+/* 8001E9EC 0001B92C  4E 80 00 20 */ blr
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001E9F0.s b/include/f/f_op/f_op_overlap_req/asm/func_8001E9F0.s
new file mode 100644
index 0000000000..1599edd8b5
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001E9F0.s
@@ -0,0 +1,46 @@
+/* 8001E9F0 0001B930  94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 8001E9F4 0001B934  7C 08 02 A6 */ mflr r0
+/* 8001E9F8 0001B938  90 01 00 14 */ stw r0, 0x14(r1)
+/* 8001E9FC 0001B93C  93 E1 00 0C */ stw r31, 0xc(r1)
+/* 8001EA00 0001B940  7C 7F 1B 78 */ mr r31, r3
+/* 8001EA04 0001B944  38 7F 00 18 */ addi r3, r31, 0x18
+/* 8001EA08 0001B948  7F E4 FB 78 */ mr r4, r31
+/* 8001EA0C 0001B94C  48 24 7C CD */ bl cPhs_Do
+/* 8001EA10 0001B950  2C 03 00 03 */ cmpwi r3, 3
+/* 8001EA14 0001B954  41 82 00 54 */ beq lbl_8001EA68
+/* 8001EA18 0001B958  40 80 00 1C */ bge lbl_8001EA34
+/* 8001EA1C 0001B95C  2C 03 00 01 */ cmpwi r3, 1
+/* 8001EA20 0001B960  41 82 00 38 */ beq lbl_8001EA58
+/* 8001EA24 0001B964  40 80 00 20 */ bge lbl_8001EA44
+/* 8001EA28 0001B968  2C 03 00 00 */ cmpwi r3, 0
+/* 8001EA2C 0001B96C  40 80 00 24 */ bge lbl_8001EA50
+/* 8001EA30 0001B970  48 00 00 40 */ b lbl_8001EA70
+lbl_8001EA34:
+/* 8001EA34 0001B974  2C 03 00 05 */ cmpwi r3, 5
+/* 8001EA38 0001B978  41 82 00 30 */ beq lbl_8001EA68
+/* 8001EA3C 0001B97C  40 80 00 34 */ bge lbl_8001EA70
+/* 8001EA40 0001B980  48 00 00 20 */ b lbl_8001EA60
+lbl_8001EA44:
+/* 8001EA44 0001B984  7F E3 FB 78 */ mr r3, r31
+/* 8001EA48 0001B988  4B FF FF A9 */ bl fopOvlpReq_Handler__FP21overlap_request_class
+/* 8001EA4C 0001B98C  48 00 00 28 */ b lbl_8001EA74
+lbl_8001EA50:
+/* 8001EA50 0001B990  38 60 00 00 */ li r3, 0
+/* 8001EA54 0001B994  48 00 00 20 */ b lbl_8001EA74
+lbl_8001EA58:
+/* 8001EA58 0001B998  38 60 00 00 */ li r3, 0
+/* 8001EA5C 0001B99C  48 00 00 18 */ b lbl_8001EA74
+lbl_8001EA60:
+/* 8001EA60 0001B9A0  38 60 00 04 */ li r3, 4
+/* 8001EA64 0001B9A4  48 00 00 10 */ b lbl_8001EA74
+lbl_8001EA68:
+/* 8001EA68 0001B9A8  38 60 00 05 */ li r3, 5
+/* 8001EA6C 0001B9AC  48 00 00 08 */ b lbl_8001EA74
+lbl_8001EA70:
+/* 8001EA70 0001B9B0  38 60 00 05 */ li r3, 5
+lbl_8001EA74:
+/* 8001EA74 0001B9B4  83 E1 00 0C */ lwz r31, 0xc(r1)
+/* 8001EA78 0001B9B8  80 01 00 14 */ lwz r0, 0x14(r1)
+/* 8001EA7C 0001B9BC  7C 08 03 A6 */ mtlr r0
+/* 8001EA80 0001B9C0  38 21 00 10 */ addi r1, r1, 0x10
+/* 8001EA84 0001B9C4  4E 80 00 20 */ blr
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001EA88.s b/include/f/f_op/f_op_overlap_req/asm/func_8001EA88.s
new file mode 100644
index 0000000000..3d1e1d452c
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001EA88.s
@@ -0,0 +1,11 @@
+/* 8001EA88 0001B9C8  94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 8001EA8C 0001B9CC  7C 08 02 A6 */ mflr r0
+/* 8001EA90 0001B9D0  90 01 00 14 */ stw r0, 0x14(r1)
+/* 8001EA94 0001B9D4  4B FF FC 59 */ bl fopOvlpReq_phase_Done
+/* 8001EA98 0001B9D8  20 03 00 02 */ subfic r0, r3, 2
+/* 8001EA9C 0001B9DC  7C 00 00 34 */ cntlzw r0, r0
+/* 8001EAA0 0001B9E0  54 03 D9 7E */ srwi r3, r0, 5
+/* 8001EAA4 0001B9E4  80 01 00 14 */ lwz r0, 0x14(r1)
+/* 8001EAA8 0001B9E8  7C 08 03 A6 */ mtlr r0
+/* 8001EAAC 0001B9EC  38 21 00 10 */ addi r1, r1, 0x10
+/* 8001EAB0 0001B9F0  4E 80 00 20 */ blr
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001EAB4.s b/include/f/f_op/f_op_overlap_req/asm/func_8001EAB4.s
new file mode 100644
index 0000000000..568f713cb8
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001EAB4.s
@@ -0,0 +1,4 @@
+/* 8001EAB4 0001B9F4  A0 03 00 06 */ lhz r0, 6(r3)
+/* 8001EAB8 0001B9F8  7C 00 00 34 */ cntlzw r0, r0
+/* 8001EABC 0001B9FC  54 03 D9 7E */ srwi r3, r0, 5
+/* 8001EAC0 0001BA00  4E 80 00 20 */ blr
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001EAC4.s b/include/f/f_op/f_op_overlap_req/asm/func_8001EAC4.s
new file mode 100644
index 0000000000..8786b41750
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001EAC4.s
@@ -0,0 +1,5 @@
+/* 8001EAC4 0001BA04  54 80 04 3E */ clrlwi r0, r4, 0x10
+/* 8001EAC8 0001BA08  28 00 7F FF */ cmplwi r0, 0x7fff
+/* 8001EACC 0001BA0C  4D 81 00 20 */ bgtlr
+/* 8001EAD0 0001BA10  B0 83 00 06 */ sth r4, 6(r3)
+/* 8001EAD4 0001BA14  4E 80 00 20 */ blr
diff --git a/include/f/f_op/f_op_overlap_req/asm/func_8001EAD8.s b/include/f/f_op/f_op_overlap_req/asm/func_8001EAD8.s
new file mode 100644
index 0000000000..986f0e8caf
--- /dev/null
+++ b/include/f/f_op/f_op_overlap_req/asm/func_8001EAD8.s
@@ -0,0 +1,26 @@
+/* 8001EAD8 0001BA18  94 21 FF F0 */ stwu r1, -0x10(r1)
+/* 8001EADC 0001BA1C  7C 08 02 A6 */ mflr r0
+/* 8001EAE0 0001BA20  90 01 00 14 */ stw r0, 0x14(r1)
+/* 8001EAE4 0001BA24  93 E1 00 0C */ stw r31, 0xc(r1)
+/* 8001EAE8 0001BA28  7C 7F 1B 78 */ mr r31, r3
+/* 8001EAEC 0001BA2C  88 03 00 00 */ lbz r0, 0(r3)
+/* 8001EAF0 0001BA30  54 00 CF FE */ rlwinm r0, r0, 0x19, 0x1f, 0x1f
+/* 8001EAF4 0001BA34  28 00 00 01 */ cmplwi r0, 1
+/* 8001EAF8 0001BA38  41 82 00 10 */ beq lbl_8001EB08
+/* 8001EAFC 0001BA3C  4B FF FF B9 */ bl fopOvlpReq_Is_PeektimeLimit
+/* 8001EB00 0001BA40  2C 03 00 00 */ cmpwi r3, 0
+/* 8001EB04 0001BA44  40 82 00 0C */ bne lbl_8001EB10
+lbl_8001EB08:
+/* 8001EB08 0001BA48  38 60 00 00 */ li r3, 0
+/* 8001EB0C 0001BA4C  48 00 00 14 */ b lbl_8001EB20
+lbl_8001EB10:
+/* 8001EB10 0001BA50  7F E3 FB 78 */ mr r3, r31
+/* 8001EB14 0001BA54  38 80 00 02 */ li r4, 2
+/* 8001EB18 0001BA58  48 24 7D 39 */ bl cReq_Create__FP18request_base_classUc
+/* 8001EB1C 0001BA5C  38 60 00 01 */ li r3, 1
+lbl_8001EB20:
+/* 8001EB20 0001BA60  83 E1 00 0C */ lwz r31, 0xc(r1)
+/* 8001EB24 0001BA64  80 01 00 14 */ lwz r0, 0x14(r1)
+/* 8001EB28 0001BA68  7C 08 03 A6 */ mtlr r0
+/* 8001EB2C 0001BA6C  38 21 00 10 */ addi r1, r1, 0x10
+/* 8001EB30 0001BA70  4E 80 00 20 */ blr
\ No newline at end of file
diff --git a/ldscript.lcf b/ldscript.lcf
index d0c48b754f..a8e92c9f4f 100644
--- a/ldscript.lcf
+++ b/ldscript.lcf
@@ -3390,6 +3390,12 @@ func_80020368
 func_80020338
 func_800202CC
 func_80020158
+func_8001E904
+func_8001E8A4
+func_8001E854
+func_8001E7E4
+func_8001E794
+func_8001E748
 }
 /*
 .init 80003100 - 80005600
diff --git a/obj_files.mk b/obj_files.mk
index 3b7e5e8159..91d7bb6bd1 100644
--- a/obj_files.mk
+++ b/obj_files.mk
@@ -59,7 +59,7 @@ TEXT_O_FILES := 						            \
             $(BUILD_DIR)/src/f/f_op/f_op_camera_mng.o \
             $(BUILD_DIR)/asm/f/op/f_op_overlap.o \
             $(BUILD_DIR)/src/f/f_op/f_op_overlap_mng.o \
-            $(BUILD_DIR)/asm/f/op/overlap/f_op_overlap_req.o \
+            $(BUILD_DIR)/src/f/f_op/f_op_overlap_req.o \
             $(BUILD_DIR)/asm/f/op/f_op_scene.o \
             $(BUILD_DIR)/asm/f/op/scene/f_op_scene_iter.o \
             $(BUILD_DIR)/src/f/f_op/f_op_scene_mng.o \
diff --git a/src/f/f_op/f_op_overlap_req.cpp b/src/f/f_op/f_op_overlap_req.cpp
index 4bf93c8658..edf5ef4fb3 100644
--- a/src/f/f_op/f_op_overlap_req.cpp
+++ b/src/f/f_op/f_op_overlap_req.cpp
@@ -1 +1,135 @@
-// ok
+/* f_op_overlap_req.cpp autogenerated by split.py v0.4 at 2021-02-15 20:24:53.163616 */
+
+#include "global.h"
+
+// additional symbols needed for f_op_overlap_req.cpp
+// autogenerated by split.py v0.4 at 2021-02-15 20:24:53.163652
+extern "C" {
+    void _restgpr_29(void);
+    void _savegpr_29(void);
+    void cPhs_Do(void);
+    void cPhs_Set(void);
+    void cReq_Command__FP18request_base_classUc(void);
+    void cReq_Create__FP18request_base_classUc(void);
+    void cReq_Done__FP18request_base_class(void);
+    void cReq_Is_Done__FP18request_base_class(void);
+    void fopOvlpReq_Cancel__FP21overlap_request_class(void);
+    void fopOvlpReq_Handler__FP21overlap_request_class(void);
+    void fopOvlpReq_Is_PeektimeLimit(void);
+    void fopOvlpReq_OverlapClr__FP21overlap_request_class(void);
+    void fopOvlpReq_Request__FP21overlap_request_classsUs(void);
+    void fopOvlpReq_SetPeektime(void);
+    void fopOvlpReq_phase_Done(void);
+    void fpcEx_SearchByID(void);
+    void fpcLy_CurrentLayer(void);
+    void fpcLy_RootLayer(void);
+    void fpcLy_SetCurrentLayer(void);
+    void fpcM_Delete(void);
+    void fpcM_IsCreating(void);
+    void fpcSCtRq_Request(void);
+    void func_8001E748(void);
+    void func_8001E794(void);
+    void func_8001E7E4(void);
+    void func_8001E854(void);
+    void func_8001E8A4(void);
+    void func_8001E904(void);
+}
+
+// additional symbols needed for f_op_overlap_req.cpp
+// autogenerated by split.py v0.4 at 2021-02-15 20:24:53.163658
+extern u8 lbl_803A3890;
+
+
+extern "C" {
+// fopOvlpReq_phase_Done__FP21overlap_request_class
+// fopOvlpReq_phase_Done(overlap_request_class*)
+asm void fopOvlpReq_phase_Done(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001E6EC.s"
+}
+
+// fopOvlpReq_phase_IsDone__FP21overlap_request_class
+// fopOvlpReq_phase_IsDone(overlap_request_class*)
+asm void func_8001E748(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001E748.s"
+}
+
+// fopOvlpReq_phase_IsWaitOfFadeout__FP21overlap_request_class
+// fopOvlpReq_phase_IsWaitOfFadeout(overlap_request_class*)
+asm void func_8001E794(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001E794.s"
+}
+
+// fopOvlpReq_phase_WaitOfFadeout__FP21overlap_request_class
+// fopOvlpReq_phase_WaitOfFadeout(overlap_request_class*)
+asm void func_8001E7E4(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001E7E4.s"
+}
+
+// fopOvlpReq_phase_IsComplete__FP21overlap_request_class
+// fopOvlpReq_phase_IsComplete(overlap_request_class*)
+asm void func_8001E854(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001E854.s"
+}
+
+// fopOvlpReq_phase_IsCreated__FP21overlap_request_class
+// fopOvlpReq_phase_IsCreated(overlap_request_class*)
+asm void func_8001E8A4(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001E8A4.s"
+}
+
+// fopOvlpReq_phase_Create__FP21overlap_request_class
+// fopOvlpReq_phase_Create(overlap_request_class*)
+asm void func_8001E904(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001E904.s"
+}
+
+// fopOvlpReq_Request__FP21overlap_request_classsUs
+// fopOvlpReq_Request(overlap_request_class*, s16, u16)
+asm void fopOvlpReq_Request__FP21overlap_request_classsUs(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001E954.s"
+}
+
+// fopOvlpReq_Handler__FP21overlap_request_class
+// fopOvlpReq_Handler(overlap_request_class*)
+asm void fopOvlpReq_Handler__FP21overlap_request_class(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001E9F0.s"
+}
+
+// fopOvlpReq_Cancel__FP21overlap_request_class
+// fopOvlpReq_Cancel(overlap_request_class*)
+asm void fopOvlpReq_Cancel__FP21overlap_request_class(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001EA88.s"
+}
+
+// fopOvlpReq_Is_PeektimeLimit__FP21overlap_request_class
+// fopOvlpReq_Is_PeektimeLimit(overlap_request_class*)
+asm void fopOvlpReq_Is_PeektimeLimit(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001EAB4.s"
+}
+
+// fopOvlpReq_SetPeektime__FP21overlap_request_classUs
+// fopOvlpReq_SetPeektime(overlap_request_class*, u16)
+asm void fopOvlpReq_SetPeektime(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001EAC4.s"
+}
+
+// fopOvlpReq_OverlapClr__FP21overlap_request_class
+// fopOvlpReq_OverlapClr(overlap_request_class*)
+asm void fopOvlpReq_OverlapClr__FP21overlap_request_class(void) {
+    nofralloc
+    #include "f/f_op/f_op_overlap_req/asm/func_8001EAD8.s"
+}
+
+};