dolphin lib work (#237)

* getLayerNo_common_common finally matched * dolphin ai / ar / card work from prime decomp * work on dolphin dvd / dsp / db * more dolphin os work * si work * remove asm * build fix
2026-08-09 18:58:27 -04:00 · 2023-01-02 11:20:10 -08:00
parent 6cc376bb2b
commit f070ee948f
257 changed files with 9625 additions and 10850 deletions
@@ -2393,10 +2393,10 @@ public:
    /* 80108F64 */ bool cancelHookshotMove();
    /* 8010903C */ BOOL checkHookshotReadyMaterialOffMode() const;
    /* 80109070 */ void setHookshotReadyMaterial();
-    /* 801090EC */ void initHookshotUpperAnimeSpeed(int);
+    /* 801090EC */ int initHookshotUpperAnimeSpeed(int);
    /* 80109170 */ void initHookshotReady();
    /* 801091E4 */ void setHookshotReadyAnime();
-    /* 80109284 */ void checkUpperItemActionHookshot();
+    /* 80109284 */ int checkUpperItemActionHookshot();
    /* 801095C8 */ int checkNextActionHookshot();
    /* 801097A0 */ void setHookshotReturnEnd();
    /* 80109890 */ void setHookshotHangMoveBGCollect();
@@ -954,7 +954,9 @@ inline void dComIfGs_onEventBit(u16 i_flag) {
    g_dComIfG_gameInfo.info.getSavedata().getEvent().onEventBit(i_flag);
 }

-inline BOOL i_dComIfGs_isEventBit(u16 i_flag) {
+// debug rom says `i_flag` is not const, but it's needed to match in some places?
+// missing some other inline maybe?
+inline BOOL i_dComIfGs_isEventBit(const u16 i_flag) {
    return g_dComIfG_gameInfo.info.getEvent().isEventBit(i_flag);
 }

@@ -2566,7 +2568,7 @@ inline int dComIfG_getTimerNowTimeMs() {
    return g_dComIfG_gameInfo.play.getTimerNowTimeMs();
 }

-inline int dComIfG_setTimerNowTimeMs(int time) {
+inline void dComIfG_setTimerNowTimeMs(int time) {
    g_dComIfG_gameInfo.play.setTimerNowTimeMs(time);
 }

@@ -542,7 +542,7 @@ inline dScnKy_env_light_c* i_dKy_getEnvlight() {
    return &g_env_light;
 }

-BOOL dKy_darkworld_stage_check(char const*, int);
+u8 dKy_darkworld_stage_check(char const*, int);
 BOOL dKy_withwarp_capture_check();
 bool dKy_darkworld_check();
 void dKy_undwater_filter_draw();
@@ -3,4 +3,31 @@

 #include "dolphin/types.h"

+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef void (*AISCallback)(u32 count);
+typedef void (*AIDCallback)();
+
+AIDCallback AIRegisterDMACallback(AIDCallback callback);
+void AIInitDMA(u32 addr, u32 length);
+void AIStartDMA(void);
+void AIStopDMA(void);
+void AISetStreamPlayState(u32 state);
+u32 AIGetStreamPlayState(void);
+void AISetDSPSampleRate(u32 rate);
+u32 AIGetDSPSampleRate(void);
+void __AI_set_stream_sample_rate(u32 rate);
+u32 AIGetStreamSampleRate(void);
+void AISetStreamVolLeft(u8 vol);
+u8 AIGetStreamVolLeft(void);
+void AISetStreamVolRight(u8 vol);
+u8 AIGetStreamVolRight(void);
+void AIInit(u8* stack);
+
+#ifdef __cplusplus
+};
+#endif
+
 #endif /* AI_H */
@@ -7,8 +7,13 @@
 extern "C" {
 #endif

-u32 ARInit(u32*, u32);
-u32 ARAlloc(u32);
+typedef void (*ARCallback)(void);
+
+ARCallback ARRegisterDMACallback(ARCallback callback);
+u32 ARGetDMAStatus(void);
+void ARStartDMA(u32 type, u32 mainmem_addr, u32 aram_addr, u32 length);
+u32 ARInit(u32* stack_index_addr, u32 num_entries);
+u32 ARAlloc(u32 length);
 u32 ARGetSize(void);

 #ifdef __cplusplus
@@ -3,6 +3,492 @@

 #include "dolphin/types.h"

+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CTR     9
+#define XER     1
+#define LR      8
+
+#define UPMC1   937
+#define UPMC2   938
+#define UPMC3   941
+#define UPMC4   942
+
+#define USIA    939
+
+#define UMMCR0  936
+#define UMMCR1  940
+
+#define HID0    1008
+#define HID1    1009
+
+#define PVR     287
+
+#define IBAT0U  528
+#define IBAT0L  529
+#define IBAT1U  530
+#define IBAT1L  531
+#define IBAT2U  532
+#define IBAT2L  533
+#define IBAT3U  534
+#define IBAT3L  535
+
+#define DBAT0U  536
+#define DBAT0L  537
+#define DBAT1U  538
+#define DBAT1L  539
+#define DBAT2U  540
+#define DBAT2L  541
+#define DBAT3U  542
+#define DBAT3L  543
+
+#define SDR1    25
+
+#define SPRG0   272
+#define SPRG1   273
+#define SPRG2   274
+#define SPRG3   275
+
+#define DAR     19
+#define DSISR   18
+
+#define SRR0    26
+#define SRR1    27
+
+#define EAR     282
+
+#define DABR    1013
+
+#define TBL     284
+#define TBU     285
+
+#define L2CR    1017
+
+#define DEC     22
+
+#define IABR    1010
+
+#define PMC1    953
+#define PMC2    954
+#define PMC3    957
+#define PMC4    958
+
+#define SIA     955
+
+#define MMCR0   952
+#define MMCR1   956
+
+#define THRM1   1020
+#define THRM2   1021
+#define THRM3   1022
+
+#define ICTC    1019
+
+#define GQR0    912
+#define GQR1    913
+#define GQR2    914
+#define GQR3    915
+#define GQR4    916
+#define GQR5    917
+#define GQR6    918
+#define GQR7    919
+
+#define HID2    920
+
+#define WPAR    921
+
+#define DMA_U   922
+#define DMA_L   923
+
+#define MSR_POW         0x00040000  // Power Management
+#define MSR_ILE         0x00010000  // Interrupt Little Endian
+#define MSR_EE          0x00008000  // external interrupt
+#define MSR_PR          0x00004000  // privilege level(should be 0)
+#define MSR_FP          0x00002000  // floating point available
+#define MSR_ME          0x00001000  // machine check enable
+#define MSR_FE0         0x00000800  // floating point exception enable
+#define MSR_SE          0x00000400  // single step trace enable
+#define MSR_BE          0x00000200  // branch trace enable
+#define MSR_FE1         0x00000100  // floating point exception enable
+#define MSR_IP          0x00000040  // Exception prefix
+#define MSR_IR          0x00000020  // instruction relocate
+#define MSR_DR          0x00000010  // data relocate
+#define MSR_PM          0x00000004  // Performance monitor marked mode
+#define MSR_RI          0x00000002  // Recoverable interrupt
+#define MSR_LE          0x00000001  // Little Endian
+
+#define MSR_POW_BIT     13          // Power Management
+#define MSR_ILE_BIT     15          // Interrupt Little Endian
+#define MSR_EE_BIT      16          // external interrupt
+#define MSR_PR_BIT      17          // privilege level (should be 0)
+#define MSR_FP_BIT      18          // floating point available
+#define MSR_ME_BIT      19          // machine check enable
+#define MSR_FE0_BIT     20          // floating point exception enable
+#define MSR_SE_BIT      21          // single step trace enable
+#define MSR_BE_BIT      22          // branch trace enable
+#define MSR_FE1_BIT     23          // floating point exception enable
+#define MSR_IP_BIT      25          // Exception prefix
+#define MSR_IR_BIT      26          // instruction relocate
+#define MSR_DR_BIT      27          // data relocate
+#define MSR_PM_BIT      29          // Performance monitor marked mode
+#define MSR_RI_BIT      30          // Recoverable interrupt
+#define MSR_LE_BIT      31          // Little Endian
+
+/*---------------------------------------------------------------------------*
+    HID0 bits
+ *---------------------------------------------------------------------------*/
+#define HID0_EMCP       0x80000000  // Enable MCP
+#define HID0_DBP        0x40000000  // Enable 60x bus address and data parity chk
+#define HID0_EBA        0x20000000  // Enable 60x address parity checking
+#define HID0_EBD        0x10000000  // Enable 60x data parity checking
+#define HID0_BCLK       0x08000000  // CLK_OUT output enable and clk selection
+#define HID0_ECLK       0x02000000  // CLK_OUT output enable and clk selection
+#define HID0_PAR        0x01000000  // Disable !ARTRY precharge
+#define HID0_DOZE       0x00800000  // Doze mode enable
+#define HID0_NAP        0x00400000  // Nap mode enable
+#define HID0_SLEEP      0x00200000  // Sleep mode enable
+#define HID0_DPM        0x00100000  // Dynamic power management enable
+#define HID0_NHR        0x00010000  // Not hard reset (0 hard reset if s/w set it)
+#define HID0_ICE        0x00008000  // Instruction cache enable
+#define HID0_DCE        0x00004000  // Data cache enable
+#define HID0_ILOCK      0x00002000  // ICache lock
+#define HID0_DLOCK      0x00001000  // DCache lock
+#define HID0_ICFI       0x00000800  // ICache flash invalidate
+#define HID0_DCFI       0x00000400  // DCache flash invalidate
+#define HID0_SPD        0x00000200  // Speculative cache access enable (0 enable)
+#define HID0_IFEM       0x00000100  // Enable M bit on bus for Ifetch
+#define HID0_SGE        0x00000080  // Store gathering enable
+#define HID0_DCFA       0x00000040  // DCache flush assist - set before a flush
+#define HID0_BTIC       0x00000020  // Branch target icache enable
+#define HID0_ABE        0x00000008  // Address bcast enable
+#define HID0_BHT        0x00000004  // Branch history table enable
+#define HID0_NOOPTI     0x00000001  // No-op Dcache touch instructions
+
+#define HID0_ICE_BIT    16          // Instruction cache enable
+#define HID0_DCE_BIT    17          // Data cache enable
+#define HID0_ILOCK_BIT  18          // ICache lock
+#define HID0_DLOCK_BIT  19          // DCache lock
+
+#define HID2_LSQE           0x80000000  // L/S quantize enable
+#define HID2_WPE            0x40000000  // Write pipe enable
+#define HID2_PSE            0x20000000  // Paired single enable
+#define HID2_LCE            0x10000000  // Locked cache enable
+
+#define HID2_DCHERR         0x00800000  // ERROR: dcbz_l cache hit
+#define HID2_DNCERR         0x00400000  // ERROR: DMA access to normal cache
+#define HID2_DCMERR         0x00200000  // ERROR: DMA cache miss error
+#define HID2_DQOERR         0x00100000  // ERROR: DMA queue overflow
+#define HID2_DCHEE          0x00080000  // dcbz_l cache hit error enable
+#define HID2_DNCEE          0x00040000  // DMA access to normal cache error enable
+#define HID2_DCMEE          0x00020000  // DMA cache miss error error enable
+#define HID2_DQOEE          0x00010000  // DMA queue overflow error enable
+
+#define HID2_DMAQL_MASK     0x0F000000  // DMA queue length mask
+#define HID2_DMAQL_SHIFT    24          // DMA queue shift
+
+#define HID2_LSQE_BIT       0
+#define HID2_WPE_BIT        1
+#define HID2_PSE_BIT        2
+#define HID2_LCE_BIT        3
+
+#define HID2_DCHERR_BIT     8
+#define HID2_DNCERR_BIT     9
+#define HID2_DCMERR_BIT     10
+#define HID2_DQOERR_BIT     11
+#define HID2_DCHEE_BIT      12
+#define HID2_DNCEE_BIT      13
+#define HID2_DCMEE_BIT      14
+#define HID2_DQOEE_BIT      15
+
+#define GQR_LOAD_SCALE_MASK         0x3F000000  // load scale field
+#define GQR_LOAD_TYPE_MASK          0x00070000  // load type field
+#define GQR_STORE_SCALE_MASK        0x00003F00  // store scale field
+#define GQR_STORE_TYPE_MASK         0x00000007  // store type field
+
+typedef struct {
+    u32 _pad0       :2;
+    u32 loadScale   :6;
+    u32 _pad1       :5;
+    u32 loadType    :3;
+    u32 _pad2       :2;
+    u32 storeScale  :6;
+    u32 _pad3       :5;
+    u32 storeType   :3;
+} PPC_GQR_t;
+
+typedef union {
+    u32         val;
+    PPC_GQR_t   f;
+} PPC_GQR_u;
+
+
+#define DMA_U_ADDR_MASK             0xFFFFFFE0  // Start addr in memory
+#define DMA_U_LEN_U_MASK            0x0000001F  // lines to transfer (U)
+
+#define DMA_L_LC_ADDR_MASK          0xFFFFFFE0  // Start addr in LC
+#define DMA_L_LOAD                  0x00000010  // 0 - store, 1 - load
+#define DMA_L_STORE                 0x00000000  // 0 - store, 1 - load
+#define DMA_L_LEN_MASK              0x0000000C  // lines to transfer (L)
+#define DMA_L_TRIGGER               0x00000002  // 0 - cmd inactive, 1 - cmd rdy
+#define DMA_L_FLUSH                 0x00000001  // 1 - Flush DMA queue
+
+typedef struct {
+    u32 memAddr     :27;
+    u32 dmaLenU     :5;
+} PPC_DMA_U_t;
+
+typedef union {
+    u32             val;
+    PPC_DMA_U_t     f;
+} PPC_DMA_U_u;
+
+
+typedef struct {
+    u32 lcAddr      :27;
+    u32 dmaLd       :1;
+    u32 dmaLenL     :2;
+    u32 dmaTrigger  :1;
+    u32 dmaFlush    :1;
+} PPC_DMA_L_t;
+
+
+typedef union {
+    u32             val;
+    PPC_DMA_L_t     f;
+} PPC_DMA_L_u;
+
+
+#define WPAR_ADDR                   0xFFFFFFE0  // 32byte gather address
+#define WPAR_BNE                    0x00000001  // Buffer not empty (R)
+
+#define SRR1_DMA_BIT                0x00200000
+#define SRR1_L2DP_BIT               0x00100000
+
+#define L2CR_L2E                    0x80000000  // L2 Enable
+#define L2CR_L2PE                   0x40000000  // L2 data parity generation and checking enable
+
+#define L2CR_L2SIZ_256K             0x10000000  // L2 size 256K
+#define L2CR_L2SIZ_512K             0x20000000  // L2 size 512
+#define L2CR_L2SIZ_1M               0x30000000  // L2 size 1M
+
+#define L2CR_L2CLK_1_0              0x02000000  // L2 clock ratio 1
+#define L2CR_L2CLK_1_5              0x04000000  // L2 clock ratio 1.5
+#define L2CR_L2CLK_2_0              0x08000000  // L2 clock ratio 2
+#define L2CR_L2CLK_2_5              0x0A000000  // L2 clock ratio 2.5
+#define L2CR_L2CLK_3_0              0x0C000000  // L2 clock ratio 3
+
+#define L2CR_RAM_FLOW_THRU_BURST    0x00000000  // L2 RAM type flow-through sync. burst SRAM
+#define L2CR_RAM_PIPELINE_BURST     0x01000000  // L2 RAM type pipelined sync. burst SRAM
+#define L2CR_RAM_PIPELINE_LATE      0x01800000  // L2 RAM type pipelined sync. late-write SRAM
+
+#define L2CR_L2DO                   0x00400000  // Data only
+#define L2CR_L2I                    0x00200000  // Global invalidate
+#define L2CR_L2CTL                  0x00100000  // ZZ enable
+#define L2CR_L2WT                   0x00080000  // L2 write through
+#define L2CR_L2TS                   0x00040000  // L2 test support
+
+#define L2CR_L2OH_0_5               0x00000000  // L2 output hold 0.5 ns
+#define L2CR_L2OH_1_0               0x00010000  // L2 output hold 1.0 ns
+
+#define L2CR_L2SL                   0x00008000  // L2 DLL slow
+#define L2CR_L2DF                   0x00004000  // L2 differential clock
+#define L2CR_L2BYP                  0x00002000  // L2 DLL bypass
+#define L2CR_L2CS                   0x00000200  // L2 clock stop
+#define L2CR_L2DRO                  0x00000100  // L2 DLL rollover checkstop enable
+#define L2CR_L2CTR_MASK             0x000000FE  // L2 counter value mask
+#define L2CR_L2IP                   0x00000001  // L2 global invalidate in progress
+
+#define MMCR0_DIS                   0x80000000  // Disables counting unconditionally
+#define MMCR0_DP                    0x40000000  // Disables counting while in supervisor mode
+#define MMCR0_DU                    0x20000000  // Disables counting while in user mode
+#define MMCR0_DMS                   0x10000000  // Disables counting while MSR[PM] is set
+#define MMCR0_DMR                   0x08000000  // Disables counting while MSR[PM] is zero
+#define MMCR0_ENINT                 0x04000000  // Enables performance monitor interrupt signaling
+#define MMCR0_DISCOUNT              0x02000000  // Disables counting of PMCn when a performance monitor interrupt is signaled or...
+#define MMCR0_RTCSELECT_MASK        0x01800000  // 64-bit time base, bit selection enable
+#define MMCR0_RTCSELECT_63          0x00000000  // Pick bit 63 to count
+#define MMCR0_RTCSELECT_55          0x00800000  // Pick bit 55 to count
+#define MMCR0_RTCSELECT_51          0x01000000  // Pick bit 51 to count
+#define MMCR0_RTCSELECT_47          0x01800000  // Pick bit 47 to count
+#define MMCR0_INTONBITTRANS         0x00400000  // Causes interrupt signaling on bit transition from off to on
+#define MMCR0_THRESHOLD_MASK        0x003F0000  // Threshold value
+#define MMCR0_THRESHOLD(n)          ((n) << 16) // Threshold value (0 - 63)
+#define MMCR0_PMC1INTCONTROL        0x00008000  // Enables interrupt signaling due to PMC1 counter overflow
+#define MMCR0_PMC2INTCONTROL        0x00004000  // Enables interrupt signaling due to PMC2-PMC4 counter overflow
+#define MMCR0_PMCTRIGGER            0x00002000  // Can be used to trigger counting of PMC2-PMC4 after PMC1 has overflowed or...
+#define MMCR0_PMC1SELECT_MASK       0x00001FC0  // PMC1 input selector
+#define MMCR0_PMC2SELECT_MASK       0x0000003F  // PMC2 input selector
+
+#define MMCR1_PMC3SELECT_MASK       0xF8000000  // PMC3 input selector
+#define MMCR1_PMC4SELECT_MASK       0x07C00000  // PMC4 input selector
+
+#define PMC1_OV                     0x80000000  // Overflow
+#define PMC1_COUNTER                0x7FFFFFFF  // Counter value
+#define PMC2_OV                     0x80000000  // Overflow
+#define PMC2_COUNTER                0x7FFFFFFF  // Counter value
+#define PMC3_OV                     0x80000000  // Overflow
+#define PMC3_COUNTER                0x7FFFFFFF  // Counter value
+#define PMC4_OV                     0x80000000  // Overflow
+#define PMC4_COUNTER                0x7FFFFFFF  // Counter value
+
+/*---------------------------------------------------------------------------*
+    PMC1 Events
+ *---------------------------------------------------------------------------*/
+#define MMCR0_PMC1_HOLD             0x00000000  // Register holds current value
+#define MMCR0_PMC1_CYCLE            0x00000040  // Processor cycles
+#define MMCR0_PMC1_INSTRUCTION      0x00000080  // # of instructions completed.
+#define MMCR0_PMC1_TRANSITION       0x000000C0  // # of transitions for 0 to 1
+#define MMCR0_PMC1_DISPATCHED       0x00000100  // # of instructions dispatched
+#define MMCR0_PMC1_EIEIO            0x00000140  // # of eieio instructions completed
+#define MMCR0_PMC1_ITLB_CYCLE       0x00000180  // # of cycles spent performing table search op. for the ITLB
+#define MMCR0_PMC1_L2_HIT           0x000001C0  // # of access that hit the L2.
+#define MMCR0_PMC1_EA               0x00000200  // # of valid instruction EAs delivered to the memory subsystem
+#define MMCR0_PMC1_IABR             0x00000240  // # of time the address of an instruction matches the IABR
+#define MMCR0_PMC1_L1_MISS          0x00000280  // # of loads that miss the L1
+#define MMCR0_PMC1_Bx_UNRESOLVED    0x000002C0  // # of branches that are unresolved when processed
+#define MMCR0_PMC1_Bx_STALL_CYCLE   0x00000300  // # of cycles that dispatcher stalls due to a second
+                                                //      unresolved branch in the instruction stream
+#define MMCR0_PMC1_IC_FETCH_MISS    0x00000340  // # of times an instruction fetch missed the L1 Icache
+#define MMCR0_PMC2_HOLD             0x00000000  // Register holds current value
+#define MMCR0_PMC2_CYCLE            0x00000001  // Processor cycles
+#define MMCR0_PMC2_INSTRUCTION      0x00000002  // # of instructions completed
+#define MMCR0_PMC2_TRANSITION       0x00000003  // # of time-base (lower) bit transitions
+#define MMCR0_PMC2_DISPATCHED       0x00000004  // # of instructions dispatched
+#define MMCR0_PMC2_IC_MISS          0x00000005  // # of L1 instruction cache misses
+#define MMCR0_PMC2_ITLB_MISS        0x00000006  // # of ITLB misses
+#define MMCR0_PMC2_L2_I_MISS        0x00000007  // # of L2 instruction misses
+#define MMCR0_PMC2_Bx_FALL_TROUGH   0x00000008  // # of fall-through branches
+#define MMCR0_PMC2_PR_SWITCH        0x00000009  // # of MSR[PR] bit toggles
+#define MMCR0_PMC2_RESERVED_LOAD    0x0000000A  // # of reserved loads completed
+#define MMCR0_PMC2_LOAD_STORE       0x0000000B  // # of completed loads and stores
+#define MMCR0_PMC2_SNOOP            0x0000000C  // # of snoops
+#define MMCR0_PMC2_L1_CASTOUT       0x0000000D  // # of L1 castouts to L2
+#define MMCR0_PMC2_SYSTEM           0x0000000E  // # of completed system unit instructions
+#define MMCR0_PMC2_IC_FETCH_MISS    0x0000000F  // # of instruction fetch misses in the L1
+#define MMCR0_PMC2_Bx_OUT_OF_ORDER  0x00000010  // # of branches allowing out-of-order execution
+
+/*---------------------------------------------------------------------------*
+    PMC3 Events
+ *---------------------------------------------------------------------------*/
+#define MMCR1_PMC3_HOLD             0x00000000  // Register holds current value
+#define MMCR1_PMC3_CYCLE            0x08000000  // Processor cycles
+#define MMCR1_PMC3_INSTRUCTION      0x10000000  // # of instructions completed
+#define MMCR1_PMC3_TRANSITION       0x18000000  // # of time-base (lower) bit transitions
+#define MMCR1_PMC3_DISPATCHED       0x20000000  // # of instructions dispatched
+#define MMCR1_PMC3_DC_MISS          0x28000000  // # of L1 data cache misses
+#define MMCR1_PMC3_DTLB_MISS        0x30000000  // # of DTLB misses
+#define MMCR1_PMC3_L2_D_MISS        0x38000000  // # of L2 data misses
+#define MMCR1_PMC3_Bx_TAKEN         0x40000000  // # predicted branches that were taken
+#define MMCR1_PMC3_PM_SWITCH        0x48000000  // # of transitions between marked and unmarked processes
+#define MMCR1_PMC3_COND_STORE       0x50000000  // # of store conditional instructions completed
+#define MMCR1_PMC3_FPU              0x58000000  // # of instructions completed from the FPU
+#define MMCR1_PMC3_L2_SNOOP_CASTOUT 0x60000000  // # of L2 castout caused by snoops to modified lines
+#define MMCR1_PMC3_L2_HIT           0x68000000  // # of cache operations that hit in the L2 cache
+#define MMCR1_PMC3_L1_MISS_CYCLE    0x78000000  // # of cycles generated by L1 load misses
+#define MMCR1_PMC3_Bx_SECOND        0x80000000  // # of branches in the second speculative branch
+                                                //   resolved correctly
+#define MMCR1_PMC3_BPU_LR_CR        0x88000000  // # of cycles the BPU stalls due to LR or CR unresolved
+                                                //   dependencies
+
+#define MMCR1_PMC4_HOLD             0x00000000  // Register holds current value
+#define MMCR1_PMC4_CYCLE            0x00400000  // Processor cycles
+#define MMCR1_PMC4_INSTRUCTION      0x00800000  // # of instructions completed
+#define MMCR1_PMC4_TRANSITION       0x00C00000  // # of time-base (lower) bit transitions
+#define MMCR1_PMC4_DISPATCHED       0x01000000  // # of instructions dispatched
+#define MMCR1_PMC4_L2_CASTOUT       0x01400000  // # of L2 castouts
+#define MMCR1_PMC4_DTLB_CYCLE       0x01800000  // # of cycles spent performing table searches for DTLB accesses
+#define MMCR1_PMC4_Bx_MISSED        0x02000000  // # of mispredicted branches
+#define MMCR1_PMC4_COND_STORE_INT   0x02800000  // # of store conditional instructions completed
+                                                //   with reservation intact
+#define MMCR1_PMC4_SYNC             0x02C00000  // # of completed sync instructions
+#define MMCR1_PMC4_SNOOP_RETRY      0x03000000  // # of snoop request retries
+#define MMCR1_PMC4_INTEGER          0x03400000  // # of completed integer operations
+#define MMCR1_PMC4_BPU_THIRD        0x03800000  // # of cycles the BPU cannot process new branches
+                                                //   due to having two unresolved branches
+#define MMCR1_PMC4_DC_MISS          0x07C00000  // # of L1 data cache misses
+
+/*---------------------------------------------------------------------------*
+    FPSCR bits
+ *---------------------------------------------------------------------------*/
+#ifndef FPSCR_FX
+#define FPSCR_FX            0x80000000  // Exception summary
+#define FPSCR_FEX           0x40000000  // Enabled exception summary
+#define FPSCR_VX            0x20000000  // Invalid operation
+#define FPSCR_OX            0x10000000  // Overflow exception
+#define FPSCR_UX            0x08000000  // Underflow exception
+#define FPSCR_ZX            0x04000000  // Zero divide exception
+#define FPSCR_XX            0x02000000  // Inexact exception
+#define FPSCR_VXSNAN        0x01000000  // SNaN
+#define FPSCR_VXISI         0x00800000  // Infinity - Infinity
+#define FPSCR_VXIDI         0x00400000  // Infinity / Infinity
+#define FPSCR_VXZDZ         0x00200000  // 0 / 0
+#define FPSCR_VXIMZ         0x00100000  // Infinity * 0
+#define FPSCR_VXVC          0x00080000  // Invalid compare
+#define FPSCR_FR            0x00040000  // Fraction rounded
+#define FPSCR_FI            0x00020000  // Fraction inexact
+#define FPSCR_VXSOFT        0x00000400  // Software request
+#define FPSCR_VXSQRT        0x00000200  // Invalid square root
+#define FPSCR_VXCVI         0x00000100  // Invalid integer convert
+#define FPSCR_VE            0x00000080  // Invalid operation exception enable
+#define FPSCR_OE            0x00000040  // Overflow exception enable
+#define FPSCR_UE            0x00000020  // Underflow exception enable
+#define FPSCR_ZE            0x00000010  // Zero divide exception enable
+#define FPSCR_XE            0x00000008  // Inexact exception enable
+#define FPSCR_NI            0x00000004  // Non-IEEE mode
+#endif
+
+#ifndef FPSCR_FX_BIT
+#define FPSCR_FX_BIT        0           // Exception summary
+#define FPSCR_FEX_BIT       1           // Enabled exception summary
+#define FPSCR_VX_BIT        2           // Invalid operation
+#define FPSCR_OX_BIT        3           // Overflow exception
+#define FPSCR_UX_BIT        4           // Underflow exception
+#define FPSCR_ZX_BIT        5           // Zero divide exception
+#define FPSCR_XX_BIT        6           // Inexact exception
+#define FPSCR_VXSNAN_BIT    7           // SNaN
+#define FPSCR_VXISI_BIT     8           // Infinity - Infinity
+#define FPSCR_VXIDI_BIT     9           // Infinity / Infinity
+#define FPSCR_VXZDZ_BIT     10          // 0 / 0
+#define FPSCR_VXIMZ_BIT     11          // Infinity * 0
+#define FPSCR_VXVC_BIT      12          // Invalid compare
+#define FPSCR_FR_BIT        13          // Fraction rounded
+#define FPSCR_FI_BIT        14          // Fraction inexact
+#define FPSCR_VXSOFT_BIT    21          // Software request
+#define FPSCR_VXSQRT_BIT    22          // Invalid square root
+#define FPSCR_VXCVI_BIT     23          // Invalid integer convert
+#define FPSCR_VE_BIT        24          // Invalid operation exception enable
+#define FPSCR_OE_BIT        25          // Overflow exception enable
+#define FPSCR_UE_BIT        26          // Underflow exception enable
+#define FPSCR_ZE_BIT        27          // Zero divide exception enable
+#define FPSCR_XE_BIT        28          // Inexact exception enable
+#define FPSCR_NI_BIT        29          // Non-IEEE mode
+#endif
+
+u32 PPCMfmsr(void);
+void PPCMtmsr(register u32 newMSR);
+u32 PPCMfhid0(void);
+void PPCMthid0(register u32 newHID0);
+u32 PPCMfl2cr(void);
+void PPCMtl2cr(register u32 newL2cr);
+void PPCMtdec(register u32 newDec);
+void PPCSync(void);
+void PPCHalt(void);
+void PPCMtmmcr0(register u32 newMmcr0);
+void PPCMtmmcr1(register u32 newMmcr1);
+void PPCMtpmc1(register u32 newPmc1);
+void PPCMtpmc2(register u32 newPmc2);
+void PPCMtpmc3(register u32 newPmc3);
+void PPCMtpmc4(register u32 newPmc4);
+u32 PPCMffpscr(void);
+void PPCMtfpscr(register u32 newFPSCR);
+u32 PPCMfhid2(void);
+void PPCMthid2(register u32 newhid2);
+void PPCMtwpar(register u32 newwpar);
+void PPCDisableSpeculation(void);
+void PPCSetFpNonIEEEMode(void);
+
 union FpscrUnion {
    f64 f;
    struct {
@@ -11,4 +497,8 @@ union FpscrUnion {
    }   u;
 };

+#ifdef __cplusplus
+};
+#endif
+
 #endif /* PPCARCH_H */
@@ -0,0 +1,180 @@
+#ifndef CARDPRIV_H
+#define CARDPRIV_H
+
+#include "dolphin/types.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CARD_FAT_AVAIL 0x0000u
+#define CARD_FAT_CHECKSUM 0x0000u
+#define CARD_FAT_CHECKSUMINV 0x0001u
+#define CARD_FAT_CHECKCODE 0x0002u
+#define CARD_FAT_FREEBLOCKS 0x0003u
+#define CARD_FAT_LASTSLOT 0x0004u
+
+#define CARD_PAGE_SIZE 128u
+#define CARD_SEG_SIZE 512u
+
+#define CARD_NUM_SYSTEM_BLOCK 5
+#define CARD_SYSTEM_BLOCK_SIZE (8 * 1024u)
+
+#define CARD_MAX_MOUNT_STEP (CARD_NUM_SYSTEM_BLOCK + 2)
+
+typedef struct CARDDir {
+    u8 gameName[4];
+    u8 company[2];
+    u8 _padding0;
+    u8 bannerFormat;
+    u8 fileName[CARD_FILENAME_MAX];
+    u32 time;  // seconds since 01/01/2000 midnight
+
+    u32 iconAddr;  // 0xFFFFFFFF if not used
+    u16 iconFormat;
+    u16 iconSpeed;
+
+    u8 permission;
+    u8 copyTimes;
+    u16 startBlock;
+    u16 length;
+    u8 _padding1[2];
+
+    u32 commentAddr;  // 0xFFFFFFFF if not used
+} CARDDir;
+
+typedef struct CARDDirCheck {
+    u8 padding0[64 - 2 * 4];
+    u16 padding1;
+    s16 checkCode;
+    u16 checkSum;
+    u16 checkSumInv;
+} CARDDirCheck;
+
+typedef struct CARDControl {
+    /* 0x000 */ BOOL attached;
+    /* 0x004 */ s32 result;
+    /* 0x008 */ u16 size;
+    /* 0x00A */ u16 pageSize;
+    /* 0x00C */ s32 sectorSize;
+    /* 0x010 */ u16 cBlock;
+    /* 0x012 */ u16 vendorID;
+    /* 0x014 */ s32 latency;
+    /* 0x018 */ u8 id[12];
+    /* 0x024 */ int mountStep;
+    /* 0x028 */ int formatStep;
+    /* 0x02C */ u32 scramble;
+    /* 0x030 */ DSPTaskInfo task;
+    /* 0x080 */ void* workArea;
+    /* 0x084 */ CARDDir* currentDir;
+    /* 0x088 */ u16* currentFat;
+    /* 0x08C */ OSThreadQueue threadQueue;
+    /* 0x094 */ u8 cmd[9];
+    /* 0x0A0 */ s32 cmdlen;
+    /* 0x0A4 */ vu32 mode;
+    /* 0x0A8 */ int retry;
+    /* 0x0AC */ int repeat;
+    /* 0x0B0 */ u32 addr;
+    /* 0x0B4 */ void* buffer;
+    /* 0x0B8 */ s32 xferred;
+    /* 0x0BC */ u16 freeNo;
+    /* 0x0BE */ u16 startBlock;
+    /* 0x0C0 */ CARDFileInfo* fileInfo;
+    /* 0x0C4 */ CARDCallback extCallback;
+    /* 0x0C8 */ CARDCallback txCallback;
+    /* 0x0CC */ CARDCallback exiCallback;
+    /* 0x0D0 */ CARDCallback apiCallback;
+    /* 0x0D4 */ CARDCallback xferCallback;
+    /* 0x0D8 */ CARDCallback eraseCallback;
+    /* 0x0DC */ CARDCallback unlockCallback;
+    /* 0x0E0 */ OSAlarm alarm;
+    /* 0x108 */ u32 cid;
+    /* 0x10C */ const DVDDiskID* diskID;
+} CARDControl;
+
+typedef struct CARDID {
+    u8 serial[32];  // flashID[12] + timebase[8] + counterBias[4] + language[4] + XXX[4]
+    u16 deviceID;
+    u16 size;
+    u16 encode;  // character set -- 0: S-JIS, 1: ANSI
+
+    u8 padding[512 - 32 - 5 * 2];
+
+    u16 checkSum;
+    u16 checkSumInv;
+} CARDID;
+
+void __CARDDefaultApiCallback(s32 chan, s32 result);
+s32 __CARDEraseSector(s32 chan, u32 addr, CARDCallback callback);
+s32 __CARDPutControlBlock(struct CARDControl* card, s32 result);
+void __CARDSyncCallback(s32 chan, s32 result);
+u16* __CARDGetFatBlock(CARDControl* card);
+
+/* CARDBios */
+void __CARDExtHandler(s32 chan, OSContext* context);
+void __CARDExiHandler(s32 chan, OSContext* context);
+void __CARDTxHandler(s32 chan, OSContext* context);
+void __CARDUnlockedHandler(s32 chan, OSContext* context);
+s32 __CARDEnableInterrupt(s32 chan, BOOL enable);
+s32 __CARDReadStatus(s32 chan, u8* status);
+void __CARDReadVendorID();
+s32 __CARDClearStatus(s32 chan);
+s32 __CARDStart(s32 chan, CARDCallback txCallback, CARDCallback exiCallback);
+s32 __CARDReadSegment(s32 chan, CARDCallback callback);
+s32 __CARDWritePage(s32 chan, CARDCallback callback);
+u16 __CARDGetFontEncode(void);
+void __CARDSetDiskID(const DVDDiskID* id);
+s32 __CARDGetControlBlock(s32 chan, struct CARDControl** pcard);
+s32 __CARDSync(s32 chan);
+
+/* CARDBlock */
+s32 __CARDAllocBlock(s32 chan, u32 cBlock, CARDCallback callback);
+s32 __CARDUpdateFatBlock(s32 chan, u16* fat, CARDCallback callback);
+
+/* CARDCheck */
+void __CARDCheckSum(void* ptr, int length, u16* checksum, u16* checksumInv);
+s32 __CARDVerify(CARDControl* card);
+
+/* CARDDir */
+CARDDir* __CARDGetDirBlock(CARDControl* card);
+s32 __CARDUpdateDir(s32 chan, CARDCallback callback);
+
+/* CARDFormat */
+s32 __CARDFormatRegionAsync(s32 chan, u16 encode, CARDCallback callback);
+
+/* CARDMount */
+void __CARDMountCallback(s32 chan, s32 result);
+
+/* CARDOpen */
+BOOL __CARDCompareFileName(CARDDir* ent, const char* fileName);
+s32 __CARDAccess(CARDControl* card, CARDDir* ent);
+s32 __CARDIsWritable(CARDControl* card, CARDDir* ent);
+s32 __CARDIsReadable(CARDControl* card, CARDDir* ent);
+
+/* CARDRdwr */
+s32 __CARDRead(s32 chan, u32 addr, s32 length, void* dst, CARDCallback callback);
+s32 __CARDWrite(s32 chan, u32 addr, s32 length, void* dst, CARDCallback callback);
+
+/* CARDRead */
+s32 __CARDSeek(CARDFileInfo* fileInfo, s32 length, s32 offset, CARDControl** pcard);
+
+/* CARDUnlock */
+s32 __CARDUnlock(s32 chan, u8 flashID[12]);
+
+#define CARDIsValidBlockNo(card, iBlock)                                                           \
+    (CARD_NUM_SYSTEM_BLOCK <= (iBlock) && (iBlock) < (card)->cBlock)
+#define __CARDGetDirCheck(dir) ((CARDDirCheck*)&(dir)[CARD_MAX_FILE])
+
+#define TRUNC(n, a) (((u32)(n)) & ~((a)-1))
+#define OFFSET(n, a) (((u32)(n)) & ((a)-1))
+
+extern CARDControl __CARDBlock[2];
+extern DVDDiskID __CARDDiskNone;
+extern u16 __CARDVendorID;
+extern u8 data_80450A72;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CARDPRIV_H */
@@ -3,71 +3,172 @@

 #include "dolphin/types.h"

-#define CARD_ERROR_UNLOCKED 1
-#define CARD_ERROR_READY 0
-#define CARD_ERROR_BUSY -1
-#define CARD_ERROR_WRONGDEVICE -2
-#define CARD_ERROR_NOCARD -3
-#define CARD_ERROR_NOFILE -4
-#define CARD_ERROR_IOERROR -5
-#define CARD_ERROR_BROKEN -6
-#define CARD_ERROR_EXIST -7
-#define CARD_ERROR_NOENT -8
-#define CARD_ERROR_INSSPACE -9
-#define CARD_ERROR_NOPERM -10
-#define CARD_ERROR_LIMIT -11
-#define CARD_ERROR_NAMETOOLONG -12
-#define CARD_ERROR_ENCODING -13
-#define CARD_ERROR_CANCELED -14
-#define CARD_ERROR_FATAL_ERROR -128
-
-struct CARDFileInfo {
-    /* 0x00 */ s32 channel;
-    /* 0x04 */ s32 fileNo;
-    /* 0x08 */ u32 offset;
-    /* 0x0C */ u16 iconIndex;
-    /* 0x0E */ u16 commentIndex;
-    /* 0x10 */ u16 field_0x10;
-};  // Size: 0x10
-
-struct CARDStat {
-    /* 0x00 */ char filename[32];
-    /* 0x20 */ u32 length;
-    /* 0x24 */ u32 time;
-    /* 0x28 */ char gamecode[4];
-    /* 0x2C */ char company[2];
-    /* 0x2E */ u8 gameVersion;
-    /* 0x2F */ u8 bannerFormat;
-    /* 0x30 */ u32 iconAddress;
-    /* 0x34 */ u16 iconFormat;
-    /* 0x36 */ u16 iconSpeed;
-    /* 0x38 */ u32 commentAddress;
-    /* 0x3C */ u32 bannerOffset;
-    /* 0x40 */ u32 bannerPalOffset;
-    /* 0x44 */ u32 iconOffset[8];
-    /* 0x64 */ u32 iconPalOffset;
-    /* 0x68 */ u32 dataOffset;
-};  // Size: 0x6C
-
-typedef void (*CARDCallback)(s32 channel, s32 result);
-
+#ifdef __cplusplus
 extern "C" {
-s32 CARDInit(void);
-s32 CARDFreeBlocks(s32 channel, s32* free_bytes, s32* free_files);
-s32 CARDCheck(s32 channel);
-s32 CARDProbe(s32 channel);
-s32 CARDProbeEx(s32 channel, s32* mem_size, s32* sect_size);
-s32 CARDMount(s32 channel, void* buffer, CARDCallback callback);
-s32 CARDUnmount(s32 channel);
-s32 CARDFormat(s32 channel);
-s32 CARDOpen(s32 channel, const char* filename, CARDFileInfo* file);
-s32 CARDClose(CARDFileInfo* file);
-s32 CARDCreate(s32 channel, const char* filename, u32 size, CARDFileInfo* file);
-s32 CARDRead(CARDFileInfo* file, void* buffer, u32 size, u32 offset);
-s32 CARDWrite(CARDFileInfo* file, void* buffer, u32 size, u32 offset);
-s32 CARDGetStatus(s32 channel, s32 fileNo, CARDStat* stat);
-s32 CARDSetStatus(s32 channel, s32 fileNo, CARDStat* stat);
-s32 CARDGetSerialNo(s32 channel, u32* serial1, u32* serial2);
-};
+#endif
+
+#define CARD_ENCODE_ANSI 0u
+#define CARD_ENCODE_SJIS 1u
+
+/* Sizes */
+#define CARD_WORKAREA_SIZE (5 * 8 * 1024)
+#define CARD_READ_SIZE 512
+#define CARD_MAX_FILE 127
+#define CARD_COMMENT_SIZE 64
+#define CARD_FILENAME_MAX 32
+#define CARD_ICON_MAX 8
+#define CARD_ICON_WIDTH 32
+#define CARD_ICON_HEIGHT 32
+#define CARD_BANNER_WIDTH 96
+#define CARD_BANNER_HEIGHT 32
+
+/* Icon animation */
+#define CARD_MODE_NORMAL 0
+#define CARD_MODE_FAST 1
+
+#define CARDGetBannerFormat(stat) (((stat)->bannerFormat) & CARD_STAT_BANNER_MASK)
+#define CARDGetIconAnim(stat) (((stat)->bannerFormat) & CARD_STAT_ANIM_MASK)
+#define CARDGetIconFormat(stat, n) (((stat)->iconFormat >> (2 * (n))) & CARD_STAT_ICON_MASK)
+#define CARDGetIconSpeed(stat, n) (((stat)->iconSpeed >> (2 * (n))) & CARD_STAT_SPEED_MASK)
+#define CARDSetBannerFormat(stat, f)                                                               \
+  ((stat)->bannerFormat = (u8)(((stat)->bannerFormat & ~CARD_STAT_BANNER_MASK) | (f)))
+#define CARDSetIconAnim(stat, f)                                                                   \
+  ((stat)->bannerFormat = (u8)(((stat)->bannerFormat & ~CARD_STAT_ANIM_MASK) | (f)))
+#define CARDSetIconFormat(stat, n, f)                                                              \
+  ((stat)->iconFormat =                                                                            \
+       (u16)(((stat)->iconFormat & ~(CARD_STAT_ICON_MASK << (2 * (n)))) | ((f) << (2 * (n)))))
+#define CARDSetIconSpeed(stat, n, f)                                                               \
+  ((stat)->iconSpeed =                                                                             \
+       (u16)(((stat)->iconSpeed & ~(CARD_STAT_SPEED_MASK << (2 * (n)))) | ((f) << (2 * (n)))))
+#define CARDSetIconAddress(stat, addr) ((stat)->iconAddr = (u32)(addr))
+#define CARDSetCommentAddress(stat, addr) ((stat)->commentAddr = (u32)(addr))
+#define CARDGetFileNo(fileInfo) ((fileInfo)->fileNo)
+
+#define CARD_RESULT_UNLOCKED 1
+#define CARD_RESULT_READY 0
+#define CARD_RESULT_BUSY -1
+#define CARD_RESULT_WRONGDEVICE -2
+#define CARD_RESULT_NOCARD -3
+#define CARD_RESULT_NOFILE -4
+#define CARD_RESULT_IOERROR -5
+#define CARD_RESULT_BROKEN -6
+#define CARD_RESULT_EXIST -7
+#define CARD_RESULT_NOENT -8
+#define CARD_RESULT_INSSPACE -9
+#define CARD_RESULT_NOPERM -10
+#define CARD_RESULT_LIMIT -11
+#define CARD_RESULT_NAMETOOLONG -12
+#define CARD_RESULT_ENCODING -13
+#define CARD_RESULT_CANCELED -14
+#define CARD_RESULT_FATAL_ERROR -128
+
+#define CARD_STAT_ICON_NONE 0
+#define CARD_STAT_ICON_C8 1
+#define CARD_STAT_ICON_RGB5A3 2
+#define CARD_STAT_ICON_MASK 3
+
+#define CARD_STAT_BANNER_NONE 0
+#define CARD_STAT_BANNER_C8 1
+#define CARD_STAT_BANNER_RGB5A3 2
+#define CARD_STAT_BANNER_MASK 3
+
+#define CARD_STAT_ANIM_LOOP 0x00
+#define CARD_STAT_ANIM_BOUNCE 0x04
+#define CARD_STAT_ANIM_MASK 0x04
+
+#define CARD_STAT_SPEED_END 0
+#define CARD_STAT_SPEED_FAST 1
+#define CARD_STAT_SPEED_MIDDLE 2
+#define CARD_STAT_SPEED_SLOW 3
+#define CARD_STAT_SPEED_MASK 3
+
+#define CARD_ATTR_PUBLIC 0x04u
+#define CARD_ATTR_NO_COPY 0x08u
+#define CARD_ATTR_NO_MOVE 0x10u
+#define CARD_ATTR_GLOBAL 0x20u
+#define CARD_ATTR_COMPANY 0x40u
+
+typedef struct CARDFileInfo {
+  s32 chan;
+  s32 fileNo;
+
+  s32 offset;
+  s32 length;
+  u16 iBlock;
+  u16 __padding;
+} CARDFileInfo;
+
+typedef struct CARDStat {
+  char fileName[CARD_FILENAME_MAX];
+  u32 length;
+  u32 time; // seconds since 01/01/2000 midnight
+  u8 gameName[4];
+  u8 company[2];
+
+  u8 bannerFormat;
+  u8 __padding;
+  u32 iconAddr; // offset to the banner, bannerTlut, icon, iconTlut data set.
+  u16 iconFormat;
+  u16 iconSpeed;
+  u32 commentAddr; // offset to the pair of 32 byte character strings.
+
+  u32 offsetBanner;
+  u32 offsetBannerTlut;
+  u32 offsetIcon[CARD_ICON_MAX];
+  u32 offsetIconTlut;
+  u32 offsetData;
+} CARDStat;
+
+typedef void (*CARDCallback)(s32 chan, s32 result);
+
+/* CARDBios */
+void CARDInit(void);
+BOOL CARDGetFastMode(void);
+s32 CARDFreeBlocks(s32 chan, s32* byteNotUsed, s32* filesNotUsed);
+
+/* CARDCheck */
+s32 CARDCheck(s32 chan);
+static s32 CARDCheckExAsync(s32 chan, s32* xferBytes, CARDCallback callback);
+
+/* CARDCreate */
+static s32 CARDCreateAsync(s32 chan, const char* fileName, u32 size, CARDFileInfo* fileInfo,
+                           CARDCallback callback);
+s32 CARDCreate(s32 chan, const char* fileName, u32 size, CARDFileInfo* fileInfo);
+
+/* CARDFormat */
+s32 CARDFormat(s32 chan);
+
+/* CARDMount */
+s32 CARDProbe(s32 chan);
+s32 CARDProbeEx(s32 chan, s32* memSize, s32* sectorSize);
+s32 CARDMount(s32 chan, void* workArea, CARDCallback attachCb);
+s32 CARDUnmount(s32 chan);
+static s32 CARDMountAsync(s32 chan, void* workArea, CARDCallback detachCb, CARDCallback attachCb);
+
+/* CARDNet */
+s32 CARDGetSerialNo(s32 chan, u64* serialNo);
+
+/* CARDOpen */
+s32 CARDOpen(s32 chan, const char* fileName, CARDFileInfo* fileInfo);
+s32 CARDClose(CARDFileInfo* fileInfo);
+
+/* CARDRead */
+static s32 CARDReadAsync(CARDFileInfo* fileInfo, void* buf, s32 length, s32 offset,
+                         CARDCallback callback);
+s32 CARDRead(CARDFileInfo* fileInfo, void* buf, s32 length, s32 offset);
+
+/* CARDStat */
+s32 CARDSetStatus(s32 chan, s32 fileNo, CARDStat* stat);
+s32 CARDGetStatus(s32 chan, s32 fileNo, CARDStat* stat);
+static s32 CARDSetStatusAsync(s32 chan, s32 fileNo, CARDStat* stat, CARDCallback callback);
+
+/* CARDWrite */
+static s32 CARDWriteAsync(CARDFileInfo* fileInfo, const void* buf, s32 length, s32 offset,
+                          CARDCallback callback);
+s32 CARDWrite(CARDFileInfo* fileInfo, const void* buf, s32 length, s32 offset);
+
+#ifdef __cplusplus
+}
+#endif

 #endif /* CARD_H */
@@ -3,4 +3,28 @@

 #include "dolphin/types.h"

+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define OS_DBINTERFACE_ADDR 0x00000040
+
+typedef struct DBInterface {
+    /* 0x0 */ u32 bPresent;
+    /* 0x4 */ u32 exceptionMask;
+    /* 0x8 */ void (*ExceptionDestination)(void);
+    /* 0xC */ void* exceptionReturn;
+} DBInterface;
+
+extern DBInterface* __DBInterface;
+
+void DBInit(void);
+void __DBExceptionDestinationAux(void);
+void __DBExceptionDestination(void);
+void DBPrintf(char* format, ...);
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* DB_H */
@@ -1,7 +1,65 @@
 #ifndef DSP_H
 #define DSP_H

-#include "dolphin/types.h"
+#include "dolphin/os/OS.h"
+
+volatile u16 __DSPRegs[32] : 0xCC005000;
+volatile u32 __AIRegs[8] : 0xCC006C00;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define DSP_TASK_FLAG_CLEARALL 0x00000000
+#define DSP_TASK_FLAG_ATTACHED 0x00000001
+#define DSP_TASK_FLAG_CANCEL 0x00000002
+
+#define DSP_TASK_STATE_INIT 0
+#define DSP_TASK_STATE_RUN 1
+#define DSP_TASK_STATE_YIELD 2
+#define DSP_TASK_STATE_DONE 3
+
+typedef void (*DSPCallback)(void* task);
+
+typedef struct DSPTaskInfo DSPTaskInfo;
+
+typedef struct DSPTaskInfo {
+    /* 0x00 */ vu32 state;
+    /* 0x04 */ vu32 priority;
+    /* 0x08 */ vu32 flags;
+    /* 0x0C */ u16* iram_mmem_addr;
+    /* 0x10 */ u32 iram_length;
+    /* 0x14 */ u32 iram_addr;
+
+    /* 0x18 */ u16* dram_mmem_addr;
+    /* 0x1C */ u32 dram_length;
+    /* 0x20 */ u32 dram_addr;
+
+    /* 0x24 */ u16 dsp_init_vector;
+    /* 0x26 */ u16 dsp_resume_vector;
+
+    /* 0x28 */ DSPCallback init_cb;
+    /* 0x2C */ DSPCallback res_cb;
+    /* 0x30 */ DSPCallback done_cb;
+    /* 0x34 */ DSPCallback req_cb;
+
+    /* 0x38 */ struct DSPTaskInfo* next;
+    /* 0x3C */ struct DSPTaskInfo* prev;
+
+    /* 0x40 */ OSTime t_context;
+    /* 0x48 */ OSTime t_task;
+} DSPTaskInfo;
+
+u32 DSPCheckMailToDSP(void);
+u32 DSPCheckMailFromDSP(void);
+u32 DSPReadMailFromDSP(void);
+void DSPSendMailToDSP(u32 mail);
+void DSPAssertInt();
+void DSPInit(void);
+
+#ifdef __cplusplus
+}
+#endif

 void DSPReleaseHalt2(u32 msg);
 u16 DSP_CreateMap2(u32 msg);
@@ -3,4 +3,14 @@

 #include "dolphin/types.h"

+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void __DSP_debug_printf(const char* fmt, ...);
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* DSP_DEBUG_H */
@@ -1,6 +1,11 @@
 #ifndef DSP_TASK_H
 #define DSP_TASK_H

-#include "dolphin/types.h"
+#include "dolphin/dsp/dsp.h"
+
+extern DSPTaskInfo* __DSP_tmp_task;
+extern DSPTaskInfo* __DSP_last_task;
+extern DSPTaskInfo* __DSP_first_task;
+extern DSPTaskInfo* __DSP_curr_task;

 #endif /* DSP_TASK_H */
@@ -7,6 +7,8 @@
 extern "C" {
 #endif

+vu32 __DIRegs[16] : 0xCC006000;
+
 typedef enum DVDState {
    DVD_STATE_END = 0x0,
    DVD_STATE_BUSY = 0x1,
@@ -23,15 +25,15 @@ typedef enum DVDState {
 } DVDState;

 typedef struct DVDDirectory {
-    u32 entry_number;
-    u32 location;
-    u32 next;
+    /* 0x0 */ u32 entry_number;
+    /* 0x4 */ u32 location;
+    /* 0x8 */ u32 next;
 } DVDDirectory;

 typedef struct DVDDirectoryEntry {
-    u32 entry_number;
-    BOOL is_directory;
-    char* name;
+    /* 0x0 */ u32 entry_number;
+    /* 0x4 */ BOOL is_directory;
+    /* 0x8 */ char* name;
 } DVDDirectoryEntry;

 typedef struct DVDDiskID {
@@ -48,57 +50,87 @@ struct DVDFileInfo;
 struct DVDCommandBlock;
 typedef void (*DVDCBCallback)(s32 result, struct DVDCommandBlock* block);
 typedef void (*DVDCallback)(s32 result, struct DVDFileInfo* info);
+typedef void (*DVDLowCallback)(u32 intType);

 typedef struct DVDCommandBlock {
-    struct DVDCommandBlock* next;
-    struct DVDCommandBlock* prev;
-    u32 command;
-    s32 state;
-    u32 offset;
-    u32 length;
-    void* buffer;
-    u32 current_transfer_size;
-    u32 transferred_size;
-    DVDDiskID* disk_id;
-    DVDCBCallback callback;
-    void* user_data;
+    /* 0x00 */ struct DVDCommandBlock* next;
+    /* 0x04 */ struct DVDCommandBlock* prev;
+    /* 0x08 */ u32 command;
+    /* 0x0C */ s32 state;
+    /* 0x10 */ u32 offset;
+    /* 0x14 */ u32 length;
+    /* 0x18 */ void* buffer;
+    /* 0x1C */ u32 current_transfer_size;
+    /* 0x20 */ u32 transferred_size;
+    /* 0x24 */ DVDDiskID* disk_id;
+    /* 0x28 */ DVDCBCallback callback;
+    /* 0x2C */ void* user_data;
 } DVDCommandBlock;

 typedef struct DVDFileInfo {
-    DVDCommandBlock block;
-    u32 start_address;
-    u32 length;
-    DVDCallback callback;
+    /* 0x00 */ DVDCommandBlock block;
+    /* 0x30 */ u32 start_address;
+    /* 0x34 */ u32 length;
+    /* 0x38 */ DVDCallback callback;
 } DVDFileInfo;

 typedef struct DVDDriveInfo {
-    /* 0x00 */ u16 field_0x0;
+    /* 0x00 */ u16 revision_level;
    /* 0x02 */ u16 device_code;
-    /* 0x04 */ u32 field_0x4;
-    /* 0x08 */ u32 field_0x8;
-    /* 0x0C */ u32 field_0xc;
-    /* 0x10 */ u32 field_0x10;
-    /* 0x14 */ u32 field_0x14;
-    /* 0x18 */ u32 field_0x18;
-    /* 0x1C */ u32 field_0x1c;
+    /* 0x04 */ u32 release_date;
+    /* 0x08 */ u8 padding[24];
 } DVDDriveInfo;

+typedef struct DVDBB1 {
+  u32 appLoaderLength;
+  void* appLoaderFunc1;
+  void* appLoaderFunc2;
+  void* appLoaderFunc3;
+} DVDBB1;
+
+typedef struct DVDBB2 {
+  u32 bootFilePosition;
+  u32 FSTPosition;
+  u32 FSTLength;
+  u32 FSTMaxLength;
+  void* FSTAddress;
+  u32 userPosition;
+  u32 userLength;
+
+  u32 padding0;
+} DVDBB2;
+
+typedef void (*DVDOptionalCommandChecker)(DVDCommandBlock* block, void (*cb)(u32 intType));
+
 void DVDInit(void);
 BOOL DVDOpen(const char* filename, DVDFileInfo* fileinfo);
 BOOL DVDClose(DVDFileInfo* fileinfo);
 BOOL DVDReadPrio(DVDFileInfo* fileinfo, void*, s32, s32, s32);
 DVDDiskID* DVDGetCurrentDiskID(void);
 BOOL DVDFastOpen(long, DVDFileInfo* fileinfo);
-BOOL DVDGetCommandBlockStatus(DVDCommandBlock*);
+s32 DVDGetCommandBlockStatus(const DVDCommandBlock* block);
 BOOL DVDReadAsyncPrio(DVDFileInfo* fileinfo, void*, long, long, DVDCallback, long);
 int DVDConvertPathToEntrynum(const char*);
-DVDState DVDGetDriveStatus(void);
+s32 DVDGetDriveStatus(void);
 BOOL DVDCheckDisk(void);
-
 BOOL DVDChangeDir(const char* dirname);
 BOOL DVDCloseDir(DVDDirectory* dir);
 BOOL DVDOpenDir(const char*, DVDDirectory* dir);
 BOOL DVDReadDir(DVDDirectory* dir, DVDDirectoryEntry* entry);
+BOOL DVDReadAbsAsyncPrio(DVDCommandBlock* block, void* addr, s32 length, s32 offset,
+                         DVDCBCallback callback, s32 prio);
+BOOL DVDReadAbsAsyncForBS(DVDCommandBlock* block, void* addr, s32 length, s32 offset,
+                          DVDCBCallback callback);
+BOOL DVDReadDiskID(DVDCommandBlock* block, DVDDiskID* diskID, DVDCBCallback callback);
+BOOL DVDCancelStreamAsync(DVDCommandBlock* block, DVDCBCallback callback);
+BOOL DVDInquiryAsync(DVDCommandBlock* block, DVDDriveInfo* info, DVDCBCallback callback);
+void DVDReset(void);
+BOOL DVDSetAutoInvalidation(BOOL autoInval);
+void DVDResume(void);
+static BOOL DVDCancelAsync(DVDCommandBlock* block, DVDCBCallback callback);
+s32 DVDCancel(DVDCommandBlock* block);
+
+BOOL DVDCompareDiskID(DVDDiskID* id1, DVDDiskID* id2);

 #ifdef __cplusplus
 };
@@ -0,0 +1,64 @@
+#ifndef EXIBIOS_H
+#define EXIBIOS_H
+
+#include "dolphin/os/OS.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+vu32 __EXIRegs[16] : 0xCC006800;
+
+#define EXI_READ 0
+#define EXI_WRITE 1
+
+#define EXI_STATE_IDLE 0x00
+#define EXI_STATE_DMA 0x01
+#define EXI_STATE_IMM 0x02
+#define EXI_STATE_BUSY (EXI_STATE_DMA | EXI_STATE_IMM)
+#define EXI_STATE_SELECTED 0x04
+#define EXI_STATE_ATTACHED 0x08
+#define EXI_STATE_LOCKED 0x10
+
+typedef void (*EXICallback)(s32 chan, OSContext* context);
+
+typedef struct EXIControl {
+    EXICallback exiCallback;
+    EXICallback tcCallback;
+    EXICallback extCallback;
+    vu32 state;
+    int immLen;
+    u8* immBuf;
+    u32 dev;
+    u32 id;
+    s32 idTime;
+    int items;
+    struct {
+        u32 dev;
+        EXICallback callback;
+    } queue[3];
+} EXIControl;
+
+s32 EXIImm(s32 chan, void* buf, s32 len, u32 type, EXICallback callback);
+s32 EXIImmEx(s32 chan, void* buf, s32 len, u32 mode);
+BOOL EXIDma(s32 chan, void* buf, s32 len, u32 type, EXICallback callback);
+BOOL EXISync(s32 chan);
+EXICallback EXISetExiCallback(s32 chan, EXICallback exiCallback);
+BOOL EXIProbe(s32 chan);
+s32 EXIProbeEx(s32 chan);
+BOOL EXIAttach(s32 chan, EXICallback extCallback);
+BOOL EXIDetach(s32 chan);
+BOOL EXISelect(s32 chan, u32 dev, u32 freq);
+BOOL EXIDeselect(s32 chan);
+void EXIInit(void);
+BOOL EXILock(s32 chan, u32 dev, EXICallback unlockedCallback);
+BOOL EXIUnlock(s32 chan);
+u32 EXIGetState(s32 chan);
+static void UnlockedHandler(s32 chan, OSContext* context);
+s32 EXIGetID(s32 chan, u32 dev, u32* id);
+
+#ifdef __cplusplus
+};
+#endif
+
+#endif /* EXIBIOS_H */
@@ -30,14 +30,54 @@
 extern "C" {
 #endif

+// Upper words of the masks, since UIMM is only 16 bits
+#define OS_CACHED_REGION_PREFIX 0x8000
+#define OS_UNCACHED_REGION_PREFIX 0xC000
+#define OS_PHYSICAL_MASK 0x3FFF
+
+#define OS_BASE_CACHED (OS_CACHED_REGION_PREFIX << 16)
+#define OS_BASE_UNCACHED (OS_UNCACHED_REGION_PREFIX << 16)
+
 #define OS_BUS_CLOCK (*(u32*)0x800000F8)
 #define OS_CORE_CLOCK (*(u32*)0x800000FC)
 #define OS_TIMER_CLOCK (OS_BUS_CLOCK / 4)
 #define OS_TIMER_CLOCK_MS (OS_TIMER_CLOCK / 1000)

+#define OSTicksToCycles(ticks) (((ticks) * ((OS_CORE_CLOCK * 2) / OS_TIMER_CLOCK)) / 2)
+#define OSTicksToSeconds(ticks) ((ticks) / OS_TIMER_CLOCK)
+#define OSTicksToMilliseconds(ticks) ((ticks) / (OS_TIMER_CLOCK / 1000))
+#define OSTicksToMicroseconds(ticks) (((ticks)*8) / (OS_TIMER_CLOCK / 125000))
+#define OSTicksToNanoseconds(ticks) (((ticks)*8000) / (OS_TIMER_CLOCK / 125000))
+#define OSSecondsToTicks(sec) ((sec)*OS_TIMER_CLOCK)
+#define OSMillisecondsToTicks(msec) ((msec) * (OS_TIMER_CLOCK / 1000))
+#define OSMicrosecondsToTicks(usec) (((usec) * (OS_TIMER_CLOCK / 125000)) / 8)
+#define OSNanosecondsToTicks(nsec) (((nsec) * (OS_TIMER_CLOCK / 125000)) / 8000)
+
 #define OS_MESSAGE_NON_BLOCKING 0
 #define OS_MESSAGE_BLOCKING 1

+#define OS_CONSOLE_MASK 0xf0000000
+#define OS_CONSOLE_RETAIL 0x00000000
+#define OS_CONSOLE_DEVELOPMENT 0x10000000
+#define OS_CONSOLE_TDEV 0x20000000
+
+#define OS_CONSOLE_RETAIL4 0x00000004
+#define OS_CONSOLE_RETAIL3 0x00000003
+#define OS_CONSOLE_RETAIL2 0x00000002
+#define OS_CONSOLE_RETAIL1 0x00000001
+#define OS_CONSOLE_TDEVHW4 0x20000007
+#define OS_CONSOLE_TDEVHW3 0x20000006
+#define OS_CONSOLE_TDEVHW2 0x20000005
+#define OS_CONSOLE_TDEVHW1 0x20000004
+#define OS_CONSOLE_DEVHW4 0x10000007
+#define OS_CONSOLE_DEVHW3 0x10000006
+#define OS_CONSOLE_DEVHW2 0x10000005
+#define OS_CONSOLE_DEVHW1 0x10000004
+#define OS_CONSOLE_MINNOW 0x10000003
+#define OS_CONSOLE_ARTHUR 0x10000002
+#define OS_CONSOLE_PC_EMULATOR 0x10000001
+#define OS_CONSOLE_EMULATOR 0x10000000
+
 volatile u16 __OSDeviceCode : 0x800030E6;

 volatile u32 OS_PI_INTR_CAUSE : 0xCC003000;
@@ -81,7 +121,7 @@ static void OSExceptionInit(void);
 void __OSDBIntegrator(void);
 void __OSDBJump(void);

-typedef void (*OSExceptionHandler)(OSException, OSContext*);
+typedef void (*OSExceptionHandler)(__OSException, OSContext*);
 OSExceptionHandler __OSSetExceptionHandler(__OSException exception, OSExceptionHandler handler);
 OSExceptionHandler __OSGetExceptionHandler(__OSException exception);
 static void OSExceptionVector(void);
@@ -90,7 +130,7 @@ void __OSEVSetNumber();
 void __OSEVEnd();
 static void OSDefaultExceptionHandler(__OSException exception, OSContext* context);
 void __OSPSInit(void);
-void __OSGetDIConfig(void);
+u32 __OSGetDIConfig(void);
 void OSRegisterVersion(char* version);
 void OSSwitchFiberEx(u32, u32, u32, u32, u32, u32);

@@ -161,6 +201,28 @@ typedef struct OSBootInfo {
    /* 0x3C */ u32 fst_max_length;
 } OSBootInfo;

+typedef struct {
+    BOOL valid;
+    u32 restartCode;
+    u32 bootDol;
+    void* regionStart;
+    void* regionEnd;
+    BOOL argsUseDefault;
+    void* argsAddr;  // valid only when argsUseDefault = FALSE
+} OSExecParams;
+
+typedef struct BI2Debug {
+    /* 0x00 */ s32 debugMonSize;
+    /* 0x04 */ s32 simMemSize;
+    /* 0x08 */ u32 argOffset;
+    /* 0x0C */ u32 debugFlag;
+    /* 0x10 */ int trackLocation;
+    /* 0x14 */ int trackSize;
+    /* 0x18 */ u32 countryCode;
+    /* 0x1C */ u8 unk[8];
+    /* 0x24 */ u32 padSpec;
+} BI2Debug;
+
 struct GLOBAL_MEMORY {
    DVDDiskID disk;
    u32 nintendo_boot_code; /* Nintendo Standard Boot Code. */
@@ -245,10 +307,14 @@ struct GLOBAL_MEMORY {

 #define OS_ASSERT(...)

-inline void* OSPhysicalToCached(u32 offset) {
-    OS_ASSERT(offset <= 0x1fffffff);
-    return (void*)(offset + 0x80000000);
-}
+#define OSPhysicalToCached(paddr) ((void*)((u32)(paddr) + OS_BASE_CACHED))
+#define OSPhysicalToUncached(paddr) ((void*)((u32)(paddr) + OS_BASE_UNCACHED))
+#define OSCachedToPhysical(caddr) ((u32)((u8*)(caddr)-OS_BASE_CACHED))
+#define OSUncachedToPhysical(ucaddr) ((u32)((u8*)(ucaddr)-OS_BASE_UNCACHED))
+#define OSCachedToUncached(caddr) ((void*)((u8*)(caddr) + (OS_BASE_UNCACHED - OS_BASE_CACHED)))
+#define OSUncachedToCached(ucaddr) ((void*)((u8*)(ucaddr) - (OS_BASE_UNCACHED - OS_BASE_CACHED)))
+
+extern OSTime __OSStartTime;

 #ifdef __cplusplus
 };
@@ -25,15 +25,19 @@ typedef struct OSAlarm {
    /* 0x20 */ OSTime start_time;
 } OSAlarm;  // Size: 0x28

+typedef struct OSAlarmQueue {
+    OSAlarm* head;
+    OSAlarm* tail;
+} OSAlarmQueue;
+
 void OSInitAlarm(void);
 void OSCreateAlarm(OSAlarm* alarm);
-static void InsertAlarm(OSAlarm* alarm, s64 time, OSAlarmHandler* handler);
-void OSSetAlarm(OSAlarm* alarm, s64 time, OSAlarmHandler* handler);
-void OSSetPeriodicAlarm(OSAlarm* alarm, s64 start, s64 period, OSAlarmHandler* handler);
+static void InsertAlarm(OSAlarm* alarm, s64 time, OSAlarmHandler handler);
+void OSSetAlarm(OSAlarm* alarm, s64 time, OSAlarmHandler handler);
+void OSSetPeriodicAlarm(OSAlarm* alarm, s64 start, s64 period, OSAlarmHandler handler);
 void OSCancelAlarm(OSAlarm* alarm);
 static void DecrementerExceptionCallback(__OSException exception, OSContext* context);
 static void DecrementerExceptionHandler(__OSException exception, OSContext* context);
-static s32 OnReset(s32 param_0);

 #ifdef __cplusplus
 };
@@ -26,6 +26,8 @@ typedef u32 OSHeapHandle;

 extern volatile s32 __OSCurrHeap;

+#define OSRoundUp32B(v) (((u32)(v + 31) & ~31))
+
 #define OSRoundUp(x, align) (((x) + (align)-1) & (-(align)))
 #define OSRoundUpPtr(x, align) ((void*)((((u32)(x)) + (align)-1) & (~((align)-1))))

@@ -7,6 +7,133 @@
 extern "C" {
 #endif

+#define __OS_CONTEXT_FRAME 768
+
+#define OS_CONTEXT_R0 0
+#define OS_CONTEXT_R1 4
+#define OS_CONTEXT_R2 8
+#define OS_CONTEXT_R3 12
+#define OS_CONTEXT_R4 16
+#define OS_CONTEXT_R5 20
+#define OS_CONTEXT_R6 24
+#define OS_CONTEXT_R7 28
+#define OS_CONTEXT_R8 32
+#define OS_CONTEXT_R9 36
+#define OS_CONTEXT_R10 40
+#define OS_CONTEXT_R11 44
+#define OS_CONTEXT_R12 48
+#define OS_CONTEXT_R13 52
+#define OS_CONTEXT_R14 56
+#define OS_CONTEXT_R15 60
+#define OS_CONTEXT_R16 64
+#define OS_CONTEXT_R17 68
+#define OS_CONTEXT_R18 72
+#define OS_CONTEXT_R19 76
+#define OS_CONTEXT_R20 80
+#define OS_CONTEXT_R21 84
+#define OS_CONTEXT_R22 88
+#define OS_CONTEXT_R23 92
+#define OS_CONTEXT_R24 96
+#define OS_CONTEXT_R25 100
+#define OS_CONTEXT_R26 104
+#define OS_CONTEXT_R27 108
+#define OS_CONTEXT_R28 112
+#define OS_CONTEXT_R29 116
+#define OS_CONTEXT_R30 120
+#define OS_CONTEXT_R31 124
+
+#define OS_CONTEXT_CR 128
+#define OS_CONTEXT_LR 132
+#define OS_CONTEXT_CTR 136
+#define OS_CONTEXT_XER 140
+
+#define OS_CONTEXT_FPR0 144
+#define OS_CONTEXT_FPR1 152
+#define OS_CONTEXT_FPR2 160
+#define OS_CONTEXT_FPR3 168
+#define OS_CONTEXT_FPR4 176
+#define OS_CONTEXT_FPR5 184
+#define OS_CONTEXT_FPR6 192
+#define OS_CONTEXT_FPR7 200
+#define OS_CONTEXT_FPR8 208
+#define OS_CONTEXT_FPR9 216
+#define OS_CONTEXT_FPR10 224
+#define OS_CONTEXT_FPR11 232
+#define OS_CONTEXT_FPR12 240
+#define OS_CONTEXT_FPR13 248
+#define OS_CONTEXT_FPR14 256
+#define OS_CONTEXT_FPR15 264
+#define OS_CONTEXT_FPR16 272
+#define OS_CONTEXT_FPR17 280
+#define OS_CONTEXT_FPR18 288
+#define OS_CONTEXT_FPR19 296
+#define OS_CONTEXT_FPR20 304
+#define OS_CONTEXT_FPR21 312
+#define OS_CONTEXT_FPR22 320
+#define OS_CONTEXT_FPR23 328
+#define OS_CONTEXT_FPR24 336
+#define OS_CONTEXT_FPR25 344
+#define OS_CONTEXT_FPR26 352
+#define OS_CONTEXT_FPR27 360
+#define OS_CONTEXT_FPR28 368
+#define OS_CONTEXT_FPR29 376
+#define OS_CONTEXT_FPR30 384
+#define OS_CONTEXT_FPR31 392
+
+#define OS_CONTEXT_FPSCR 400
+
+#define OS_CONTEXT_SRR0 408
+#define OS_CONTEXT_SRR1 412
+
+#define OS_CONTEXT_MODE 416
+#define OS_CONTEXT_STATE 418
+
+#define OS_CONTEXT_GQR0 420
+#define OS_CONTEXT_GQR1 424
+#define OS_CONTEXT_GQR2 428
+#define OS_CONTEXT_GQR3 432
+#define OS_CONTEXT_GQR4 436
+#define OS_CONTEXT_GQR5 440
+#define OS_CONTEXT_GQR6 444
+#define OS_CONTEXT_GQR7 448
+#define __OSCONTEXT_PADDING 452
+
+#define OS_CONTEXT_PSF0 456
+#define OS_CONTEXT_PSF1 464
+#define OS_CONTEXT_PSF2 472
+#define OS_CONTEXT_PSF3 480
+#define OS_CONTEXT_PSF4 488
+#define OS_CONTEXT_PSF5 496
+#define OS_CONTEXT_PSF6 504
+#define OS_CONTEXT_PSF7 512
+#define OS_CONTEXT_PSF8 520
+#define OS_CONTEXT_PSF9 528
+#define OS_CONTEXT_PSF10 536
+#define OS_CONTEXT_PSF11 544
+#define OS_CONTEXT_PSF12 552
+#define OS_CONTEXT_PSF13 560
+#define OS_CONTEXT_PSF14 568
+#define OS_CONTEXT_PSF15 576
+#define OS_CONTEXT_PSF16 584
+#define OS_CONTEXT_PSF17 592
+#define OS_CONTEXT_PSF18 600
+#define OS_CONTEXT_PSF19 608
+#define OS_CONTEXT_PSF20 616
+#define OS_CONTEXT_PSF21 624
+#define OS_CONTEXT_PSF22 632
+#define OS_CONTEXT_PSF23 640
+#define OS_CONTEXT_PSF24 648
+#define OS_CONTEXT_PSF25 656
+#define OS_CONTEXT_PSF26 664
+#define OS_CONTEXT_PSF27 672
+#define OS_CONTEXT_PSF28 680
+#define OS_CONTEXT_PSF29 688
+#define OS_CONTEXT_PSF30 696
+#define OS_CONTEXT_PSF31 704
+#define OS_CONTEXT_STATE_EXC 0x02u
+
+#define OS_CONTEXT_STATE_FPSAVED 0x01u
+
 typedef struct OSContext {
    /* 0x000 */ u32 gpr[32];
    /* 0x080 */ u32 cr;
@@ -32,7 +159,7 @@ void __OSSaveFPUContext(s32 unused0, s32 unused1, OSContext* context);
 void OSSaveFPUContext(OSContext* context);
 void OSSetCurrentContext(OSContext* context);
 OSContext* OSGetCurrentContext(void);
-void OSSaveContext(OSContext* context);
+u32 OSSaveContext(OSContext* context);
 void OSLoadContext(OSContext* context);
 void OSClearContext(OSContext* context);
 void OSInitContext(OSContext* context, u32 pc, u32 lr);
@@ -53,7 +53,7 @@ typedef u8 __OSException;
 typedef void (*OSErrorHandler)(OSError error, OSContext* context, u32, u32);

 OSErrorHandler OSSetErrorHandler(OSError error, OSErrorHandler handler);
-void __OSUnhandledException(OSException exception, OSContext* context, u32 dsisr, u32 dar);
+void __OSUnhandledException(__OSException exception, OSContext* context, u32 dsisr, u32 dar);

 #ifdef __cplusplus
 };
@@ -44,6 +44,64 @@ typedef enum {
    OS_INTR_MAX
 } OSInterruptType;

+#define OS_INTERRUPTMASK(interrupt) (0x80000000u >> (interrupt))
+
+#define OS_INTERRUPTMASK_MEM_0 OS_INTERRUPTMASK(OS_INTR_MEM_0)
+#define OS_INTERRUPTMASK_MEM_1 OS_INTERRUPTMASK(OS_INTR_MEM_1)
+#define OS_INTERRUPTMASK_MEM_2 OS_INTERRUPTMASK(OS_INTR_MEM_2)
+#define OS_INTERRUPTMASK_MEM_3 OS_INTERRUPTMASK(OS_INTR_MEM_3)
+#define OS_INTERRUPTMASK_MEM_ADDRESS OS_INTERRUPTMASK(OS_INTR_MEM_ADDRESS)
+#define OS_INTERRUPTMASK_MEM                                                                       \
+  (OS_INTERRUPTMASK_MEM_0 | OS_INTERRUPTMASK_MEM_1 | OS_INTERRUPTMASK_MEM_2 |                      \
+   OS_INTERRUPTMASK_MEM_3 | OS_INTERRUPTMASK_MEM_ADDRESS)
+
+#define OS_INTERRUPTMASK_DSP_AI OS_INTERRUPTMASK(OS_INTR_DSP_AI)
+#define OS_INTERRUPTMASK_DSP_ARAM OS_INTERRUPTMASK(OS_INTR_DSP_ARAM)
+#define OS_INTERRUPTMASK_DSP_DSP OS_INTERRUPTMASK(OS_INTR_DSP_DSP)
+#define OS_INTERRUPTMASK_DSP                                                                       \
+  (OS_INTERRUPTMASK_DSP_AI | OS_INTERRUPTMASK_DSP_ARAM | OS_INTERRUPTMASK_DSP_DSP)
+
+#define OS_INTERRUPTMASK_AI_AI OS_INTERRUPTMASK(OS_INTR_AI_AI)
+#define OS_INTERRUPTMASK_AI (OS_INTERRUPTMASK_AI_AI)
+
+#define OS_INTERRUPTMASK_EXI_0_EXI OS_INTERRUPTMASK(OS_INTR_EXI_0_EXI)
+#define OS_INTERRUPTMASK_EXI_0_TC OS_INTERRUPTMASK(OS_INTR_EXI_0_TC)
+#define OS_INTERRUPTMASK_EXI_0_EXT OS_INTERRUPTMASK(OS_INTR_EXI_0_EXT)
+#define OS_INTERRUPTMASK_EXI_0                                                                     \
+  (OS_INTERRUPTMASK_EXI_0_EXI | OS_INTERRUPTMASK_EXI_0_TC | OS_INTERRUPTMASK_EXI_0_EXT)
+
+#define OS_INTERRUPTMASK_EXI_1_EXI OS_INTERRUPTMASK(OS_INTR_EXI_1_EXI)
+#define OS_INTERRUPTMASK_EXI_1_TC OS_INTERRUPTMASK(OS_INTR_EXI_1_TC)
+#define OS_INTERRUPTMASK_EXI_1_EXT OS_INTERRUPTMASK(OS_INTR_EXI_1_EXT)
+#define OS_INTERRUPTMASK_EXI_1                                                                     \
+  (OS_INTERRUPTMASK_EXI_1_EXI | OS_INTERRUPTMASK_EXI_1_TC | OS_INTERRUPTMASK_EXI_1_EXT)
+
+#define OS_INTERRUPTMASK_EXI_2_EXI OS_INTERRUPTMASK(OS_INTR_EXI_2_EXI)
+#define OS_INTERRUPTMASK_EXI_2_TC OS_INTERRUPTMASK(OS_INTR_EXI_2_TC)
+#define OS_INTERRUPTMASK_EXI_2 (OS_INTERRUPTMASK_EXI_2_EXI | OS_INTERRUPTMASK_EXI_2_TC)
+#define OS_INTERRUPTMASK_EXI                                                                       \
+  (OS_INTERRUPTMASK_EXI_0_EXI | OS_INTERRUPTMASK_EXI_0_TC | OS_INTERRUPTMASK_EXI_0_EXT |           \
+   OS_INTERRUPTMASK_EXI_1_EXI | OS_INTERRUPTMASK_EXI_1_TC | OS_INTERRUPTMASK_EXI_1_EXT |           \
+   OS_INTERRUPTMASK_EXI_2_EXI | OS_INTERRUPTMASK_EXI_2_TC)
+
+#define OS_INTERRUPTMASK_PI_PE_TOKEN OS_INTERRUPTMASK(OS_INTR_PI_PE_TOKEN)
+#define OS_INTERRUPTMASK_PI_PE_FINISH OS_INTERRUPTMASK(OS_INTR_PI_PE_FINISH)
+#define OS_INTERRUPTMASK_PI_PE (OS_INTERRUPTMASK_PI_PE_TOKEN | OS_INTERRUPTMASK_PI_PE_FINISH)
+
+#define OS_INTERRUPTMASK_PI_CP OS_INTERRUPTMASK(OS_INTR_PI_CP)
+#define OS_INTERRUPTMASK_PI_SI OS_INTERRUPTMASK(OS_INTR_PI_SI)
+#define OS_INTERRUPTMASK_PI_DI OS_INTERRUPTMASK(OS_INTR_PI_DI)
+#define OS_INTERRUPTMASK_PI_RSW OS_INTERRUPTMASK(OS_INTR_PI_RSW)
+#define OS_INTERRUPTMASK_PI_ERROR OS_INTERRUPTMASK(OS_INTR_PI_ERROR)
+#define OS_INTERRUPTMASK_PI_VI OS_INTERRUPTMASK(OS_INTR_PI_VI)
+#define OS_INTERRUPTMASK_PI_DEBUG OS_INTERRUPTMASK(OS_INTR_PI_DEBUG)
+#define OS_INTERRUPTMASK_PI_HSP OS_INTERRUPTMASK(OS_INTR_PI_HSP)
+#define OS_INTERRUPTMASK_PI                                                                        \
+  (OS_INTERRUPTMASK_PI_CP | OS_INTERRUPTMASK_PI_SI | OS_INTERRUPTMASK_PI_DI |                      \
+   OS_INTERRUPTMASK_PI_RSW | OS_INTERRUPTMASK_PI_ERROR | OS_INTERRUPTMASK_PI_VI |                  \
+   OS_INTERRUPTMASK_PI_PE_TOKEN | OS_INTERRUPTMASK_PI_PE_FINISH | OS_INTERRUPTMASK_PI_DEBUG |      \
+   OS_INTERRUPTMASK_PI_HSP)
+
 typedef s16 OSInterrupt;
 typedef u32 OSInterruptMask;
 typedef void (*OSInterruptHandler)(OSInterrupt interrupt, OSContext* context);
@@ -58,7 +116,7 @@ void __OSInterruptInit(void);
 static OSInterruptMask SetInterruptMask(OSInterruptMask param_0, OSInterruptMask param_1);
 OSInterruptMask __OSMaskInterrupts(OSInterruptMask mask);
 OSInterruptMask __OSUnmaskInterrupts(OSInterruptMask mask);
-void __OSDispatchInterrupt(OSInterrupt interrupt, OSContext* context);
+void __OSDispatchInterrupt(u8 interrupt, OSContext* context);
 static void ExternalInterruptHandler(OSInterrupt interrupt, OSContext* context);

 void __RAS_OSDisableInterrupts_begin(void);
@@ -8,12 +8,21 @@
 extern "C" {
 #endif

-static s32 OnReset(s32 param_0);
+#define OS_PROTECT_CHAN0 0
+#define OS_PROTECT_CHAN1 1
+#define OS_PROTECT_CHAN2 2
+#define OS_PROTECT_CHAN3 3
+
+#define OS_PROTECT_CONTROL_NONE 0x00
+#define OS_PROTECT_CONTROL_READ 0x01
+#define OS_PROTECT_CONTROL_WRITE 0x02
+#define OS_PROTECT_CONTROL_RDWR (OS_PROTECT_CONTROL_READ | OS_PROTECT_CONTROL_WRITE)
+
 static void MEMIntrruptHandler(OSInterrupt interrupt, struct OSContext* context);
 void OSProtectRange(u32 channel, void* address, u32 nBytes, u32 control);
 static void Config24MB(void);
 static void Config48MB(void);
-static void RealMode(void* config);
+static void RealMode(u32 config);
 void __OSInitMemoryProtection(void);

 #ifdef __cplusplus
@@ -18,6 +18,10 @@ typedef struct OSMessageQueue {
    /* 0x1C */ s32 num_used;
 } OSMessageQueue;

+// Flags to turn blocking on/off when sending/receiving message
+#define OS_MESSAGE_NOBLOCK 0
+#define OS_MESSAGE_BLOCK 1
+
 void OSInitMessageQueue(OSMessageQueue* queue, OSMessage* msgArray, s32 msgCount);
 BOOL OSSendMessage(OSMessageQueue* queue, OSMessage msg, s32 flags);
 BOOL OSReceiveMessage(OSMessageQueue* queue, OSMessage* msg, s32 flags);
@@ -14,14 +14,19 @@ typedef struct OSMutex {
    /* 0x10 */ OSMutexLink link;
 } OSMutex;  // Size: 0x18

+typedef struct OSCond {
+    OSThreadQueue queue;
+} OSCond;
+
 void OSInitMutex(OSMutex* mutex);
 void OSLockMutex(OSMutex* mutex);
 void OSUnlockMutex(OSMutex* mutex);
-void __OSUnlockAllMutex(OSThread* thread);
 s32 OSTryLockMutex(OSMutex* mutex);
 void OSInitCond(OSCond* cond);
 void OSWaitCond(OSCond* cond, OSMutex* mutex);
 void OSSignalCond(OSCond* cond);
+
+void __OSUnlockAllMutex(OSThread* thread);
 s32 __OSCheckMutex(OSThread* thread);
 BOOL __OSCheckDeadLock(OSThread* thread);
 BOOL __OSCheckMutexes(OSThread* thread);
@@ -7,6 +7,25 @@
 extern "C" {
 #endif

+#define OS_RESETCODE_RESTART 0x80000000
+#define OS_RESETCODE_SYSTEM 0x40000000
+
+#define OS_RESETCODE_EXEC 0xC0000000
+#define OS_RESETCODE_NETCONFIG 0xC0010000
+
+#define OS_RESET_TIMEOUT OSMillisecondsToTicks(1000)
+
+#define OS_RESET_RESTART 0
+#define OS_RESET_HOTRESET 1
+#define OS_RESET_SHUTDOWN 2
+
+#define OS_RESET_PRIO_SO 110
+#define OS_RESET_PRIO_IP 111
+#define OS_RESET_PRIO_CARD 127
+#define OS_RESET_PRIO_PAD 127
+#define OS_RESET_PRIO_GX 127
+#define OS_RESET_PRIO_ALARM 4294967295
+
 typedef s32 (*OSResetFunction)(s32);

 typedef struct OSResetFunctionInfo {
@@ -16,12 +35,17 @@ typedef struct OSResetFunctionInfo {
    /* 0xC */ struct OSResetFunctionInfo* prev;
 } OSResetFunctionInfo;

+typedef struct OSResetQueue {
+    OSResetFunctionInfo* first;
+    OSResetFunctionInfo* last;
+} OSResetQueue;
+
 void OSRegisterResetFunction(OSResetFunctionInfo* info);
-BOOL __OSCallResetFunctions(s32 param_0);
+BOOL __OSCallResetFunctions(u32 param_0);
 static void Reset(s32 param_0);
 static void KillThreads(void);
 void __OSDoHotReset(s32 param_0);
-void OSResetSystem(s32 reset, u32 resetCode, BOOL forceMenu);
+void OSResetSystem(int reset, u32 resetCode, BOOL forceMenu);
 u32 OSGetResetCode(void);

 #ifdef __cplusplus
@@ -7,7 +7,8 @@
 extern "C" {
 #endif

-void __OSResetSWInterruptHandler(void);
+typedef void (*OSResetCallback)(void);
+
 static BOOL OSGetResetButtonState(void);
 BOOL OSGetResetSwitchState(void);

@@ -7,26 +7,65 @@
 extern "C" {
 #endif

-typedef enum OSSoundMode {
-    /* 0x0 */ SOUND_MODE_MONO,
-    /* 0x1 */ SOUND_MODE_STEREO,
-} OSSoundMode;
+typedef u32 OSSoundMode;
+
+#define OS_SOUND_MODE_MONO 0
+#define OS_SOUND_MODE_STEREO 1
+
+#define RTC_CMD_READ 0x20000000
+#define RTC_CMD_WRITE 0xa0000000
+
+#define RTC_SRAM_ADDR 0x00000100
+#define RTC_SRAM_SIZE 64
+
+#define RTC_CHAN 0
+#define RTC_DEV 1
+#define RTC_FREQ 3  // EXI_FREQ_8M
+
+typedef struct SramControlBlock {
+    u8 sram[RTC_SRAM_SIZE];
+    u32 offset;
+    BOOL enabled;
+    BOOL locked;
+    BOOL sync;
+    void (*callback)(void);
+} SramControlBlock;
+
+typedef struct OSSram {
+    u16 checkSum;
+    u16 checkSumInv;
+    u32 ead0;
+    u32 ead1;
+    u32 counterBias;
+    s8 displayOffsetH;
+    u8 ntd;
+    u8 language;
+    u8 flags;
+} OSSram;
+
+typedef struct OSSramEx {
+    u8 flashID[2][12];
+    u32 wirelessKeyboardID;
+    u16 wirelessPadID[4];
+    u8 dvdErrorCode;
+    u8 _padding0;
+    u8 flashIDCheckSum[2];
+    u16 gbs;
+    u8 _padding1[2];
+} OSSramEx;

-static void WriteSramCallback(void);
-static u8 WriteSram(u8* param_0, u32 param_1, u32 param_2);
 void __OSInitSram(void);
-u16* __OSLockSram(void);
-u16* __OSLockSramEx(void);
-static u32 UnlockSram(s32 param_0, u32 param_1);
-u32 __OSUnlockSram(s32 param_0);
-u32 __OSUnlockSramEx(s32 param_0);
-u32 __OSSyncSram(void);
+OSSram* __OSLockSram(void);
+OSSramEx* __OSLockSramEx(void);
+BOOL __OSUnlockSram(BOOL commit);
+BOOL __OSUnlockSramEx(BOOL commit);
+BOOL __OSSyncSram(void);
 u32 OSGetSoundMode(void);
 void OSSetSoundMode(OSSoundMode mode);
 u32 OSGetProgressiveMode(void);
 void OSSetProgressiveMode(u32 mode);
-u16 OSGetWirelessID(s32 index);
-void OSSetWirelessID(s32 index, u16 id);
+u16 OSGetWirelessID(s32 channel);
+void OSSetWirelessID(s32 channel, u16 id);
 static u16 OSGetGbsMode(void);
 static void OSSetGbsMode(u16 mode);

@@ -8,37 +8,52 @@ extern "C" {
 #endif

 typedef u16 OSThreadState;
+typedef s32 OSPriority;  //  0 highest, 31 lowest
+
 #define OS_THREAD_STATE_UNINITIALIZED 0
 #define OS_THREAD_STATE_READY 1
 #define OS_THREAD_STATE_RUNNING 2
 #define OS_THREAD_STATE_WAITING 4
 #define OS_THREAD_STATE_DEAD 8

-typedef struct OSThreadLink {
-    struct OSThread* prev;
-    struct OSThread* next;
-} OSThreadLink;
+#define OS_THREAD_ATTR_DETACH 0x0001u

-typedef struct OSThreadQueue {
-    /* 0x0 */ struct OSThread* head;
-    /* 0x4 */ struct OSThread* tail;
-} OSThreadQueue;
+#define OS_THREAD_STACK_MAGIC 0xDEADBABE

-typedef struct OSMutexLink {
-    struct OSMutex* prev;
-    struct OSMutex* next;
-} OSMutexLink;
+#define OS_PRIORITY_MIN 0   // highest
+#define OS_PRIORITY_MAX 31  // lowest
+#define OS_PRIORITY_IDLE OS_PRIORITY_MAX

-typedef struct OSMutexQueue {
-    struct OSMutex* prev;
-    struct OSMutex* next;
-} OSMutexQueue;
+typedef struct OSThread OSThread;
+typedef struct OSThreadQueue OSThreadQueue;
+typedef struct OSThreadLink OSThreadLink;

-typedef struct OSCond {
-    OSThreadQueue queue;
-} OSCond;
+typedef struct OSMutex OSMutex;
+typedef struct OSMutexQueue OSMutexQueue;
+typedef struct OSMutexLink OSMutexLink;
+typedef struct OSCond OSCond;

-typedef struct OSThread {
+struct OSThreadLink {
+    OSThread* next;
+    OSThread* prev;
+};
+
+struct OSThreadQueue {
+    /* 0x0 */ OSThread* head;
+    /* 0x4 */ OSThread* tail;
+};
+
+struct OSMutexLink {
+    OSMutex* prev;
+    OSMutex* next;
+};
+
+struct OSMutexQueue {
+    OSMutex* head;
+    OSMutex* tail;
+};
+
+struct OSThread {
    OSContext context;
    OSThreadState state;
    u16 attributes;
@@ -49,14 +64,14 @@ typedef struct OSThread {
    OSThreadQueue* queue;
    OSThreadLink link;
    OSThreadQueue join_queue;
-    struct OSMutex* mutex;
+    OSMutex* mutex;
    OSMutexQueue owned_mutexes;
    OSThreadLink active_threads_link;
    u8* stack_base;
    u8* stack_end;
    u8* error_code;
    void* data[2];
-} OSThread;
+};

 typedef void (*OSSwitchThreadCallback)(OSThread* from, OSThread* to);

@@ -73,13 +88,13 @@ s32 OSDisableScheduler(void);
 s32 OSEnableScheduler(void);
 static void UnsetRun(OSThread* thread);
 s32 __OSGetEffectivePriority(OSThread* thread);
-static void SetEffectivePriority(OSThread* thread, s32 priority);
+static OSThread* SetEffectivePriority(OSThread* thread, s32 priority);
 void __OSPromoteThread(OSThread* thread, s32 priority);
-static void SelectThread(OSThread* thread);
+static OSThread* SelectThread(BOOL yield);
 void __OSReschedule(void);
 void OSYieldThread(void);
-BOOL OSCreateThread(OSThread* thread, void* func, void* param, void* stackBase,
-                    u32 stackSize, s32 priority, u16 attribute);
+BOOL OSCreateThread(OSThread* thread, void* func, void* param, void* stackBase, u32 stackSize,
+                    s32 priority, u16 attribute);
 void OSExitThread(void* exitValue);
 void OSCancelThread(OSThread* thread);
 void OSDetachThread(OSThread* thread);
@@ -29,7 +29,7 @@ OSTime OSGetTime(void);
 OSTick OSGetTick(void);
 OSTime __OSGetSystemTime(void);
 OSTime __OSTimeToSystemTime(OSTime time);
-void GetDates(OSTime ticks, OSCalendarTime* ct);
+void GetDates(s32 days, OSCalendarTime* ct);
 void OSTicksToCalendarTime(OSTime ticks, OSCalendarTime* ct);

 #ifdef __cplusplus
@@ -1,7 +1,7 @@
 #ifndef PAD_H
 #define PAD_H

-#include "dolphin/types.h"
+#include "dolphin/os/OS.h"

 #ifdef __cplusplus
 extern "C" {
@@ -14,6 +14,36 @@ typedef enum PADMask {
    PAD_CHAN0_BIT = (1 << 31),
 } PADMask;

+#define PAD_SPEC_0 0
+#define PAD_SPEC_1 1
+#define PAD_SPEC_2 2
+#define PAD_SPEC_3 3
+#define PAD_SPEC_4 4
+#define PAD_SPEC_5 5
+
+#define PAD_MOTOR_STOP 0
+#define PAD_MOTOR_RUMBLE 1
+#define PAD_MOTOR_STOP_HARD 2
+
+#define PAD_ERR_NONE 0
+#define PAD_ERR_NO_CONTROLLER -1
+#define PAD_ERR_NOT_READY -2
+#define PAD_ERR_TRANSFER -3
+
+#define PAD_BUTTON_LEFT 0x0001
+#define PAD_BUTTON_RIGHT 0x0002
+#define PAD_BUTTON_DOWN 0x0004
+#define PAD_BUTTON_UP 0x0008
+#define PAD_TRIGGER_Z 0x0010
+#define PAD_TRIGGER_R 0x0020
+#define PAD_TRIGGER_L 0x0040
+#define PAD_BUTTON_A 0x0100
+#define PAD_BUTTON_B 0x0200
+#define PAD_BUTTON_X 0x0400
+#define PAD_BUTTON_Y 0x0800
+#define PAD_BUTTON_MENU 0x1000
+#define PAD_BUTTON_START 0x1000
+
 typedef struct PADStatus {
    /* 0x0 */ u16 button;
    /* 0x2 */ s8 stick_x;
@@ -27,15 +57,22 @@ typedef struct PADStatus {
    /* 0xA */ s8 error;
 } PADStatus;

-u32 PADInit(void);
+typedef void (*PADSamplingCallback)(void);
+
+BOOL PADInit(void);
 void PADSetAnalogMode(u32 mode);
-void PADSetSpec(int spec);
+void PADSetSpec(u32 spec);
 BOOL PADReset(u32 mask);
 void PADClampCircle(PADStatus* status);
 void PADClamp(PADStatus* status);
 u32 PADRead(PADStatus* status);
 void PADControlMotor(s32 channel, u32 command);
 BOOL PADRecalibrate(u32 mask);
+static void PADOriginCallback(s32 chan, u32 error, OSContext* context);
+static void PADOriginUpdateCallback(s32 chan, u32 error, OSContext* context);
+static void PADProbeCallback(s32 chan, u32 error, OSContext* context);
+static void PADTypeAndStatusCallback(s32 chan, u32 type);
+static void PADReceiveCheckCallback(s32 chan, u32 type);

 #ifdef __cplusplus
 };
@@ -3,4 +3,28 @@

 #include "dolphin/types.h"

+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct PADClampRegion {
+    u8 minTrigger;
+    u8 maxTrigger;
+    s8 minStick;
+    s8 maxStick;
+    s8 xyStick;
+    s8 minSubstick;
+    s8 maxSubstick;
+    s8 xySubstick;
+    s8 radStick;
+    s8 radSubstick;
+} PADClampRegion;
+
+void PADClamp(PADStatus* status);
+void PADClampCircle(PADStatus* status);
+
+#ifdef __cplusplus
+};
+#endif
+
 #endif /* PADCLAMP_H */
@@ -1,6 +1,128 @@
 #ifndef SIBIOS_H
 #define SIBIOS_H

-#include "dolphin/types.h"
+#include "dolphin/os/OS.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SI_MAX_CHAN 4
+#define SI_MAX_COMCSR_INLNGTH 128
+#define SI_MAX_COMCSR_OUTLNGTH 128
+#define SI_ERROR_UNDER_RUN 0x0001
+#define SI_ERROR_OVER_RUN 0x0002
+#define SI_ERROR_COLLISION 0x0004
+#define SI_ERROR_NO_RESPONSE 0x0008
+#define SI_ERROR_WRST 0x0010
+#define SI_ERROR_RDST 0x0020
+#define SI_ERROR_UNKNOWN 0x0040
+#define SI_ERROR_BUSY 0x0080
+#define SI_CHAN0 0
+#define SI_CHAN1 1
+#define SI_CHAN2 2
+#define SI_CHAN3 3
+#define SI_CHAN0_BIT 0x80000000
+#define SI_CHAN1_BIT 0x40000000
+#define SI_CHAN2_BIT 0x20000000
+#define SI_CHAN3_BIT 0x10000000
+#define SI_CHAN_BIT(chan) (SI_CHAN0_BIT >> (chan))
+#define SI_TYPE_MASK 0x18000000u
+#define SI_TYPE_N64 0x00000000u
+#define SI_TYPE_DOLPHIN 0x08000000u
+#define SI_TYPE_GC SI_TYPE_DOLPHIN
+#define SI_GC_WIRELESS 0x80000000
+#define SI_GC_NOMOTOR 0x20000000
+#define SI_GC_STANDARD 0x01000000
+#define SI_WIRELESS_RECEIVED 0x40000000
+#define SI_WIRELESS_IR 0x04000000
+#define SI_WIRELESS_STATE 0x02000000
+#define SI_WIRELESS_ORIGIN 0x00200000
+#define SI_WIRELESS_FIX_ID 0x00100000
+#define SI_WIRELESS_TYPE 0x000f0000
+#define SI_WIRELESS_LITE_MASK 0x000c0000
+#define SI_WIRELESS_LITE 0x00040000
+#define SI_WIRELESS_CONT_MASK 0x00080000
+#define SI_WIRELESS_CONT 0x00000000
+#define SI_WIRELESS_ID 0x00c0ff00
+#define SI_WIRELESS_TYPE_ID (SI_WIRELESS_TYPE | SI_WIRELESS_ID)
+#define SI_N64_CONTROLLER (SI_TYPE_N64 | 0x05000000)
+#define SI_N64_MIC (SI_TYPE_N64 | 0x00010000)
+#define SI_N64_KEYBOARD (SI_TYPE_N64 | 0x00020000)
+#define SI_N64_MOUSE (SI_TYPE_N64 | 0x02000000)
+#define SI_GBA (SI_TYPE_N64 | 0x00040000)
+#define SI_GC_CONTROLLER (SI_TYPE_GC | SI_GC_STANDARD)
+#define SI_GC_RECEIVER (SI_TYPE_GC | SI_GC_WIRELESS)
+#define SI_GC_WAVEBIRD                                                                             \
+    (SI_TYPE_GC | SI_GC_WIRELESS | SI_GC_STANDARD | SI_WIRELESS_STATE | SI_WIRELESS_FIX_ID)
+#define SI_GC_KEYBOARD (SI_TYPE_GC | 0x00200000)
+#define SI_GC_STEERING (SI_TYPE_GC | 0x00000000)
+
+typedef void (*SICallback)(s32 chan, u32 sr, OSContext* context);
+typedef void (*SITypeAndStatusCallback)(s32 chan, u32 type);
+
+typedef struct SIPacket {
+    s32 chan;
+    void* output;
+    u32 outputBytes;
+    void* input;
+    u32 inputBytes;
+    SICallback callback;
+    OSTime fire;
+} SIPacket;
+
+typedef struct SIControl {
+    s32 chan;
+    u32 poll;
+    u32 inputBytes;
+    void* input;
+    SICallback callback;
+} SIControl;
+
+typedef struct SIComm_s {
+    u32 tcint : 1;
+    u32 tcintmsk : 1;
+    u32 comerr : 1;
+    u32 rdstint : 1;
+    u32 rdstintmsk : 1;
+    u32 pad0 : 4;
+    u32 outlngth : 7;
+    u32 pad1 : 1;
+    u32 inlngth : 7;
+    u32 pad2 : 5;
+    u32 channel : 2;
+    u32 tstart : 1;
+} SIComm_s;
+
+typedef union SIComm_u {
+    u32 val;
+    SIComm_s f;
+} SIComm_u;
+
+BOOL SIBusy(void);
+BOOL SIIsChanBusy(s32 chan);
+static void SIInterruptHandler(OSInterrupt interrupt, OSContext* context);
+static BOOL SIEnablePollingInterrupt(BOOL enable);
+BOOL SIRegisterPollingHandler(OSInterruptHandler handler);
+BOOL SIUnregisterPollingHandler(OSInterruptHandler handler);
+void SIInit(void);
+u32 SIGetStatus(s32 chan);
+void SISetCommand(s32 chan, u32 command);
+void SITransferCommands(void);
+u32 SISetXY(u32 x, u32 y);
+u32 SIEnablePolling(u32 poll);
+u32 SIDisablePolling(u32 poll);
+static BOOL SIGetResponseRaw(s32 chan);
+BOOL SIGetResponse(s32 chan, void* data);
+BOOL SITransfer(s32 chan, void* output, u32 outputBytes, void* input, u32 inputBytes,
+                SICallback callback, OSTime delay);
+u32 SIGetType(s32 chan);
+u32 SIGetTypeAsync(s32 chan, SITypeAndStatusCallback callback);
+
+vu32 __SIRegs[64] : 0xCC006400;
+
+#ifdef __cplusplus
+}
+#endif

 #endif /* SIBIOS_H */
@@ -3,4 +3,20 @@

 #include "dolphin/types.h"

+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct XY {
+    u16 line;
+    u8 count;
+} XY;
+
+void SISetSamplingRate(u32 msec);
+void SIRefreshSamplingRate(void);
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* SISAMPLINGRATE_H */
@@ -8,6 +8,36 @@
 extern "C" {
 #endif

+#define VI_TVMODE(format, interlace) (((format) << 2) + (interlace))
+
+#define VI_INTERLACE 0
+#define VI_NON_INTERLACE 1
+#define VI_PROGRESSIVE 2
+
+#define VI_NTSC 0
+#define VI_PAL 1
+#define VI_MPAL 2
+#define VI_DEBUG 3
+#define VI_DEBUG_PAL 4
+#define VI_EURGB60 5
+
+typedef enum {
+    VI_TVMODE_NTSC_INT = VI_TVMODE(VI_NTSC, VI_INTERLACE),
+    VI_TVMODE_NTSC_DS = VI_TVMODE(VI_NTSC, VI_NON_INTERLACE),
+    VI_TVMODE_NTSC_PROG = VI_TVMODE(VI_NTSC, VI_PROGRESSIVE),
+    VI_TVMODE_PAL_INT = VI_TVMODE(VI_PAL, VI_INTERLACE),
+    VI_TVMODE_PAL_DS = VI_TVMODE(VI_PAL, VI_NON_INTERLACE),
+    VI_TVMODE_EURGB60_INT = VI_TVMODE(VI_EURGB60, VI_INTERLACE),
+    VI_TVMODE_EURGB60_DS = VI_TVMODE(VI_EURGB60, VI_NON_INTERLACE),
+    VI_TVMODE_MPAL_INT = VI_TVMODE(VI_MPAL, VI_INTERLACE),
+    VI_TVMODE_MPAL_DS = VI_TVMODE(VI_MPAL, VI_NON_INTERLACE),
+    VI_TVMODE_DEBUG_INT = VI_TVMODE(VI_DEBUG, VI_INTERLACE),
+    VI_TVMODE_DEBUG_PAL_INT = VI_TVMODE(VI_DEBUG_PAL, VI_INTERLACE),
+    VI_TVMODE_DEBUG_PAL_DS = VI_TVMODE(VI_DEBUG_PAL, VI_NON_INTERLACE)
+} VITVMode;
+
+typedef enum { VI_XFBMODE_SF = 0, VI_XFBMODE_DF } VIXFBMode;
+
 typedef void (*VIRetraceCallback)(u32);

 void VIWaitForRetrace(void);
@@ -22,6 +52,8 @@ void* VIGetCurrentFrameBuffer();
 void VISetBlack(BOOL);
 u32 VIGetRetraceCount();

+vu16 __VIRegs[59] : 0xCC002000;
+
 #ifdef __cplusplus
 };
 #endif
@@ -1,6 +0,0 @@
-#ifndef EXIBIOS_H
-#define EXIBIOS_H
-
-#include "dolphin/types.h"
-
-#endif /* EXIBIOS_H */