mirror of
https://github.com/zeldaret/tp
synced 2026-07-11 15:28:38 -04:00
J3DShape/J3DShapeMtx: More work
This commit is contained in:
Jasper St. Pierre
@@ -1,67 +0,0 @@
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lbl_80314CBC:
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/* 80314CBC 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80314CC0 7C 08 02 A6 */ mflr r0
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/* 80314CC4 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80314CC8 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 80314CCC 93 C1 00 08 */ stw r30, 8(r1)
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/* 80314CD0 7C 7F 1B 78 */ mr r31, r3
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/* 80314CD4 7C 9E 23 78 */ mr r30, r4
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/* 80314CD8 38 60 FF FF */ li r3, -1
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/* 80314CDC 80 9F 00 30 */ lwz r4, 0x30(r31)
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/* 80314CE0 38 A0 00 00 */ li r5, 0
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/* 80314CE4 48 00 00 18 */ b lbl_80314CFC
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lbl_80314CE8:
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/* 80314CE8 2C 00 00 00 */ cmpwi r0, 0
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/* 80314CEC 40 82 00 08 */ bne lbl_80314CF4
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/* 80314CF0 38 60 00 00 */ li r3, 0
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lbl_80314CF4:
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/* 80314CF4 38 A5 00 01 */ addi r5, r5, 1
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/* 80314CF8 38 84 00 08 */ addi r4, r4, 8
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lbl_80314CFC:
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/* 80314CFC 80 04 00 00 */ lwz r0, 0(r4)
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/* 80314D00 2C 00 00 FF */ cmpwi r0, 0xff
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/* 80314D04 40 82 FF E4 */ bne lbl_80314CE8
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/* 80314D08 2C 03 FF FF */ cmpwi r3, -1
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/* 80314D0C 41 82 00 84 */ beq lbl_80314D90
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/* 80314D10 38 05 00 02 */ addi r0, r5, 2
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/* 80314D14 54 03 18 38 */ slwi r3, r0, 3
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/* 80314D18 4B FB 9F AD */ bl __nwa__FUl
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/* 80314D1C 38 C0 00 00 */ li r6, 0
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/* 80314D20 80 BF 00 30 */ lwz r5, 0x30(r31)
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/* 80314D24 7C 67 1B 78 */ mr r7, r3
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/* 80314D28 38 80 00 01 */ li r4, 1
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/* 80314D2C 48 00 00 3C */ b lbl_80314D68
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lbl_80314D30:
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/* 80314D30 7C 1E 00 00 */ cmpw r30, r0
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/* 80314D34 40 80 00 1C */ bge lbl_80314D50
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/* 80314D38 54 C0 06 3F */ clrlwi. r0, r6, 0x18
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/* 80314D3C 40 82 00 14 */ bne lbl_80314D50
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/* 80314D40 93 C7 00 00 */ stw r30, 0(r7)
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/* 80314D44 90 87 00 04 */ stw r4, 4(r7)
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/* 80314D48 38 C0 00 01 */ li r6, 1
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/* 80314D4C 38 E7 00 08 */ addi r7, r7, 8
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lbl_80314D50:
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/* 80314D50 80 05 00 00 */ lwz r0, 0(r5)
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/* 80314D54 90 07 00 00 */ stw r0, 0(r7)
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/* 80314D58 80 05 00 04 */ lwz r0, 4(r5)
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/* 80314D5C 90 07 00 04 */ stw r0, 4(r7)
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/* 80314D60 38 E7 00 08 */ addi r7, r7, 8
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/* 80314D64 38 A5 00 08 */ addi r5, r5, 8
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lbl_80314D68:
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/* 80314D68 80 05 00 00 */ lwz r0, 0(r5)
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/* 80314D6C 2C 00 00 FF */ cmpwi r0, 0xff
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/* 80314D70 40 82 FF C0 */ bne lbl_80314D30
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/* 80314D74 38 00 00 FF */ li r0, 0xff
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/* 80314D78 90 07 00 00 */ stw r0, 0(r7)
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/* 80314D7C 38 00 00 00 */ li r0, 0
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/* 80314D80 90 07 00 04 */ stw r0, 4(r7)
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/* 80314D84 90 7F 00 30 */ stw r3, 0x30(r31)
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/* 80314D88 7F E3 FB 78 */ mr r3, r31
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/* 80314D8C 48 00 04 D5 */ bl makeVcdVatCmd__8J3DShapeFv
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lbl_80314D90:
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/* 80314D90 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 80314D94 83 C1 00 08 */ lwz r30, 8(r1)
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/* 80314D98 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80314D9C 7C 08 03 A6 */ mtlr r0
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/* 80314DA0 38 21 00 10 */ addi r1, r1, 0x10
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/* 80314DA4 4E 80 00 20 */ blr
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@@ -1,35 +0,0 @@
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lbl_80314DA8:
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/* 80314DA8 94 21 FF E0 */ stwu r1, -0x20(r1)
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/* 80314DAC 7C 08 02 A6 */ mflr r0
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/* 80314DB0 90 01 00 24 */ stw r0, 0x24(r1)
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/* 80314DB4 39 61 00 20 */ addi r11, r1, 0x20
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/* 80314DB8 48 04 D4 1D */ bl _savegpr_27
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/* 80314DBC 7C 7B 1B 78 */ mr r27, r3
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/* 80314DC0 7C 9C 23 78 */ mr r28, r4
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/* 80314DC4 7C BD 2B 78 */ mr r29, r5
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/* 80314DC8 7C DE 33 78 */ mr r30, r6
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/* 80314DCC 3B E0 00 00 */ li r31, 0
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/* 80314DD0 48 00 00 30 */ b lbl_80314E00
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lbl_80314DD4:
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/* 80314DD4 80 7B 00 38 */ lwz r3, 0x38(r27)
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/* 80314DD8 57 E0 13 BA */ rlwinm r0, r31, 2, 0xe, 0x1d
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/* 80314DDC 7C 63 00 2E */ lwzx r3, r3, r0
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/* 80314DE0 7F 84 E3 78 */ mr r4, r28
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/* 80314DE4 7F A5 EB 78 */ mr r5, r29
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/* 80314DE8 7F C6 F3 78 */ mr r6, r30
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/* 80314DEC 81 83 00 00 */ lwz r12, 0(r3)
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/* 80314DF0 81 8C 00 1C */ lwz r12, 0x1c(r12)
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/* 80314DF4 7D 89 03 A6 */ mtctr r12
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/* 80314DF8 4E 80 04 21 */ bctrl
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/* 80314DFC 3B FF 00 01 */ addi r31, r31, 1
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lbl_80314E00:
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/* 80314E00 57 E3 04 3E */ clrlwi r3, r31, 0x10
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/* 80314E04 A0 1B 00 0A */ lhz r0, 0xa(r27)
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/* 80314E08 7C 03 00 40 */ cmplw r3, r0
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/* 80314E0C 41 80 FF C8 */ blt lbl_80314DD4
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/* 80314E10 39 61 00 20 */ addi r11, r1, 0x20
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/* 80314E14 48 04 D4 0D */ bl _restgpr_27
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/* 80314E18 80 01 00 24 */ lwz r0, 0x24(r1)
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/* 80314E1C 7C 08 03 A6 */ mtlr r0
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/* 80314E20 38 21 00 20 */ addi r1, r1, 0x20
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/* 80314E24 4E 80 00 20 */ blr
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@@ -1,31 +0,0 @@
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lbl_80314E28:
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/* 80314E28 94 21 FF E0 */ stwu r1, -0x20(r1)
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/* 80314E2C 7C 08 02 A6 */ mflr r0
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/* 80314E30 90 01 00 24 */ stw r0, 0x24(r1)
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/* 80314E34 39 61 00 20 */ addi r11, r1, 0x20
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/* 80314E38 48 04 D3 A1 */ bl _savegpr_28
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/* 80314E3C 3B A0 00 00 */ li r29, 0
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/* 80314E40 3B 80 00 00 */ li r28, 0
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/* 80314E44 83 C3 00 38 */ lwz r30, 0x38(r3)
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/* 80314E48 A3 E3 00 0A */ lhz r31, 0xa(r3)
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/* 80314E4C 48 00 00 24 */ b lbl_80314E70
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lbl_80314E50:
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/* 80314E50 57 80 13 BA */ rlwinm r0, r28, 2, 0xe, 0x1d
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/* 80314E54 7C 7E 00 2E */ lwzx r3, r30, r0
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/* 80314E58 81 83 00 00 */ lwz r12, 0(r3)
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/* 80314E5C 81 8C 00 10 */ lwz r12, 0x10(r12)
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/* 80314E60 7D 89 03 A6 */ mtctr r12
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/* 80314E64 4E 80 04 21 */ bctrl
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/* 80314E68 7F BD 1A 14 */ add r29, r29, r3
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/* 80314E6C 3B 9C 00 01 */ addi r28, r28, 1
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lbl_80314E70:
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/* 80314E70 57 80 04 3E */ clrlwi r0, r28, 0x10
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/* 80314E74 7C 00 F8 40 */ cmplw r0, r31
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/* 80314E78 41 80 FF D8 */ blt lbl_80314E50
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/* 80314E7C 7F A3 EB 78 */ mr r3, r29
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/* 80314E80 39 61 00 20 */ addi r11, r1, 0x20
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/* 80314E84 48 04 D3 A1 */ bl _restgpr_28
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/* 80314E88 80 01 00 24 */ lwz r0, 0x24(r1)
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/* 80314E8C 7C 08 03 A6 */ mtlr r0
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/* 80314E90 38 21 00 20 */ addi r1, r1, 0x20
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/* 80314E94 4E 80 00 20 */ blr
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@@ -1,19 +0,0 @@
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lbl_803155E0:
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/* 803155E0 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 803155E4 7C 08 02 A6 */ mflr r0
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/* 803155E8 90 01 00 14 */ stw r0, 0x14(r1)
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/* 803155EC 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 803155F0 7C 7F 1B 78 */ mr r31, r3
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/* 803155F4 38 00 00 00 */ li r0, 0
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/* 803155F8 90 0D 90 50 */ stw r0, sOldVcdVatCmd__8J3DShape(r13)
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/* 803155FC 4B FF FD 05 */ bl loadPreDrawSetting__8J3DShapeCFv
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/* 80315600 7F E3 FB 78 */ mr r3, r31
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/* 80315604 81 9F 00 00 */ lwz r12, 0(r31)
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/* 80315608 81 8C 00 0C */ lwz r12, 0xc(r12)
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/* 8031560C 7D 89 03 A6 */ mtctr r12
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/* 80315610 4E 80 04 21 */ bctrl
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/* 80315614 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 80315618 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 8031561C 7C 08 03 A6 */ mtlr r0
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/* 80315620 38 21 00 10 */ addi r1, r1, 0x10
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/* 80315624 4E 80 00 20 */ blr
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@@ -1,67 +0,0 @@
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lbl_803156AC:
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/* 803156AC 94 21 FF E0 */ stwu r1, -0x20(r1)
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/* 803156B0 7C 08 02 A6 */ mflr r0
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/* 803156B4 90 01 00 24 */ stw r0, 0x24(r1)
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/* 803156B8 39 61 00 20 */ addi r11, r1, 0x20
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/* 803156BC 48 04 CB 21 */ bl _savegpr_29
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/* 803156C0 7C 7E 1B 78 */ mr r30, r3
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/* 803156C4 80 0D 90 50 */ lwz r0, sOldVcdVatCmd__8J3DShape(r13)
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/* 803156C8 80 63 00 2C */ lwz r3, 0x2c(r3)
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/* 803156CC 7C 00 18 40 */ cmplw r0, r3
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/* 803156D0 41 82 00 14 */ beq lbl_803156E4
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/* 803156D4 38 80 00 C0 */ li r4, 0xc0
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/* 803156D8 48 04 A8 19 */ bl GXCallDisplayList
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/* 803156DC 80 1E 00 2C */ lwz r0, 0x2c(r30)
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/* 803156E0 90 0D 90 50 */ stw r0, sOldVcdVatCmd__8J3DShape(r13)
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lbl_803156E4:
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/* 803156E4 88 0D 90 54 */ lbz r0, data_804515D4(r13)
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/* 803156E8 28 00 00 00 */ cmplwi r0, 0
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/* 803156EC 41 82 00 60 */ beq lbl_8031574C
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/* 803156F0 88 1E 00 48 */ lbz r0, 0x48(r30)
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/* 803156F4 28 00 00 00 */ cmplwi r0, 0
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/* 803156F8 40 82 00 54 */ bne lbl_8031574C
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/* 803156FC 80 BE 00 40 */ lwz r5, 0x40(r30)
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/* 80315700 38 80 00 08 */ li r4, 8
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/* 80315704 3C 60 CC 01 */ lis r3, 0xCC01 /* 0xCC008000@ha */
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/* 80315708 98 83 80 00 */ stb r4, 0x8000(r3) /* 0xCC008000@l */
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/* 8031570C 38 00 00 30 */ li r0, 0x30
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/* 80315710 98 03 80 00 */ stb r0, -0x8000(r3)
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/* 80315714 90 A3 80 00 */ stw r5, -0x8000(r3)
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/* 80315718 80 DE 00 44 */ lwz r6, 0x44(r30)
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||||
/* 8031571C 98 83 80 00 */ stb r4, -0x8000(r3)
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/* 80315720 38 00 00 40 */ li r0, 0x40
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/* 80315724 98 03 80 00 */ stb r0, -0x8000(r3)
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/* 80315728 90 C3 80 00 */ stw r6, -0x8000(r3)
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/* 8031572C 38 00 00 10 */ li r0, 0x10
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||||
/* 80315730 98 03 80 00 */ stb r0, -0x8000(r3)
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/* 80315734 38 00 00 01 */ li r0, 1
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/* 80315738 B0 03 80 00 */ sth r0, -0x8000(r3)
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||||
/* 8031573C 38 00 10 18 */ li r0, 0x1018
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||||
/* 80315740 B0 03 80 00 */ sth r0, -0x8000(r3)
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/* 80315744 90 A3 80 00 */ stw r5, -0x8000(r3)
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||||
/* 80315748 90 C3 80 00 */ stw r6, -0x8000(r3)
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lbl_8031574C:
|
||||
/* 8031574C 7F C3 F3 78 */ mr r3, r30
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||||
/* 80315750 4B FF F7 9D */ bl loadVtxArray__8J3DShapeCFv
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||||
/* 80315754 A3 FE 00 0A */ lhz r31, 0xa(r30)
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||||
/* 80315758 3B A0 00 00 */ li r29, 0
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||||
/* 8031575C 83 DE 00 3C */ lwz r30, 0x3c(r30)
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||||
/* 80315760 48 00 00 1C */ b lbl_8031577C
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||||
lbl_80315764:
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||||
/* 80315764 57 A0 13 BA */ rlwinm r0, r29, 2, 0xe, 0x1d
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||||
/* 80315768 7C 7E 00 2E */ lwzx r3, r30, r0
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||||
/* 8031576C 28 03 00 00 */ cmplwi r3, 0
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||||
/* 80315770 41 82 00 08 */ beq lbl_80315778
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||||
/* 80315774 4B FF F3 61 */ bl draw__12J3DShapeDrawCFv
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||||
lbl_80315778:
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||||
/* 80315778 3B BD 00 01 */ addi r29, r29, 1
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||||
lbl_8031577C:
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||||
/* 8031577C 57 A0 04 3E */ clrlwi r0, r29, 0x10
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||||
/* 80315780 7C 00 F8 40 */ cmplw r0, r31
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||||
/* 80315784 41 80 FF E0 */ blt lbl_80315764
|
||||
/* 80315788 39 61 00 20 */ addi r11, r1, 0x20
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||||
/* 8031578C 48 04 CA 9D */ bl _restgpr_29
|
||||
/* 80315790 80 01 00 24 */ lwz r0, 0x24(r1)
|
||||
/* 80315794 7C 08 03 A6 */ mtlr r0
|
||||
/* 80315798 38 21 00 20 */ addi r1, r1, 0x20
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||||
/* 8031579C 4E 80 00 20 */ blr
|
||||
@@ -1,4 +0,0 @@
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||||
lbl_803147E0:
|
||||
/* 803147E0 3C 60 53 4D */ lis r3, 0x534D /* 0x534D5458@ha */
|
||||
/* 803147E4 38 63 54 58 */ addi r3, r3, 0x5458 /* 0x534D5458@l */
|
||||
/* 803147E8 4E 80 00 20 */ blr
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||||
@@ -1,4 +0,0 @@
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||||
lbl_8031470C:
|
||||
/* 8031470C 3C 60 53 4D */ lis r3, 0x534D /* 0x534D4D4C@ha */
|
||||
/* 80314710 38 63 4D 4C */ addi r3, r3, 0x4D4C /* 0x534D4D4C@l */
|
||||
/* 80314714 4E 80 00 20 */ blr
|
||||
@@ -1,4 +0,0 @@
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||||
lbl_8031478C:
|
||||
/* 8031478C 3C 60 53 4D */ lis r3, 0x534D /* 0x534D4356@ha */
|
||||
/* 80314790 38 63 43 56 */ addi r3, r3, 0x4356 /* 0x534D4356@l */
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||||
/* 80314794 4E 80 00 20 */ blr
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||||
@@ -1,4 +0,0 @@
|
||||
lbl_80314688:
|
||||
/* 80314688 3C 60 53 4D */ lis r3, 0x534D /* 0x534D4D43@ha */
|
||||
/* 8031468C 38 63 4D 43 */ addi r3, r3, 0x4D43 /* 0x534D4D43@l */
|
||||
/* 80314690 4E 80 00 20 */ blr
|
||||
@@ -1,4 +0,0 @@
|
||||
lbl_80314610:
|
||||
/* 80314610 3C 60 53 4D */ lis r3, 0x534D /* 0x534D4242@ha */
|
||||
/* 80314614 38 63 42 42 */ addi r3, r3, 0x4242 /* 0x534D4242@l */
|
||||
/* 80314618 4E 80 00 20 */ blr
|
||||
@@ -1,4 +0,0 @@
|
||||
lbl_8031458C:
|
||||
/* 8031458C 3C 60 53 4D */ lis r3, 0x534D /* 0x534D5942@ha */
|
||||
/* 80314590 38 63 59 42 */ addi r3, r3, 0x5942 /* 0x534D5942@l */
|
||||
/* 80314594 4E 80 00 20 */ blr
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||||
@@ -1,3 +0,0 @@
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||||
lbl_8031459C:
|
||||
/* 8031459C A0 63 00 04 */ lhz r3, 4(r3)
|
||||
/* 803145A0 4E 80 00 20 */ blr
|
||||
@@ -1,5 +0,0 @@
|
||||
lbl_80314720:
|
||||
/* 80314720 80 63 00 0C */ lwz r3, 0xc(r3)
|
||||
/* 80314724 54 80 0B FC */ rlwinm r0, r4, 1, 0xf, 0x1e
|
||||
/* 80314728 7C 63 02 2E */ lhzx r3, r3, r0
|
||||
/* 8031472C 4E 80 00 20 */ blr
|
||||
-5
@@ -1,5 +0,0 @@
|
||||
lbl_8031469C:
|
||||
/* 8031469C 80 63 00 0C */ lwz r3, 0xc(r3)
|
||||
/* 803146A0 54 80 0B FC */ rlwinm r0, r4, 1, 0xf, 0x1e
|
||||
/* 803146A4 7C 63 02 2E */ lhzx r3, r3, r0
|
||||
/* 803146A8 4E 80 00 20 */ blr
|
||||
@@ -1,3 +0,0 @@
|
||||
lbl_80314718:
|
||||
/* 80314718 A0 63 00 08 */ lhz r3, 8(r3)
|
||||
/* 8031471C 4E 80 00 20 */ blr
|
||||
@@ -1,3 +0,0 @@
|
||||
lbl_80314694:
|
||||
/* 80314694 A0 63 00 08 */ lhz r3, 8(r3)
|
||||
/* 80314698 4E 80 00 20 */ blr
|
||||
@@ -1,20 +0,0 @@
|
||||
lbl_80313188:
|
||||
/* 80313188 94 21 FF F0 */ stwu r1, -0x10(r1)
|
||||
/* 8031318C 7C 08 02 A6 */ mflr r0
|
||||
/* 80313190 90 01 00 14 */ stw r0, 0x14(r1)
|
||||
/* 80313194 93 E1 00 0C */ stw r31, 0xc(r1)
|
||||
/* 80313198 7C 9F 23 78 */ mr r31, r4
|
||||
/* 8031319C 3C 60 80 43 */ lis r3, j3dSys@ha /* 0x80434AC8@ha */
|
||||
/* 803131A0 38 63 4A C8 */ addi r3, r3, j3dSys@l /* 0x80434AC8@l */
|
||||
/* 803131A4 4B FF CD 1D */ bl loadPosMtxIndx__6J3DSysCFiUs
|
||||
/* 803131A8 3C 60 80 43 */ lis r3, j3dSys@ha /* 0x80434AC8@ha */
|
||||
/* 803131AC 38 63 4A C8 */ addi r3, r3, j3dSys@l /* 0x80434AC8@l */
|
||||
/* 803131B0 80 63 00 40 */ lwz r3, 0x40(r3)
|
||||
/* 803131B4 80 63 00 30 */ lwz r3, 0x30(r3)
|
||||
/* 803131B8 1C 9F 00 03 */ mulli r4, r31, 3
|
||||
/* 803131BC 4B FF C9 A5 */ bl J3DFifoLoadNrmMtxImm__FPA4_fUl
|
||||
/* 803131C0 83 E1 00 0C */ lwz r31, 0xc(r1)
|
||||
/* 803131C4 80 01 00 14 */ lwz r0, 0x14(r1)
|
||||
/* 803131C8 7C 08 03 A6 */ mtlr r0
|
||||
/* 803131CC 38 21 00 10 */ addi r1, r1, 0x10
|
||||
/* 803131D0 4E 80 00 20 */ blr
|
||||
@@ -1,25 +0,0 @@
|
||||
lbl_80313128:
|
||||
/* 80313128 94 21 FF F0 */ stwu r1, -0x10(r1)
|
||||
/* 8031312C 7C 08 02 A6 */ mflr r0
|
||||
/* 80313130 90 01 00 14 */ stw r0, 0x14(r1)
|
||||
/* 80313134 93 E1 00 0C */ stw r31, 0xc(r1)
|
||||
/* 80313138 93 C1 00 08 */ stw r30, 8(r1)
|
||||
/* 8031313C 7C 9E 23 78 */ mr r30, r4
|
||||
/* 80313140 7C BF 2B 78 */ mr r31, r5
|
||||
/* 80313144 3C 60 80 43 */ lis r3, j3dSys@ha /* 0x80434AC8@ha */
|
||||
/* 80313148 38 63 4A C8 */ addi r3, r3, j3dSys@l /* 0x80434AC8@l */
|
||||
/* 8031314C 80 63 00 40 */ lwz r3, 0x40(r3)
|
||||
/* 80313150 80 63 00 30 */ lwz r3, 0x30(r3)
|
||||
/* 80313154 1C 9E 00 03 */ mulli r4, r30, 3
|
||||
/* 80313158 4B FF C9 89 */ bl J3DFifoLoadPosMtxImm__FPA4_fUl
|
||||
/* 8031315C 3C 60 80 43 */ lis r3, j3dSys@ha /* 0x80434AC8@ha */
|
||||
/* 80313160 38 63 4A C8 */ addi r3, r3, j3dSys@l /* 0x80434AC8@l */
|
||||
/* 80313164 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80313168 7F E5 FB 78 */ mr r5, r31
|
||||
/* 8031316C 4B FF CD 79 */ bl loadNrmMtxIndx__6J3DSysCFiUs
|
||||
/* 80313170 83 E1 00 0C */ lwz r31, 0xc(r1)
|
||||
/* 80313174 83 C1 00 08 */ lwz r30, 8(r1)
|
||||
/* 80313178 80 01 00 14 */ lwz r0, 0x14(r1)
|
||||
/* 8031317C 7C 08 03 A6 */ mtlr r0
|
||||
/* 80313180 38 21 00 10 */ addi r1, r1, 0x10
|
||||
/* 80313184 4E 80 00 20 */ blr
|
||||
@@ -1,23 +0,0 @@
|
||||
lbl_803131D4:
|
||||
/* 803131D4 94 21 FF F0 */ stwu r1, -0x10(r1)
|
||||
/* 803131D8 7C 08 02 A6 */ mflr r0
|
||||
/* 803131DC 90 01 00 14 */ stw r0, 0x14(r1)
|
||||
/* 803131E0 93 E1 00 0C */ stw r31, 0xc(r1)
|
||||
/* 803131E4 93 C1 00 08 */ stw r30, 8(r1)
|
||||
/* 803131E8 3C 60 80 43 */ lis r3, j3dSys@ha /* 0x80434AC8@ha */
|
||||
/* 803131EC 3B E3 4A C8 */ addi r31, r3, j3dSys@l /* 0x80434AC8@l */
|
||||
/* 803131F0 80 7F 00 40 */ lwz r3, 0x40(r31)
|
||||
/* 803131F4 80 63 00 30 */ lwz r3, 0x30(r3)
|
||||
/* 803131F8 1F C4 00 03 */ mulli r30, r4, 3
|
||||
/* 803131FC 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80313200 4B FF C8 E1 */ bl J3DFifoLoadPosMtxImm__FPA4_fUl
|
||||
/* 80313204 80 7F 00 40 */ lwz r3, 0x40(r31)
|
||||
/* 80313208 80 63 00 30 */ lwz r3, 0x30(r3)
|
||||
/* 8031320C 7F C4 F3 78 */ mr r4, r30
|
||||
/* 80313210 4B FF C9 51 */ bl J3DFifoLoadNrmMtxImm__FPA4_fUl
|
||||
/* 80313214 83 E1 00 0C */ lwz r31, 0xc(r1)
|
||||
/* 80313218 83 C1 00 08 */ lwz r30, 8(r1)
|
||||
/* 8031321C 80 01 00 14 */ lwz r0, 0x14(r1)
|
||||
/* 80313220 7C 08 03 A6 */ mtlr r0
|
||||
/* 80313224 38 21 00 10 */ addi r1, r1, 0x10
|
||||
/* 80313228 4E 80 00 20 */ blr
|
||||
@@ -1,18 +0,0 @@
|
||||
lbl_803130E4:
|
||||
/* 803130E4 38 00 00 20 */ li r0, 0x20
|
||||
/* 803130E8 3C C0 CC 01 */ lis r6, 0xCC01 /* 0xCC008000@ha */
|
||||
/* 803130EC 98 06 80 00 */ stb r0, 0x8000(r6) /* 0xCC008000@l */
|
||||
/* 803130F0 B0 A6 80 00 */ sth r5, -0x8000(r6)
|
||||
/* 803130F4 1C 04 00 0C */ mulli r0, r4, 0xc
|
||||
/* 803130F8 54 00 04 3E */ clrlwi r0, r0, 0x10
|
||||
/* 803130FC 60 00 B0 00 */ ori r0, r0, 0xb000
|
||||
/* 80313100 B0 06 80 00 */ sth r0, -0x8000(r6)
|
||||
/* 80313104 38 00 00 28 */ li r0, 0x28
|
||||
/* 80313108 98 06 80 00 */ stb r0, -0x8000(r6)
|
||||
/* 8031310C B0 A6 80 00 */ sth r5, -0x8000(r6)
|
||||
/* 80313110 1C 64 00 09 */ mulli r3, r4, 9
|
||||
/* 80313114 38 03 04 00 */ addi r0, r3, 0x400
|
||||
/* 80313118 54 00 04 3E */ clrlwi r0, r0, 0x10
|
||||
/* 8031311C 60 00 80 00 */ ori r0, r0, 0x8000
|
||||
/* 80313120 B0 06 80 00 */ sth r0, -0x8000(r6)
|
||||
/* 80313124 4E 80 00 20 */ blr
|
||||
Reference in New Issue
Block a user