mirror of https://github.com/zeldaret/tp
Improving compatibility with standard cpp compiler (#2920)
* Improving compatibility with standard cpp compiler * Add __REGISTER macro for non mwcc compatibility * Fix for PR comments * fix missing define for revolution * Simplifying cSAngle conversion
This commit is contained in:
parent
7ac2c38caf
commit
fc31053cb6
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@ -285,9 +285,9 @@ if config.version in USE_REVOLUTION_SDK_VERSIONS:
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# Debug flags
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if args.debug:
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# Or -sym dwarf-2 for Wii compilers
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cflags_base.extend(["-sym on", "-DDEBUG=1"])
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cflags_base.extend(["-sym on", "-DDEBUG=1", "-DDEBUG_DEFINED=1", "-DNDEBUG_DEFINED=0"])
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else:
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cflags_base.append("-DNDEBUG=1")
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cflags_base.extend(["-DNDEBUG=1", "-DNDEBUG_DEFINED=1", "-DDEBUG_DEFINED=0"])
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# Warning flags
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if args.warn == "all":
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@ -479,26 +479,26 @@ inline f32 J2DHermiteInterpolation<f32>(f32 f1, f32* f2, f32* f3, f32* f4, f32*
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}
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template <>
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inline f32 J2DHermiteInterpolation<s16>(register f32 pp1, register s16* pp2, register s16* pp3,
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register s16* pp4, register s16* pp5, register s16* pp6,
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register s16* pp7) {
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inline f32 J2DHermiteInterpolation<s16>(__REGISTER f32 pp1, __REGISTER s16* pp2, __REGISTER s16* pp3,
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__REGISTER s16* pp4, __REGISTER s16* pp5, __REGISTER s16* pp6,
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__REGISTER s16* pp7) {
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#ifdef __MWERKS__
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register f32 p1 = pp1;
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register f32 ff8;
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register f32 ff7;
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register f32 ff6;
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register f32 ff5;
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register f32 ff4;
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register f32 ff3;
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register f32 ff2;
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register f32 ff0;
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register f32 fout;
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register s16* p2 = pp2;
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register s16* p3 = pp3;
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register s16* p4 = pp4;
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register s16* p5 = pp5;
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register s16* p6 = pp6;
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register s16* p7 = pp7;
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__REGISTER f32 p1 = pp1;
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__REGISTER f32 ff8;
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__REGISTER f32 ff7;
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__REGISTER f32 ff6;
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__REGISTER f32 ff5;
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__REGISTER f32 ff4;
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__REGISTER f32 ff3;
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__REGISTER f32 ff2;
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__REGISTER f32 ff0;
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__REGISTER f32 fout;
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__REGISTER s16* p2 = pp2;
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__REGISTER s16* p3 = pp3;
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__REGISTER s16* p4 = pp4;
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__REGISTER s16* p5 = pp5;
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__REGISTER s16* p6 = pp6;
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__REGISTER s16* p7 = pp7;
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// clang-format off
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asm {
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psq_l ff2, 0(p2), 0x1, 5
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@ -100,7 +100,7 @@ public:
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/* 0x10 */ u32 mFlags;
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}; // Size: 0x14
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inline void J3DFillZero32B(register void* param_0, register u32 param_1) {
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inline void J3DFillZero32B(__REGISTER void* param_0, __REGISTER u32 param_1) {
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#ifdef __MWERKS__
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asm {
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srwi param_1, param_1, 5
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@ -4,13 +4,13 @@
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#include "JSystem/J3DGraphBase/J3DSys.h"
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// matches debug
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inline f32 J3DCalcZValue(register MtxP m, register Vec v) {
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inline f32 J3DCalcZValue(__REGISTER MtxP m, __REGISTER Vec v) {
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#ifdef __MWERKS__
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register f32 temp_f4;
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register f32 out;
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register f32 temp_f0;
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register f32 temp_f2;
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register f32 temp_f1 = 1.0f;
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__REGISTER f32 temp_f4;
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__REGISTER f32 out;
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__REGISTER f32 temp_f0;
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__REGISTER f32 temp_f2;
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__REGISTER f32 temp_f1 = 1.0f;
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// clang-format off
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asm {
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@ -54,9 +54,9 @@ struct J3DTextureSRTInfo {
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inline void operator=(J3DTextureSRTInfo const& other) {
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#ifdef __MWERKS__
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register const f32* src = &other.mScaleX;
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register f32* dst = &mScaleX;
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register f32 xy;
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__REGISTER const f32* src = &other.mScaleX;
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__REGISTER f32* dst = &mScaleX;
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__REGISTER f32 xy;
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asm {
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psq_l xy, 0(src), 0, 0
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psq_st xy, 0(dst), 0, 0
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@ -23,10 +23,10 @@ struct J3DTransformInfo {
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} */
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#ifdef __MWERKS__
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inline J3DTransformInfo& operator=(const register J3DTransformInfo& b) {
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register const J3DTransformInfo& var_r31 = b;
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register J3DTransformInfo& var_r30 = *this;
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register f32 var_f31;
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inline J3DTransformInfo& operator=(const __REGISTER J3DTransformInfo& b) {
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__REGISTER const J3DTransformInfo& var_r31 = b;
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__REGISTER J3DTransformInfo& var_r30 = *this;
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__REGISTER f32 var_f31;
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asm {
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psq_l var_f31, J3DTransformInfo.mScale(var_r31), 0, 0
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psq_st var_f31, J3DTransformInfo.mScale(var_r30), 0, 0
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@ -64,13 +64,13 @@ void J3DScaleNrmMtx33(f32 (*)[3], const Vec&);
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void J3DMtxProjConcat(f32 (*)[4], f32 (*)[4], f32 (*)[4]);
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void J3DPSMtxArrayConcat(f32 (*)[4], f32 (*)[4], f32 (*)[4], u32);
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inline void J3DPSMtx33Copy(register Mtx3P src, register Mtx3P dst) {
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inline void J3DPSMtx33Copy(__REGISTER Mtx3P src, __REGISTER Mtx3P dst) {
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#ifdef __MWERKS__
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register f32 fr4;
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register f32 fr3;
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register f32 fr2;
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register f32 fr1;
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register f32 fr0;
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__REGISTER f32 fr4;
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__REGISTER f32 fr3;
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__REGISTER f32 fr2;
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__REGISTER f32 fr1;
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__REGISTER f32 fr0;
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asm {
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psq_l fr4, 0(src), 0, 0
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@ -87,14 +87,14 @@ inline void J3DPSMtx33Copy(register Mtx3P src, register Mtx3P dst) {
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#endif
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}
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inline void J3DPSMtx33CopyFrom34(register MtxP src, register Mtx3P dst) {
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inline void J3DPSMtx33CopyFrom34(__REGISTER MtxP src, __REGISTER Mtx3P dst) {
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#ifdef __MWERKS__
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register f32 x_y1;
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register f32 z1;
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register f32 x_y2;
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register f32 z2;
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register f32 x_y3;
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register f32 z3;
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__REGISTER f32 x_y1;
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__REGISTER f32 z1;
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__REGISTER f32 x_y2;
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__REGISTER f32 z2;
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__REGISTER f32 x_y3;
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__REGISTER f32 z3;
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asm {
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psq_l x_y1, 0(src), 0, 0
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lfs z1, 8(src)
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@ -112,7 +112,7 @@ inline void J3DPSMtx33CopyFrom34(register MtxP src, register Mtx3P dst) {
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#endif
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}
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inline void J3DPSMulMtxVec(register MtxP mtx, register Vec* vec, register Vec* dst) {
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inline void J3DPSMulMtxVec(__REGISTER MtxP mtx, __REGISTER Vec* vec, __REGISTER Vec* dst) {
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#ifdef __MWERKS__
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asm {
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psq_l f0, 0(vec), 0, 0
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@ -139,7 +139,7 @@ inline void J3DPSMulMtxVec(register MtxP mtx, register Vec* vec, register Vec* d
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#endif
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}
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inline void J3DPSMulMtxVec(register MtxP mtx, register S16Vec* vec, register S16Vec* dst) {
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inline void J3DPSMulMtxVec(__REGISTER MtxP mtx, __REGISTER S16Vec* vec, __REGISTER S16Vec* dst) {
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#ifdef __MWERKS__
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asm {
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psq_l f0, 0(vec), 0, 7
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@ -166,7 +166,7 @@ inline void J3DPSMulMtxVec(register MtxP mtx, register S16Vec* vec, register S16
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#endif
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}
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inline void J3DPSMulMtxVec(register Mtx3P mtx, register Vec* vec, register Vec* dst) {
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inline void J3DPSMulMtxVec(__REGISTER Mtx3P mtx, __REGISTER Vec* vec, __REGISTER Vec* dst) {
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#ifdef __MWERKS__
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asm {
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lis r6, PSMulUnit01@ha
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@ -197,7 +197,7 @@ inline void J3DPSMulMtxVec(register Mtx3P mtx, register Vec* vec, register Vec*
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#endif
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}
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inline void J3DPSMulMtxVec(register Mtx3P mtx, register S16Vec* vec, register S16Vec* dst) {
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inline void J3DPSMulMtxVec(__REGISTER Mtx3P mtx, __REGISTER S16Vec* vec, __REGISTER S16Vec* dst) {
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#ifdef __MWERKS__
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asm {
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lis r6, PSMulUnit01@ha
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@ -127,11 +127,11 @@ struct TVec3<s16> {
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inline void setTVec3f(const f32* vec_a, f32* vec_b) {
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#ifdef __MWERKS__
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const register f32* v_a = vec_a;
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register f32* v_b = vec_b;
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const __REGISTER f32* v_a = vec_a;
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__REGISTER f32* v_b = vec_b;
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register f32 a_x;
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register f32 b_x;
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__REGISTER f32 a_x;
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__REGISTER f32 b_x;
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asm {
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psq_l a_x, 0(v_a), 0, 0
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@ -154,14 +154,14 @@ inline float fsqrt_step(float mag) {
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#endif
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}
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inline void mulInternal(register const f32* a, register const f32* b, register float* dst) {
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inline void mulInternal(__REGISTER const f32* a, __REGISTER const f32* b, __REGISTER float* dst) {
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#ifdef __MWERKS__
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register f32 a_x_y;
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register f32 b_x_y;
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register f32 x_y;
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register f32 za;
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register f32 zb;
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register f32 z;
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__REGISTER f32 a_x_y;
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__REGISTER f32 b_x_y;
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__REGISTER f32 x_y;
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__REGISTER f32 za;
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__REGISTER f32 zb;
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__REGISTER f32 z;
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asm {
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psq_l a_x_y, 0(a), 0, 0
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@ -283,12 +283,12 @@ struct TVec3<f32> : public Vec {
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return VECMag((Vec*)this);
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}
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void scale(register f32 sc) {
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void scale(__REGISTER f32 sc) {
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#ifdef __MWERKS__
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register f32 z;
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register f32 x_y;
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register f32* dst = &x;
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register f32 zres;
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__REGISTER f32 z;
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__REGISTER f32 x_y;
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__REGISTER f32* dst = &x;
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__REGISTER f32 zres;
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asm {
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psq_l x_y, 0(dst), 0, 0
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@ -301,13 +301,13 @@ struct TVec3<f32> : public Vec {
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#endif
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}
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void scale(register f32 sc, const TVec3<f32>& other) {
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void scale(__REGISTER f32 sc, const TVec3<f32>& other) {
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#ifdef __MWERKS__
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register const f32* src = &other.x;
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register f32 z;
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register f32 x_y;
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register f32* dst = &x;
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register f32 zres;
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__REGISTER const f32* src = &other.x;
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__REGISTER f32 z;
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__REGISTER f32 x_y;
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__REGISTER f32* dst = &x;
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__REGISTER f32 zres;
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asm {
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psq_l x_y, 0(src), 0, 0
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@ -320,16 +320,16 @@ struct TVec3<f32> : public Vec {
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#endif
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}
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void scaleAdd(register f32 sc, const TVec3<f32>& a, const TVec3<f32>& b) {
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void scaleAdd(__REGISTER f32 sc, const TVec3<f32>& a, const TVec3<f32>& b) {
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JMAVECScaleAdd(&a, &b, this, sc);
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}
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void negateInternal(TVec3<f32>* dst) {
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#ifdef __MWERKS__
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register f32* rdst = &dst->x;
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const register f32* src = &x;
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register f32 x_y;
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register f32 z;
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__REGISTER f32* rdst = &dst->x;
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const __REGISTER f32* src = &x;
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__REGISTER f32 x_y;
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__REGISTER f32 z;
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asm {
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psq_l x_y, 0(src), 0, 0
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@ -7,9 +7,9 @@
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void JMAMTXApplyScale(const Mtx, Mtx, f32, f32, f32);
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void JMAEulerToQuat(s16 param_0, s16 param_1, s16 param_2, Quaternion* param_3);
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void JMAQuatLerp(const Quaternion*, const Quaternion*, f32, Quaternion*);
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void JMAFastVECNormalize(register const Vec* src, register Vec* dst);
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void JMAVECScaleAdd(register const Vec* vec1, register const Vec* vec2, register Vec* dst,
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register f32 scale);
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void JMAFastVECNormalize(__REGISTER const Vec* src, __REGISTER Vec* dst);
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void JMAVECScaleAdd(__REGISTER const Vec* vec1, __REGISTER const Vec* vec2, __REGISTER Vec* dst,
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__REGISTER f32 scale);
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inline int JMAAbs(int value) {
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#ifdef __MWERKS__
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@ -23,9 +23,9 @@ inline f32 JMAFastReciprocal(f32 value) {
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#endif
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}
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inline float __frsqrtes(register double f) {
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inline float __frsqrtes(__REGISTER double f) {
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#ifdef __MWERKS__
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register float out;
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__REGISTER float out;
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// clang-format off
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asm {
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@ -37,10 +37,10 @@ inline float __frsqrtes(register double f) {
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#endif
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}
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inline f32 JMAFastSqrt(register const f32 input) {
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inline f32 JMAFastSqrt(__REGISTER const f32 input) {
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#ifdef __MWERKS__
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if (input > 0.0f) {
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register f32 out;
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__REGISTER f32 out;
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asm {
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frsqrte out, input
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}
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@ -51,17 +51,17 @@ inline f32 JMAFastSqrt(register const f32 input) {
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#endif
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}
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inline f32 JMAHermiteInterpolation(register f32 p1, register f32 p2, register f32 p3,
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register f32 p4, register f32 p5, register f32 p6,
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register f32 p7) {
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inline f32 JMAHermiteInterpolation(__REGISTER f32 p1, __REGISTER f32 p2, __REGISTER f32 p3,
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__REGISTER f32 p4, __REGISTER f32 p5, __REGISTER f32 p6,
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__REGISTER f32 p7) {
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#ifdef __MWERKS__
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register f32 ff25;
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register f32 ff31;
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register f32 ff30;
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register f32 ff29;
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register f32 ff28;
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register f32 ff27;
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register f32 ff26;
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__REGISTER f32 ff25;
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__REGISTER f32 ff31;
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__REGISTER f32 ff30;
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__REGISTER f32 ff29;
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__REGISTER f32 ff28;
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__REGISTER f32 ff27;
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__REGISTER f32 ff26;
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// clang-format off
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asm {
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fsubs ff31, p1, p2
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@ -99,10 +99,10 @@ inline void fastVECNormalize(const Vec* src, Vec* dst) {
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return JMAFastVECNormalize(src, dst);
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}
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inline void gekko_ps_copy3(register void* dst, register const void* src) {
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inline void gekko_ps_copy3(__REGISTER void* dst, __REGISTER const void* src) {
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#ifdef __MWERKS__
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register f32 src0;
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register f32 src1;
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__REGISTER f32 src0;
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__REGISTER f32 src1;
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asm {
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psq_l src0, 0(src), 0, 0
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lfs src1, 8(src)
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@ -112,11 +112,11 @@ inline void gekko_ps_copy3(register void* dst, register const void* src) {
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#endif
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}
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inline void gekko_ps_copy6(register void* dst, register const void* src) {
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inline void gekko_ps_copy6(__REGISTER void* dst, __REGISTER const void* src) {
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#ifdef __MWERKS__
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register f32 src0;
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register f32 src1;
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register f32 src2;
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__REGISTER f32 src0;
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__REGISTER f32 src1;
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__REGISTER f32 src2;
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asm {
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psq_l src0, 0(src), 0, 0
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psq_l src1, 8(src), 0, 0
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@ -128,14 +128,14 @@ inline void gekko_ps_copy6(register void* dst, register const void* src) {
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#endif
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}
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inline void gekko_ps_copy12(register void* dst, register const void* src) {
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inline void gekko_ps_copy12(__REGISTER void* dst, __REGISTER const void* src) {
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#ifdef __MWERKS__
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register f32 src0;
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register f32 src1;
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register f32 src2;
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register f32 src3;
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register f32 src4;
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register f32 src5;
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__REGISTER f32 src0;
|
||||
__REGISTER f32 src1;
|
||||
__REGISTER f32 src2;
|
||||
__REGISTER f32 src3;
|
||||
__REGISTER f32 src4;
|
||||
__REGISTER f32 src5;
|
||||
asm {
|
||||
psq_l src0, 0(src), 0, 0
|
||||
psq_l src1, 8(src), 0, 0
|
||||
|
|
@ -153,16 +153,16 @@ inline void gekko_ps_copy12(register void* dst, register const void* src) {
|
|||
#endif
|
||||
}
|
||||
|
||||
inline void gekko_ps_copy16(register void* dst, register const void* src) {
|
||||
inline void gekko_ps_copy16(__REGISTER void* dst, __REGISTER const void* src) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 src0;
|
||||
register f32 src1;
|
||||
register f32 src2;
|
||||
register f32 src3;
|
||||
register f32 src4;
|
||||
register f32 src5;
|
||||
register f32 src6;
|
||||
register f32 src7;
|
||||
__REGISTER f32 src0;
|
||||
__REGISTER f32 src1;
|
||||
__REGISTER f32 src2;
|
||||
__REGISTER f32 src3;
|
||||
__REGISTER f32 src4;
|
||||
__REGISTER f32 src5;
|
||||
__REGISTER f32 src6;
|
||||
__REGISTER f32 src7;
|
||||
asm {
|
||||
psq_l src0, 0(src), 0, 0
|
||||
psq_l src1, 8(src), 0, 0
|
||||
|
|
@ -187,13 +187,13 @@ inline void gekko_ps_copy16(register void* dst, register const void* src) {
|
|||
}; // namespace JMath
|
||||
|
||||
namespace JMathInlineVEC {
|
||||
inline void C_VECAdd(register const Vec* a, register const Vec* b, register Vec* ab) {
|
||||
inline void C_VECAdd(__REGISTER const Vec* a, __REGISTER const Vec* b, __REGISTER Vec* ab) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 axy;
|
||||
register f32 bxy;
|
||||
register f32 az;
|
||||
register f32 sumz;
|
||||
register f32 bz;
|
||||
__REGISTER f32 axy;
|
||||
__REGISTER f32 bxy;
|
||||
__REGISTER f32 az;
|
||||
__REGISTER f32 sumz;
|
||||
__REGISTER f32 bz;
|
||||
asm {
|
||||
psq_l axy, 0(a), 0, 0
|
||||
psq_l bxy, 0(b), 0, 0
|
||||
|
|
@ -207,13 +207,13 @@ namespace JMathInlineVEC {
|
|||
#endif
|
||||
}
|
||||
|
||||
inline void C_VECSubtract(register const Vec* a, register const Vec* b, register Vec* ab) {
|
||||
inline void C_VECSubtract(__REGISTER const Vec* a, __REGISTER const Vec* b, __REGISTER Vec* ab) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 axy;
|
||||
register f32 bxy;
|
||||
register f32 az;
|
||||
register f32 subz;
|
||||
register f32 bz;
|
||||
__REGISTER f32 axy;
|
||||
__REGISTER f32 bxy;
|
||||
__REGISTER f32 az;
|
||||
__REGISTER f32 subz;
|
||||
__REGISTER f32 bz;
|
||||
asm {
|
||||
psq_l axy, 0(a), 0, 0
|
||||
psq_l bxy, 0(b), 0, 0
|
||||
|
|
@ -227,11 +227,11 @@ namespace JMathInlineVEC {
|
|||
#endif
|
||||
}
|
||||
|
||||
inline f32 C_VECSquareMag(register const Vec* v) {
|
||||
inline f32 C_VECSquareMag(__REGISTER const Vec* v) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 x_y;
|
||||
register f32 z;
|
||||
register f32 res;
|
||||
__REGISTER f32 x_y;
|
||||
__REGISTER f32 z;
|
||||
__REGISTER f32 res;
|
||||
|
||||
asm {
|
||||
psq_l x_y, 0(v), 0, 0
|
||||
|
|
@ -244,13 +244,13 @@ namespace JMathInlineVEC {
|
|||
#endif
|
||||
}
|
||||
|
||||
inline f32 C_VECDotProduct(register const Vec *a, register const Vec *b) {
|
||||
inline f32 C_VECDotProduct(__REGISTER const Vec *a, __REGISTER const Vec *b) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 res;
|
||||
register f32 thisyz;
|
||||
register f32 otheryz;
|
||||
register f32 otherxy;
|
||||
register f32 thisxy;
|
||||
__REGISTER f32 res;
|
||||
__REGISTER f32 thisyz;
|
||||
__REGISTER f32 otheryz;
|
||||
__REGISTER f32 otherxy;
|
||||
__REGISTER f32 thisxy;
|
||||
asm {
|
||||
psq_l thisyz, 4(a), 0, 0
|
||||
psq_l otheryz, 4(b), 0, 0
|
||||
|
|
|
|||
|
|
@ -288,10 +288,10 @@ extern int __OSInIPL;
|
|||
|
||||
#define ASSERT(cond) ASSERTLINE(__LINE__, cond)
|
||||
|
||||
inline s16 __OSf32tos16(register f32 inF) {
|
||||
register s16 out;
|
||||
inline s16 __OSf32tos16(__REGISTER f32 inF) {
|
||||
__REGISTER s16 out;
|
||||
u32 tmp;
|
||||
register u32* tmpPtr = &tmp;
|
||||
__REGISTER u32* tmpPtr = &tmp;
|
||||
// clang-format off
|
||||
#ifdef __MWERKS__
|
||||
asm {
|
||||
|
|
@ -308,10 +308,10 @@ inline void OSf32tos16(f32* f, s16* out) {
|
|||
*out = __OSf32tos16(*f);
|
||||
}
|
||||
|
||||
inline u8 __OSf32tou8(register f32 inF) {
|
||||
register u8 out;
|
||||
inline u8 __OSf32tou8(__REGISTER f32 inF) {
|
||||
__REGISTER u8 out;
|
||||
u32 tmp;
|
||||
register u32* tmpPtr = &tmp;
|
||||
__REGISTER u32* tmpPtr = &tmp;
|
||||
// clang-format off
|
||||
#ifdef __MWERKS__
|
||||
asm {
|
||||
|
|
|
|||
|
|
@ -76,6 +76,12 @@ typedef unsigned int uint;
|
|||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef __MWERKS__
|
||||
#define __REGISTER register
|
||||
#else
|
||||
#define __REGISTER
|
||||
#endif
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -306,7 +306,7 @@ extern BOOL __OSInReboot;
|
|||
|
||||
#define ASSERT(cond) ASSERTLINE(__LINE__, cond)
|
||||
|
||||
inline s16 __OSf32tos16(register f32 inF) {
|
||||
inline s16 __OSf32tos16(__REGISTER f32 inF) {
|
||||
#ifdef __MWERKS__
|
||||
register s16 out;
|
||||
u32 tmp;
|
||||
|
|
@ -327,7 +327,7 @@ inline void OSf32tos16(f32* f, s16* out) {
|
|||
*out = __OSf32tos16(*f);
|
||||
}
|
||||
|
||||
inline u8 __OSf32tou8(register f32 inF) {
|
||||
inline u8 __OSf32tou8(__REGISTER f32 inF) {
|
||||
#ifdef __MWERKS__
|
||||
register u8 out;
|
||||
u32 tmp;
|
||||
|
|
|
|||
|
|
@ -73,6 +73,12 @@ typedef unsigned int uint;
|
|||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef __MWERKS__
|
||||
#define __REGISTER register
|
||||
#else
|
||||
#define __REGISTER
|
||||
#endif
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -507,10 +507,10 @@ inline f32 J3DHermiteInterpolation(f32 p1, f32 const* p2, f32 const* p3, f32 con
|
|||
return JMAHermiteInterpolation(p1, *p2, *p3, *p4, *p5, *p6, *p7);
|
||||
}
|
||||
|
||||
inline f32 J3DHermiteInterpolation(register f32 pp1, register s16 const* pp2,
|
||||
register s16 const* pp3, register s16 const* pp4,
|
||||
register s16 const* pp5, register s16 const* pp6,
|
||||
register s16 const* pp7) {
|
||||
inline f32 J3DHermiteInterpolation(__REGISTER f32 pp1, __REGISTER s16 const* pp2,
|
||||
__REGISTER s16 const* pp3, __REGISTER s16 const* pp4,
|
||||
__REGISTER s16 const* pp5, __REGISTER s16 const* pp6,
|
||||
__REGISTER s16 const* pp7) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 p1 = pp1;
|
||||
register f32 ff8;
|
||||
|
|
|
|||
|
|
@ -237,10 +237,10 @@ s32 J3DMtxBuffer::createBumpMtxArray(J3DModelData* i_modelData, u32 mtxNum) {
|
|||
static f32 J3DUnit01[] = { 0.0f, 1.0f };
|
||||
|
||||
void J3DMtxBuffer::calcWeightEnvelopeMtx() {
|
||||
register MtxP weightAnmMtx;
|
||||
register Mtx* worldMtx;
|
||||
register Mtx* invMtx;
|
||||
register f32 weight;
|
||||
__REGISTER MtxP weightAnmMtx;
|
||||
__REGISTER Mtx* worldMtx;
|
||||
__REGISTER Mtx* invMtx;
|
||||
__REGISTER f32 weight;
|
||||
int idx;
|
||||
int j;
|
||||
int mixNum;
|
||||
|
|
@ -251,27 +251,27 @@ void J3DMtxBuffer::calcWeightEnvelopeMtx() {
|
|||
u8* pScale;
|
||||
|
||||
#if DEBUG || !__MWERKS__
|
||||
register Mtx mtx;
|
||||
__REGISTER Mtx mtx;
|
||||
#else
|
||||
register f32 var_f1;
|
||||
register f32 var_f2;
|
||||
register f32 var_f3;
|
||||
register f32 var_f4;
|
||||
register f32 var_f5;
|
||||
register f32 var_f6;
|
||||
register f32 var_f7;
|
||||
register f32 var_f8;
|
||||
register f32 var_f9;
|
||||
register f32 var_f10;
|
||||
register f32 var_f11;
|
||||
register f32 var_f12;
|
||||
register f32 var_f13;
|
||||
register f32 var_f31;
|
||||
register f32 var_f30;
|
||||
register f32 var_f29;
|
||||
register f32 var_f28;
|
||||
register f32 var_f27;
|
||||
register f32* var_r7 = J3DUnit01;
|
||||
__REGISTER f32 var_f1;
|
||||
__REGISTER f32 var_f2;
|
||||
__REGISTER f32 var_f3;
|
||||
__REGISTER f32 var_f4;
|
||||
__REGISTER f32 var_f5;
|
||||
__REGISTER f32 var_f6;
|
||||
__REGISTER f32 var_f7;
|
||||
__REGISTER f32 var_f8;
|
||||
__REGISTER f32 var_f9;
|
||||
__REGISTER f32 var_f10;
|
||||
__REGISTER f32 var_f11;
|
||||
__REGISTER f32 var_f12;
|
||||
__REGISTER f32 var_f13;
|
||||
__REGISTER f32 var_f31;
|
||||
__REGISTER f32 var_f30;
|
||||
__REGISTER f32 var_f29;
|
||||
__REGISTER f32 var_f28;
|
||||
__REGISTER f32 var_f27;
|
||||
__REGISTER f32* var_r7 = J3DUnit01;
|
||||
#endif
|
||||
|
||||
i = -1;
|
||||
|
|
@ -316,8 +316,8 @@ void J3DMtxBuffer::calcWeightEnvelopeMtx() {
|
|||
MTXConcat(*worldMtx, *invMtx, mtx);
|
||||
#else
|
||||
// Fakematch? Doesn't match if worldMtx and invMtx are used directly.
|
||||
register void* var_r5 = worldMtx;
|
||||
register void* var_r6 = invMtx;
|
||||
__REGISTER void* var_r5 = worldMtx;
|
||||
__REGISTER void* var_r6 = invMtx;
|
||||
asm {
|
||||
psq_l var_f2, 0x0(var_r6), 0, 0 /* qr0 */
|
||||
psq_l var_f1, 0x0(var_r5), 0, 0 /* qr0 */
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
#include "JSystem/JMath/JMATrigonometric.h"
|
||||
#include "JSystem/JMath/JMath.h"
|
||||
|
||||
void __MTGQR7(register u32 v) {
|
||||
void __MTGQR7(__REGISTER u32 v) {
|
||||
#ifdef __MWERKS__
|
||||
// clang-format off
|
||||
asm {
|
||||
|
|
@ -23,8 +23,8 @@ void J3DGQRSetup7(u32 r0, u32 r1, u32 r2, u32 r3) {
|
|||
|
||||
// this uses a non-standard sqrtf, not sure why or how its supposed to be setup
|
||||
#if !PLATFORM_SHIELD
|
||||
inline f32 J3D_sqrtf(register f32 x) {
|
||||
register f32 recip;
|
||||
inline f32 J3D_sqrtf(__REGISTER f32 x) {
|
||||
__REGISTER f32 recip;
|
||||
|
||||
if (x > 0.0f) {
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
|
|
@ -38,7 +38,7 @@ inline f32 J3D_sqrtf(register f32 x) {
|
|||
#define J3D_sqrtf sqrtf
|
||||
#endif
|
||||
|
||||
void J3DCalcBBoardMtx(register Mtx mtx) {
|
||||
void J3DCalcBBoardMtx(__REGISTER Mtx mtx) {
|
||||
f32 x = (mtx[0][0] * mtx[0][0]) + (mtx[1][0] * mtx[1][0]) + (mtx[2][0] * mtx[2][0]);
|
||||
f32 y = (mtx[0][1] * mtx[0][1]) + (mtx[1][1] * mtx[1][1]) + (mtx[2][1] * mtx[2][1]);
|
||||
f32 z = (mtx[0][2] * mtx[0][2]) + (mtx[1][2] * mtx[1][2]) + (mtx[2][2] * mtx[2][2]);
|
||||
|
|
@ -53,7 +53,7 @@ void J3DCalcBBoardMtx(register Mtx mtx) {
|
|||
z = J3D_sqrtf(z);
|
||||
}
|
||||
|
||||
register f32 zero = 0.0f;
|
||||
__REGISTER f32 zero = 0.0f;
|
||||
// zero out gaps of zeroes
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
asm {
|
||||
|
|
@ -101,7 +101,7 @@ void J3DCalcYBBoardMtx(Mtx mtx) {
|
|||
mtx[2][2] = vec.z * z;
|
||||
}
|
||||
|
||||
asm void J3DPSCalcInverseTranspose(register Mtx src, register Mtx33 dst) {
|
||||
asm void J3DPSCalcInverseTranspose(__REGISTER Mtx src, __REGISTER Mtx33 dst) {
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
psq_l f0, 0(src), 1, 0
|
||||
psq_l f1, 4(src), 0, 0
|
||||
|
|
@ -290,7 +290,7 @@ void J3DGetTextureMtxMayaOld(const J3DTextureSRTInfo& srt, Mtx dst) {
|
|||
dst[2][2] = 1.0f;
|
||||
}
|
||||
|
||||
asm void J3DScaleNrmMtx(register Mtx mtx, const register Vec& scl) {
|
||||
asm void J3DScaleNrmMtx(__REGISTER Mtx mtx, const __REGISTER Vec& scl) {
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
nofralloc;
|
||||
|
||||
|
|
@ -326,7 +326,7 @@ asm void J3DScaleNrmMtx(register Mtx mtx, const register Vec& scl) {
|
|||
#endif // clang-format on
|
||||
}
|
||||
|
||||
asm void J3DScaleNrmMtx33(register Mtx33 mtx, const register Vec& scale) {
|
||||
asm void J3DScaleNrmMtx33(__REGISTER Mtx33 mtx, const __REGISTER Vec& scale) {
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
psq_l f0, 0(mtx), 0, 0
|
||||
psq_l f6, 0(scale), 0, 0
|
||||
|
|
@ -352,7 +352,7 @@ asm void J3DScaleNrmMtx33(register Mtx33 mtx, const register Vec& scale) {
|
|||
#endif // clang-format on
|
||||
}
|
||||
|
||||
asm void J3DMtxProjConcat(register Mtx mtx1, register Mtx mtx2, register Mtx dst) {
|
||||
asm void J3DMtxProjConcat(__REGISTER Mtx mtx1, __REGISTER Mtx mtx2, __REGISTER Mtx dst) {
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
psq_l f2, 0(mtx1), 0, 0
|
||||
psq_l f3, 8(mtx1), 0, 0
|
||||
|
|
|
|||
|
|
@ -19,10 +19,10 @@ void JMAEulerToQuat(s16 x, s16 y, s16 z, Quaternion* quat) {
|
|||
quat->z = sinZ * (cosX * cosY) - cosZ * (sinX * sinY);
|
||||
}
|
||||
|
||||
void JMAQuatLerp(register const Quaternion* p, register const Quaternion* q, f32 t,
|
||||
void JMAQuatLerp(__REGISTER const Quaternion* p, __REGISTER const Quaternion* q, f32 t,
|
||||
Quaternion* dst) {
|
||||
register f32 pxy, pzw, qxy, qzw;
|
||||
register f32 dp;
|
||||
__REGISTER f32 pxy, pzw, qxy, qzw;
|
||||
__REGISTER f32 dp;
|
||||
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
// compute dot product
|
||||
|
|
@ -52,8 +52,8 @@ void JMAQuatLerp(register const Quaternion* p, register const Quaternion* q, f32
|
|||
}
|
||||
}
|
||||
|
||||
void JMAFastVECNormalize(register const Vec* src, register Vec* dst) {
|
||||
register f32 vxy, rxy, vz, length;
|
||||
void JMAFastVECNormalize(__REGISTER const Vec* src, __REGISTER Vec* dst) {
|
||||
__REGISTER f32 vxy, rxy, vz, length;
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
asm {
|
||||
psq_l vxy, 0(src), 0, 0
|
||||
|
|
@ -70,11 +70,11 @@ void JMAFastVECNormalize(register const Vec* src, register Vec* dst) {
|
|||
#endif // clang-format on
|
||||
}
|
||||
|
||||
void JMAVECScaleAdd(register const Vec* vec1, register const Vec* vec2, register Vec* dst,
|
||||
register f32 scale) {
|
||||
register f32 v1xy;
|
||||
register f32 v2xy = scale;
|
||||
register f32 rxy, v1z, v2z, rz;
|
||||
void JMAVECScaleAdd(__REGISTER const Vec* vec1, __REGISTER const Vec* vec2, __REGISTER Vec* dst,
|
||||
__REGISTER f32 scale) {
|
||||
__REGISTER f32 v1xy;
|
||||
__REGISTER f32 v2xy = scale;
|
||||
__REGISTER f32 rxy, v1z, v2z, rz;
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
asm {
|
||||
psq_l v1xy, 0(vec1), 0, 0
|
||||
|
|
@ -90,11 +90,11 @@ void JMAVECScaleAdd(register const Vec* vec1, register const Vec* vec2, register
|
|||
#endif // clang-format on
|
||||
}
|
||||
|
||||
void JMAMTXApplyScale(register const Mtx src, register Mtx dst, register f32 xScale,
|
||||
register f32 yScale, register f32 zScale) {
|
||||
register f32 scale = yScale;
|
||||
register f32 x, y, z;
|
||||
register f32 normal = 1.0f;
|
||||
void JMAMTXApplyScale(__REGISTER const Mtx src, __REGISTER Mtx dst, __REGISTER f32 xScale,
|
||||
__REGISTER f32 yScale, __REGISTER f32 zScale) {
|
||||
__REGISTER f32 scale = yScale;
|
||||
__REGISTER f32 x, y, z;
|
||||
__REGISTER f32 normal = 1.0f;
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
asm {
|
||||
// scale first 2 components
|
||||
|
|
|
|||
|
|
@ -106,7 +106,7 @@ static const u32 __constants[] = {
|
|||
0x00000000, 0x00000000, 0x41F00000, 0x00000000, 0x41E00000, 0x00000000,
|
||||
};
|
||||
|
||||
asm u32 __cvt_fp2unsigned(register f64 d)
|
||||
asm u32 __cvt_fp2unsigned(__REGISTER f64 d)
|
||||
{
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
nofralloc
|
||||
|
|
|
|||
|
|
@ -90,10 +90,10 @@ DSError TRKInitializeTarget() {
|
|||
#define __dcbi(a, b) asm { dcbi a, b }
|
||||
#define __dcbfASM(a, b) asm { dcbf a, b }
|
||||
|
||||
void TRK__read_aram(register int c, register u32 p2, void* p3) {
|
||||
void TRK__read_aram(__REGISTER int c, __REGISTER u32 p2, void* p3) {
|
||||
u32 err;
|
||||
int i;
|
||||
register int counter;
|
||||
__REGISTER int counter;
|
||||
u16 r;
|
||||
u32 g;
|
||||
u32 x;
|
||||
|
|
@ -131,16 +131,16 @@ void TRK__read_aram(register int c, register u32 p2, void* p3) {
|
|||
}
|
||||
}
|
||||
|
||||
void TRK__write_aram(register int c, register u32 p2, void* p3) {
|
||||
void TRK__write_aram(__REGISTER int c, __REGISTER u32 p2, void* p3) {
|
||||
u8 buff[32] ATTRIBUTE_ALIGN(32);
|
||||
u32 err;
|
||||
register int count = c;
|
||||
register u32 bf;
|
||||
__REGISTER int count = c;
|
||||
__REGISTER u32 bf;
|
||||
u32 uVar1;
|
||||
u32 size;
|
||||
u16 r;
|
||||
register u32 g;
|
||||
register int counter;
|
||||
__REGISTER u32 g;
|
||||
__REGISTER int counter;
|
||||
u32 i;
|
||||
|
||||
if ((size_t)p2 < 0x4000 || p2 + *(u32*)p3 > 0x8000000) {
|
||||
|
|
|
|||
|
|
@ -71,12 +71,12 @@ DSError TRKPPCAccessFPRegister(void* srcDestPtr, u32 fpr, BOOL read);
|
|||
DSError TRKPPCAccessSpecialReg(void* value, u32* access_func, BOOL read);
|
||||
static void TRKExceptionHandler(u16);
|
||||
void TRKInterruptHandlerEnableInterrupts(void);
|
||||
void WriteFPSCR(register f64*);
|
||||
void ReadFPSCR(register f64*);
|
||||
void __TRK_set_MSR(register u32 msr);
|
||||
void WriteFPSCR(__REGISTER f64*);
|
||||
void ReadFPSCR(__REGISTER f64*);
|
||||
void __TRK_set_MSR(__REGISTER u32 msr);
|
||||
u32 __TRK_get_MSR();
|
||||
void TRK_ppc_memcpy(register void* dest, register const void* src, register int n,
|
||||
register u32 param_4, register u32 param_5);
|
||||
void TRK_ppc_memcpy(__REGISTER void* dest, __REGISTER const void* src, __REGISTER int n,
|
||||
__REGISTER u32 param_4, __REGISTER u32 param_5);
|
||||
|
||||
void TRKRestoreExtended1Block();
|
||||
void TRKUARTInterruptHandler();
|
||||
|
|
@ -827,7 +827,7 @@ asm u32 __TRK_get_MSR() {
|
|||
// clang-format on
|
||||
}
|
||||
|
||||
asm void __TRK_set_MSR(register u32) {
|
||||
asm void __TRK_set_MSR(__REGISTER u32) {
|
||||
// clang-format off
|
||||
nofralloc
|
||||
mtmsr r3
|
||||
|
|
@ -835,8 +835,8 @@ asm void __TRK_set_MSR(register u32) {
|
|||
// clang-format on
|
||||
}
|
||||
|
||||
static asm void TRK_ppc_memcpy(register void* dest, register const void* src, register int n,
|
||||
register u32 param_4, register u32 param_5) {
|
||||
static asm void TRK_ppc_memcpy(__REGISTER void* dest, __REGISTER const void* src, __REGISTER int n,
|
||||
__REGISTER u32 param_4, __REGISTER u32 param_5) {
|
||||
// clang-format off
|
||||
#define msr r8
|
||||
#define byte r9
|
||||
|
|
@ -1113,7 +1113,7 @@ asm void TRKInterruptHandlerEnableInterrupts(void) {
|
|||
// clang-format on
|
||||
}
|
||||
|
||||
asm void ReadFPSCR(register f64*) {
|
||||
asm void ReadFPSCR(__REGISTER f64*) {
|
||||
// clang-format off
|
||||
nofralloc
|
||||
stwu r1, -0x40(r1)
|
||||
|
|
@ -1128,7 +1128,7 @@ asm void ReadFPSCR(register f64*) {
|
|||
// clang-format on
|
||||
}
|
||||
|
||||
asm void WriteFPSCR(register f64*) {
|
||||
asm void WriteFPSCR(__REGISTER f64*) {
|
||||
// clang-format off
|
||||
nofralloc
|
||||
stwu r1, -0x40(r1)
|
||||
|
|
|
|||
|
|
@ -2533,9 +2533,9 @@ void daAlink_c::setRoofHangHandOnSE(cBgS_PolyInfo* unused) {
|
|||
int daAlink_c::checkRoofHangMovePos() {
|
||||
static const s16 offsetAngle[] = {
|
||||
0x0000,
|
||||
0x8000,
|
||||
-0x8000,
|
||||
0x4000,
|
||||
0xC000,
|
||||
-0x4000,
|
||||
};
|
||||
|
||||
if (field_0x2f98 >= 4) {
|
||||
|
|
|
|||
|
|
@ -808,7 +808,7 @@ static void __THPDecompressiMCURow512x448() {
|
|||
__THPInfo->dLC[2] += 0x800;
|
||||
}
|
||||
|
||||
static void __THPInverseDCTY8(register THPCoeff* in, register u32 xPos) {
|
||||
static void __THPInverseDCTY8(__REGISTER THPCoeff* in, __REGISTER u32 xPos) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 *q, *ws;
|
||||
register f32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9;
|
||||
|
|
@ -1120,7 +1120,7 @@ static void __THPInverseDCTY8(register THPCoeff* in, register u32 xPos) {
|
|||
#endif
|
||||
}
|
||||
|
||||
static void __THPInverseDCTNoYPos(register THPCoeff* in, register u32 xPos) {
|
||||
static void __THPInverseDCTNoYPos(__REGISTER THPCoeff* in, __REGISTER u32 xPos) {
|
||||
#ifdef __MWERKS__
|
||||
register f32 *q, *ws;
|
||||
register f32 tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7, tmp8, tmp9;
|
||||
|
|
@ -1558,11 +1558,11 @@ static void __THPDecompressiMCURowNxN() {
|
|||
__THPInfo->dLC[2] += ((sizeof(u8) * 64) * (x / 16));
|
||||
}
|
||||
|
||||
static void __THPHuffDecodeDCTCompY(register THPFileInfo* info, THPCoeff* block) {
|
||||
static void __THPHuffDecodeDCTCompY(__REGISTER THPFileInfo* info, THPCoeff* block) {
|
||||
{
|
||||
register s32 t;
|
||||
__REGISTER s32 t;
|
||||
THPCoeff dc;
|
||||
register THPCoeff diff;
|
||||
__REGISTER THPCoeff diff;
|
||||
|
||||
__dcbz((void*)block, 0);
|
||||
t = __THPHuffDecodeTab(info, Ydchuff);
|
||||
|
|
@ -1572,13 +1572,13 @@ static void __THPHuffDecodeDCTCompY(register THPFileInfo* info, THPCoeff* block)
|
|||
|
||||
if (t) {
|
||||
{
|
||||
register s32 v;
|
||||
register u32 cb;
|
||||
register u32 cnt;
|
||||
register u32 code;
|
||||
register u32 tmp;
|
||||
register u32 cnt1;
|
||||
register u32 tmp1;
|
||||
__REGISTER s32 v;
|
||||
__REGISTER u32 cb;
|
||||
__REGISTER u32 cnt;
|
||||
__REGISTER u32 code;
|
||||
__REGISTER u32 tmp;
|
||||
__REGISTER u32 cnt1;
|
||||
__REGISTER u32 tmp1;
|
||||
// clang-format off
|
||||
#ifdef __MWERKS__
|
||||
asm {
|
||||
|
|
@ -1637,13 +1637,13 @@ static void __THPHuffDecodeDCTCompY(register THPFileInfo* info, THPCoeff* block)
|
|||
}
|
||||
|
||||
{
|
||||
register s32 k;
|
||||
register s32 code;
|
||||
register u32 cnt;
|
||||
register u32 cb;
|
||||
register u32 increment;
|
||||
register s32 tmp;
|
||||
register THPHuffmanTab* h = Yachuff;
|
||||
__REGISTER s32 k;
|
||||
__REGISTER s32 code;
|
||||
__REGISTER u32 cnt;
|
||||
__REGISTER u32 cb;
|
||||
__REGISTER u32 increment;
|
||||
__REGISTER s32 tmp;
|
||||
__REGISTER THPHuffmanTab* h = Yachuff;
|
||||
|
||||
// clang-format off
|
||||
#ifdef __MWERKS__
|
||||
|
|
@ -1658,8 +1658,8 @@ static void __THPHuffDecodeDCTCompY(register THPFileInfo* info, THPCoeff* block)
|
|||
|
||||
for (k = 1; k < 64; k++)
|
||||
{
|
||||
register s32 ssss;
|
||||
register s32 rrrr;
|
||||
__REGISTER s32 ssss;
|
||||
__REGISTER s32 rrrr;
|
||||
|
||||
// clang-format off
|
||||
#ifdef __MWERKS__
|
||||
|
|
@ -1681,8 +1681,8 @@ static void __THPHuffDecodeDCTCompY(register THPFileInfo* info, THPCoeff* block)
|
|||
// clang-format on
|
||||
|
||||
{
|
||||
register u32 maxcodebase;
|
||||
register u32 tmp2;
|
||||
__REGISTER u32 maxcodebase;
|
||||
__REGISTER u32 tmp2;
|
||||
|
||||
_FailedCheckEnoughBits:
|
||||
cnt += 5;
|
||||
|
|
@ -1827,8 +1827,8 @@ static void __THPHuffDecodeDCTCompY(register THPFileInfo* info, THPCoeff* block)
|
|||
goto _DoneDecodeTab;
|
||||
|
||||
_Read4 : {
|
||||
register u32 maxcodebase = (u32) & (h->maxCode);
|
||||
register u32 tmp2;
|
||||
__REGISTER u32 maxcodebase = (u32) & (h->maxCode);
|
||||
__REGISTER u32 tmp2;
|
||||
|
||||
// clang-format off
|
||||
#ifdef __MWERKS__
|
||||
|
|
@ -1860,9 +1860,9 @@ static void __THPHuffDecodeDCTCompY(register THPFileInfo* info, THPCoeff* block)
|
|||
_FailedCheckNoBits0:
|
||||
_FailedCheckNoBits1:
|
||||
_REALFAILEDCHECKNOBITS : {
|
||||
register u32 mask = 0xFFFFFFFF << (33 - cnt);
|
||||
register u32 tmp2;
|
||||
register u32 tmp3;
|
||||
__REGISTER u32 mask = 0xFFFFFFFF << (33 - cnt);
|
||||
__REGISTER u32 tmp2;
|
||||
__REGISTER u32 tmp3;
|
||||
code = (s32)(cb & (~mask));
|
||||
mask = (u32) & (h->maxCode);
|
||||
|
||||
|
|
@ -1917,9 +1917,9 @@ static void __THPHuffDecodeDCTCompY(register THPFileInfo* info, THPCoeff* block)
|
|||
{
|
||||
k += ssss;
|
||||
{
|
||||
register s32 v;
|
||||
register u32 cnt1;
|
||||
register u32 tmp1;
|
||||
__REGISTER s32 v;
|
||||
__REGISTER u32 cnt1;
|
||||
__REGISTER u32 tmp1;
|
||||
// clang-format off
|
||||
#ifdef __MWERKS__
|
||||
asm
|
||||
|
|
@ -1992,12 +1992,12 @@ static void __THPHuffDecodeDCTCompY(register THPFileInfo* info, THPCoeff* block)
|
|||
}
|
||||
}
|
||||
|
||||
static s32 __THPHuffDecodeTab(register THPFileInfo* info, register THPHuffmanTab* h) {
|
||||
register s32 code;
|
||||
register u32 cnt;
|
||||
register s32 cb;
|
||||
register u32 increment;
|
||||
register s32 tmp;
|
||||
static s32 __THPHuffDecodeTab(__REGISTER THPFileInfo* info, __REGISTER THPHuffmanTab* h) {
|
||||
__REGISTER s32 code;
|
||||
__REGISTER u32 cnt;
|
||||
__REGISTER s32 cb;
|
||||
__REGISTER u32 increment;
|
||||
__REGISTER s32 tmp;
|
||||
|
||||
// clang-format off
|
||||
#ifdef __MWERKS__
|
||||
|
|
@ -2024,8 +2024,8 @@ _done:
|
|||
return code;
|
||||
|
||||
{
|
||||
register u32 maxcodebase;
|
||||
register u32 tmp2;
|
||||
__REGISTER u32 maxcodebase;
|
||||
__REGISTER u32 tmp2;
|
||||
|
||||
_FailedCheckEnoughBits:
|
||||
maxcodebase = (u32) & (h->maxCode);
|
||||
|
|
@ -2134,8 +2134,8 @@ _FCEB_Done:
|
|||
return tmp;
|
||||
|
||||
_Read4 : {
|
||||
register u32 maxcodebase = (u32) & (h->maxCode);
|
||||
register u32 tmp2;
|
||||
__REGISTER u32 maxcodebase = (u32) & (h->maxCode);
|
||||
__REGISTER u32 tmp2;
|
||||
|
||||
// clang-format off
|
||||
#ifdef __MWERKS__
|
||||
|
|
@ -2215,8 +2215,8 @@ _FailedCheckNoBits0:
|
|||
_FailedCheckNoBits1:
|
||||
|
||||
{
|
||||
register u32 mask = 0xFFFFFFFF << (33 - cnt);
|
||||
register u32 tmp2;
|
||||
__REGISTER u32 mask = 0xFFFFFFFF << (33 - cnt);
|
||||
__REGISTER u32 tmp2;
|
||||
|
||||
code = (s32)(cb & (~mask));
|
||||
mask = (u32) & (h->maxCode);
|
||||
|
|
@ -2262,20 +2262,20 @@ _FailedCheckNoBits1:
|
|||
return (h->Vij[(s32)(code + h->valPtr[cnt])]);
|
||||
}
|
||||
|
||||
static void __THPHuffDecodeDCTCompU(register THPFileInfo* info, THPCoeff* block) {
|
||||
register s32 t;
|
||||
register THPCoeff diff;
|
||||
static void __THPHuffDecodeDCTCompU(__REGISTER THPFileInfo* info, THPCoeff* block) {
|
||||
__REGISTER s32 t;
|
||||
__REGISTER THPCoeff diff;
|
||||
THPCoeff dc;
|
||||
register s32 v;
|
||||
register u32 cb;
|
||||
register u32 cnt;
|
||||
register u32 cnt33;
|
||||
register u32 tmp;
|
||||
register u32 cnt1;
|
||||
register u32 tmp1;
|
||||
register s32 k;
|
||||
register s32 ssss;
|
||||
register s32 rrrr;
|
||||
__REGISTER s32 v;
|
||||
__REGISTER u32 cb;
|
||||
__REGISTER u32 cnt;
|
||||
__REGISTER u32 cnt33;
|
||||
__REGISTER u32 tmp;
|
||||
__REGISTER u32 cnt1;
|
||||
__REGISTER u32 tmp1;
|
||||
__REGISTER s32 k;
|
||||
__REGISTER s32 ssss;
|
||||
__REGISTER s32 rrrr;
|
||||
|
||||
__dcbz((void*)block, 0);
|
||||
t = __THPHuffDecodeTab(info, Udchuff);
|
||||
|
|
@ -2406,20 +2406,20 @@ static void __THPHuffDecodeDCTCompU(register THPFileInfo* info, THPCoeff* block)
|
|||
}
|
||||
}
|
||||
|
||||
static void __THPHuffDecodeDCTCompV(register THPFileInfo* info, THPCoeff* block) {
|
||||
register s32 t;
|
||||
register THPCoeff diff;
|
||||
static void __THPHuffDecodeDCTCompV(__REGISTER THPFileInfo* info, THPCoeff* block) {
|
||||
__REGISTER s32 t;
|
||||
__REGISTER THPCoeff diff;
|
||||
THPCoeff dc;
|
||||
register s32 v;
|
||||
register u32 cb;
|
||||
register u32 cnt;
|
||||
register u32 cnt33;
|
||||
register u32 tmp;
|
||||
register u32 cnt1;
|
||||
register u32 tmp1;
|
||||
register s32 k;
|
||||
register s32 ssss;
|
||||
register s32 rrrr;
|
||||
__REGISTER s32 v;
|
||||
__REGISTER u32 cb;
|
||||
__REGISTER u32 cnt;
|
||||
__REGISTER u32 cnt33;
|
||||
__REGISTER u32 tmp;
|
||||
__REGISTER u32 cnt1;
|
||||
__REGISTER u32 tmp1;
|
||||
__REGISTER s32 k;
|
||||
__REGISTER s32 ssss;
|
||||
__REGISTER s32 rrrr;
|
||||
|
||||
__dcbz((void*)block, 0);
|
||||
t = __THPHuffDecodeTab(info, Vdchuff);
|
||||
|
|
|
|||
|
|
@ -16,7 +16,7 @@ cXyz* daShopItem_c::getPosP() {
|
|||
}
|
||||
|
||||
ResourceData const daShopItem_c::mData[23] = {
|
||||
{"B_mD_sold", 3, -1, -1, -1, -1, -1, -1, 0.0f, 1.0f, 0, {0, 0x8000, 0}, 0, 0, 0, 0, -1, -1},
|
||||
{"B_mD_sold", 3, -1, -1, -1, -1, -1, -1, 0.0f, 1.0f, 0, {0, -0x8000, 0}, 0, 0, 0, 0, -1, -1},
|
||||
{"B_mD_oil", 3, -1, -1, -1, -1, -1, -1, 0.0f, 1.0f, 0, {0, 0, 0}, 0, 0, 0, 0, -1, -1},
|
||||
{"O_mD_red", 3, -1, -1, -1, -1, -1, -11, 0.0f, 1.0f, 0, {0, 0, 0}, 0, 0, 0, 0, -1, -1},
|
||||
{"B_mD_milk", 3, -1, -1, -1, -1, -1, -1, 0.0f, 1.0f, 0, {0, 0, 0}, 0, 0, 0, 0, -1, -1},
|
||||
|
|
|
|||
|
|
@ -4223,7 +4223,7 @@ bool dCamera_c::lockonCamera(s32 param_0) {
|
|||
|
||||
// this should probably be an ifdef, but we force it to be compiled
|
||||
// to make the function large enough to stop doing inlining
|
||||
if (!NDEBUG) {
|
||||
if (!NDEBUG_DEFINED) {
|
||||
if (mCamSetup.CheckFlag(0x8000)) {
|
||||
//char name[28];
|
||||
fopAcM_getNameString(mpPlayerActor, NULL);
|
||||
|
|
|
|||
|
|
@ -272,8 +272,8 @@ const char* daSetBgObj_c::getArcName(fopAc_ac_c* i_this) {
|
|||
s16 const daObjMovebox::Act_c::M_dir_base[4] = {
|
||||
0x0000,
|
||||
0x4000,
|
||||
0x8000,
|
||||
0xC000,
|
||||
-0x8000,
|
||||
-0x4000,
|
||||
};
|
||||
|
||||
f32 const daDsh_c::OPEN_SIZE = 270.1f;
|
||||
|
|
|
|||
|
|
@ -995,7 +995,7 @@ bool dCamera_c::transEvCamera(int param_1) {
|
|||
trans->mEye = (*ptr1).mEye;
|
||||
trans->mFovy = (*ptr1).mFovy;
|
||||
trans->field_0x3c = (*ptr1).mBank;
|
||||
if ((*ptr1).mBank != 0.0f) {
|
||||
if (float(s16(ptr1->mBank)) != 0.0f) {
|
||||
trans->field_0x68 = true;
|
||||
}
|
||||
}
|
||||
|
|
@ -1011,7 +1011,7 @@ bool dCamera_c::transEvCamera(int param_1) {
|
|||
trans->mStartEye = (*ptr2).mEye;
|
||||
trans->mStartFovy = (*ptr2).mFovy;
|
||||
trans->field_0x1c = (*ptr2).mBank;
|
||||
if ((*ptr2).mBank != 0.0f) {
|
||||
if (float(s16(ptr2->mBank)) != 0.0f) {
|
||||
trans->field_0x68 = true;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -485,7 +485,7 @@ void dFile_select_c::dataSelectInAnmSet() {
|
|||
}
|
||||
}
|
||||
|
||||
(char*)pSave += 0xa94;
|
||||
pSave = (dSv_save_c*)((u8*)pSave + 0xa94);
|
||||
|
||||
if (field_0x025b[i] != 0 || mDataNew[i] != 0) {
|
||||
field_0x0220[i]->setAlpha(0);
|
||||
|
|
@ -2720,7 +2720,7 @@ void dFile_select_c::setSaveData() {
|
|||
mDataNew[i] = res;
|
||||
field_0x025b[i] = 0;
|
||||
}
|
||||
(char*)pSave += 0xa94;
|
||||
pSave = (dSv_save_c*)((u8*)pSave + 0xa94);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -4096,5 +4096,7 @@ void dFile_select3D_c::toItem3Dpos(f32 param_0, f32 param_1, f32 param_2, cXyz*
|
|||
#pragma pop
|
||||
|
||||
void dFile_select3D_c::calcViewMtx(Mtx param_0) {
|
||||
cMtx_lookAt(param_0, &cXyz(0.0f, 0.0f, -1000.0f), &cXyz::Zero, &cXyz(0.0f, 1.0f, 0.0f), 0);
|
||||
cXyz pos1(0.0f, 0.0f, -1000.0f);
|
||||
cXyz pos2(0.0f, 1.0f, 0.0f);
|
||||
cMtx_lookAt(param_0, &pos1, &cXyz::Zero, &pos2, 0);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
#include "m_Do/m_Do_graphic.h"
|
||||
#include "m_Do/m_Do_lib.h"
|
||||
|
||||
#ifdef DEBUG
|
||||
#if DEBUG
|
||||
extern "C" int atoi(const char* str);
|
||||
extern "C" f32 atof(const char* str);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -2579,7 +2579,9 @@ void dMenu_Collect3D_c::toItem3Dpos(f32 param_0, f32 param_1, f32 param_2, cXyz*
|
|||
#pragma pop
|
||||
|
||||
void dMenu_Collect3D_c::calcViewMtx(Mtx param_0) {
|
||||
mDoMtx_lookAt(param_0, &cXyz(0.0f, 0.0f, -1000.0f), &cXyz::Zero, &cXyz(0.0f, 1.0f, 0.0f), 0);
|
||||
cXyz pos1(0.0f, 0.0f, -1000.0f);
|
||||
cXyz pos2(0.0f, 1.0f, 0.0f);
|
||||
mDoMtx_lookAt(param_0, &pos1, &cXyz::Zero, &pos2, 0);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -3088,9 +3088,9 @@ static leafdraw_method_class l_dMeter2_Method = {
|
|||
};
|
||||
|
||||
extern msg_process_profile_definition g_profile_METER2 = {
|
||||
-3,
|
||||
fpcLy_CURRENT_e,
|
||||
12,
|
||||
-3,
|
||||
fpcPi_CURRENT_e,
|
||||
PROC_METER2,
|
||||
(process_method_class*)&g_fpcLf_Method,
|
||||
sizeof(dMeter2_c),
|
||||
|
|
|
|||
1538
src/d/d_stage.cpp
1538
src/d/d_stage.cpp
File diff suppressed because it is too large
Load Diff
|
|
@ -317,7 +317,7 @@ static void __AIDHandler(__OSInterrupt interrupt, OSContext* context) {
|
|||
OSSetCurrentContext(context);
|
||||
}
|
||||
|
||||
static asm void __AICallbackStackSwitch(register void* cb) {
|
||||
static asm void __AICallbackStackSwitch(__REGISTER void* cb) {
|
||||
nofralloc
|
||||
mflr r0
|
||||
stw r0, 0x4(r1)
|
||||
|
|
|
|||
|
|
@ -116,7 +116,7 @@ const static double i2fMagic = 4503601774854144.0;
|
|||
static void do_src1(AXFX_CHORUS_SRCINFO* src);
|
||||
static void do_src2(AXFX_CHORUS_SRCINFO* src);
|
||||
|
||||
asm static void do_src1(register AXFX_CHORUS_SRCINFO* src) {
|
||||
asm static void do_src1(__REGISTER AXFX_CHORUS_SRCINFO* src) {
|
||||
nofralloc
|
||||
stwu r1, -64(r1)
|
||||
stmw r26, 40(r1)
|
||||
|
|
@ -227,7 +227,7 @@ L_00000160:
|
|||
blr
|
||||
}
|
||||
|
||||
asm static void do_src2(register AXFX_CHORUS_SRCINFO* src) {
|
||||
asm static void do_src2(__REGISTER AXFX_CHORUS_SRCINFO* src) {
|
||||
nofralloc
|
||||
stwu r1, -64(r1)
|
||||
stmw r26, 40(r1)
|
||||
|
|
|
|||
|
|
@ -186,7 +186,7 @@ const static f32 value1_0 = 1.0f;
|
|||
const static f32 value0_3 = 0.3f;
|
||||
const static f32 value0_6 = 0.6f;
|
||||
|
||||
asm static void DoCrossTalk(register s32* l, register s32* r, register f32 cross, register f32 invcross) {
|
||||
asm static void DoCrossTalk(__REGISTER s32* l, __REGISTER s32* r, __REGISTER f32 cross, __REGISTER f32 invcross) {
|
||||
nofralloc
|
||||
stwu r1, -48(r1)
|
||||
stfd f14, 40(r1)
|
||||
|
|
@ -291,7 +291,7 @@ loop:
|
|||
blr
|
||||
}
|
||||
|
||||
asm static void HandleReverb(register s32* sptr, register AXFX_REVHI_WORK* rv, register s32 k) {
|
||||
asm static void HandleReverb(__REGISTER s32* sptr, __REGISTER AXFX_REVHI_WORK* rv, __REGISTER s32 k) {
|
||||
nofralloc
|
||||
stwu r1, -0xc0(r1)
|
||||
stmw r14, 0x8(r1)
|
||||
|
|
|
|||
|
|
@ -176,7 +176,7 @@ const static f32 value0_6 = 0.6f;
|
|||
const static f32 value0_3 = 0.3f;
|
||||
const static double i2fMagic = 4503601774854144.0;
|
||||
|
||||
asm static void HandleReverbDpl2(register s32* sptr, register AXFX_REVHI_WORK_DPL2* rv, register s32 k) {
|
||||
asm static void HandleReverbDpl2(__REGISTER s32* sptr, __REGISTER AXFX_REVHI_WORK_DPL2* rv, __REGISTER s32 k) {
|
||||
nofralloc
|
||||
stwu r1, -0xc0(r1)
|
||||
stmw r14, 0x8(r1)
|
||||
|
|
|
|||
|
|
@ -170,7 +170,7 @@ const static f32 value0_3 = 0.3f;
|
|||
const static f32 value0_6 = 0.6f;
|
||||
const static double i2fMagic = 4503601774854144.0;
|
||||
|
||||
asm static void HandleReverb(register s32* sptr, register AXFX_REVSTD_WORK* rv) {
|
||||
asm static void HandleReverb(__REGISTER s32* sptr, __REGISTER AXFX_REVSTD_WORK* rv) {
|
||||
nofralloc
|
||||
stwu r1, -144(r1)
|
||||
stmw r17, 8(r1)
|
||||
|
|
|
|||
|
|
@ -7,27 +7,27 @@ asm u32 PPCMfmsr() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtmsr(register u32 newMSR) {
|
||||
asm void PPCMtmsr(__REGISTER u32 newMSR) {
|
||||
nofralloc
|
||||
mtmsr newMSR
|
||||
blr
|
||||
}
|
||||
|
||||
asm u32 PPCOrMsr(register u32 value) {
|
||||
asm u32 PPCOrMsr(__REGISTER u32 value) {
|
||||
nofralloc
|
||||
mfmsr r4
|
||||
or value, r4, value
|
||||
blr
|
||||
}
|
||||
|
||||
asm u32 PPCAndMsr(register u32 value) {
|
||||
asm u32 PPCAndMsr(__REGISTER u32 value) {
|
||||
nofralloc
|
||||
mfmsr r4
|
||||
and value, r4, value
|
||||
blr
|
||||
}
|
||||
|
||||
asm u32 PPCAndCMsr(register u32 value) {
|
||||
asm u32 PPCAndCMsr(__REGISTER u32 value) {
|
||||
nofralloc
|
||||
mfmsr r4
|
||||
andc value, r4, value
|
||||
|
|
@ -40,7 +40,7 @@ asm u32 PPCMfhid0() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMthid0(register u32 newHID0) {
|
||||
asm void PPCMthid0(__REGISTER u32 newHID0) {
|
||||
nofralloc
|
||||
mtspr HID0, newHID0
|
||||
blr
|
||||
|
|
@ -58,13 +58,13 @@ asm u32 PPCMfl2cr() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtl2cr(register u32 newL2cr) {
|
||||
asm void PPCMtl2cr(__REGISTER u32 newL2cr) {
|
||||
nofralloc
|
||||
mtspr L2CR, newL2cr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtdec(register u32 newDec) {
|
||||
asm void PPCMtdec(__REGISTER u32 newDec) {
|
||||
nofralloc
|
||||
mtdec newDec
|
||||
blr
|
||||
|
|
@ -115,7 +115,7 @@ asm u32 PPCMfmmcr0() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtmmcr0(register u32 newMmcr0) {
|
||||
asm void PPCMtmmcr0(__REGISTER u32 newMmcr0) {
|
||||
nofralloc
|
||||
mtspr MMCR0, newMmcr0
|
||||
blr
|
||||
|
|
@ -127,7 +127,7 @@ asm u32 PPCMfmmcr1() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtmmcr1(register u32 newMmcr1) {
|
||||
asm void PPCMtmmcr1(__REGISTER u32 newMmcr1) {
|
||||
nofralloc
|
||||
mtspr MMCR1, newMmcr1
|
||||
blr
|
||||
|
|
@ -139,7 +139,7 @@ asm u32 PPCMfpmc1() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtpmc1(register u32 newPmc1) {
|
||||
asm void PPCMtpmc1(__REGISTER u32 newPmc1) {
|
||||
nofralloc
|
||||
mtspr PMC1, newPmc1
|
||||
blr
|
||||
|
|
@ -151,7 +151,7 @@ asm u32 PPCMfpmc2() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtpmc2(register u32 newPmc2) {
|
||||
asm void PPCMtpmc2(__REGISTER u32 newPmc2) {
|
||||
nofralloc
|
||||
mtspr PMC2, newPmc2
|
||||
blr
|
||||
|
|
@ -163,7 +163,7 @@ asm u32 PPCMfpmc3() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtpmc3(register u32 newPmc3) {
|
||||
asm void PPCMtpmc3(__REGISTER u32 newPmc3) {
|
||||
nofralloc
|
||||
mtspr PMC3, newPmc3
|
||||
blr
|
||||
|
|
@ -175,7 +175,7 @@ asm u32 PPCMfpmc4() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtpmc4(register u32 newPmc4) {
|
||||
asm void PPCMtpmc4(__REGISTER u32 newPmc4) {
|
||||
nofralloc
|
||||
mtspr PMC4, newPmc4
|
||||
blr
|
||||
|
|
@ -187,7 +187,7 @@ asm u32 PPCMfsia() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtsia(register u32 newSia) {
|
||||
asm void PPCMtsia(__REGISTER u32 newSia) {
|
||||
nofralloc
|
||||
mtspr SIA, newSia
|
||||
blr
|
||||
|
|
@ -204,7 +204,7 @@ u32 PPCMffpscr() {
|
|||
return m.u.fpscr;
|
||||
}
|
||||
|
||||
void PPCMtfpscr(register u32 newFPSCR) {
|
||||
void PPCMtfpscr(__REGISTER u32 newFPSCR) {
|
||||
union FpscrUnion m;
|
||||
|
||||
asm {
|
||||
|
|
@ -222,7 +222,7 @@ asm u32 PPCMfhid2() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMthid2(register u32 newhid2) {
|
||||
asm void PPCMthid2(__REGISTER u32 newhid2) {
|
||||
nofralloc
|
||||
mtspr HID2, newhid2
|
||||
blr
|
||||
|
|
@ -235,7 +235,7 @@ asm u32 PPCMfwpar() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtwpar(register u32 newwpar) {
|
||||
asm void PPCMtwpar(__REGISTER u32 newwpar) {
|
||||
nofralloc
|
||||
mtspr WPAR, newwpar
|
||||
blr
|
||||
|
|
@ -253,13 +253,13 @@ asm u32 PPCMfdmaL() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtdmaU(register u32 newdmau) {
|
||||
asm void PPCMtdmaU(__REGISTER u32 newdmau) {
|
||||
nofralloc
|
||||
mtspr DMA_U, newdmau
|
||||
blr
|
||||
}
|
||||
|
||||
asm void PPCMtdmaL(register u32 newdmal) {
|
||||
asm void PPCMtdmaL(__REGISTER u32 newdmal) {
|
||||
nofralloc
|
||||
mtspr DMA_L, newdmal
|
||||
blr
|
||||
|
|
|
|||
|
|
@ -319,10 +319,10 @@ static inline u32 ConvLightID2Num(GXLightID id) {
|
|||
}
|
||||
}
|
||||
|
||||
static inline void PushLight(const register GXLightObj* lt_obj, register void* dest) {
|
||||
register u32 zero, color;
|
||||
register f32 a0_a1, a2_k0, k1_k2;
|
||||
register f32 px_py, pz_dx, dy_dz;
|
||||
static inline void PushLight(const __REGISTER GXLightObj* lt_obj, __REGISTER void* dest) {
|
||||
__REGISTER u32 zero, color;
|
||||
__REGISTER f32 a0_a1, a2_k0, k1_k2;
|
||||
__REGISTER f32 px_py, pz_dx, dy_dz;
|
||||
#ifdef __MWERKS__ // clang-format off
|
||||
asm {
|
||||
lwz color, 12(lt_obj)
|
||||
|
|
|
|||
|
|
@ -32,9 +32,10 @@ void GXProject(f32 x, f32 y, f32 z, const Mtx mtx, const f32* pm, const f32* vp,
|
|||
*sz = vp[5] + (wc * (zc * (vp[5] - vp[4])));
|
||||
}
|
||||
|
||||
static void WriteProjPS(const register f32 proj[6], register volatile void* dest) {
|
||||
register f32 p01, p23, p45;
|
||||
static void WriteProjPS(const __REGISTER f32 proj[6], __REGISTER volatile void* dest) {
|
||||
__REGISTER f32 p01, p23, p45;
|
||||
|
||||
#ifdef __MWERKS__
|
||||
asm {
|
||||
psq_l p01, 0(proj), 0, 0
|
||||
psq_l p23, 8(proj), 0, 0
|
||||
|
|
@ -43,10 +44,11 @@ static void WriteProjPS(const register f32 proj[6], register volatile void* dest
|
|||
psq_st p23, 0(dest), 0, 0
|
||||
psq_st p45, 0(dest), 0, 0
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static void Copy6Floats(const register f32 src[6], register volatile f32* dest) {
|
||||
register f32 ps01, ps23, ps45;
|
||||
static void Copy6Floats(const __REGISTER f32 src[6], __REGISTER volatile f32* dest) {
|
||||
__REGISTER f32 ps01, ps23, ps45;
|
||||
|
||||
asm {
|
||||
psq_l ps01, 0(src), 0, 0
|
||||
|
|
@ -135,13 +137,13 @@ void GXGetProjectionv(f32* ptr) {
|
|||
#endif
|
||||
}
|
||||
|
||||
static void WriteMTXPS4x3(const register f32 mtx[3][4], register volatile f32* dest) {
|
||||
register f32 a00_a01;
|
||||
register f32 a02_a03;
|
||||
register f32 a10_a11;
|
||||
register f32 a12_a13;
|
||||
register f32 a20_a21;
|
||||
register f32 a22_a23;
|
||||
static void WriteMTXPS4x3(const __REGISTER f32 mtx[3][4], __REGISTER volatile f32* dest) {
|
||||
__REGISTER f32 a00_a01;
|
||||
__REGISTER f32 a02_a03;
|
||||
__REGISTER f32 a10_a11;
|
||||
__REGISTER f32 a12_a13;
|
||||
__REGISTER f32 a20_a21;
|
||||
__REGISTER f32 a22_a23;
|
||||
|
||||
asm {
|
||||
psq_l a00_a01, 0x00(mtx), 0, qr0
|
||||
|
|
@ -159,13 +161,13 @@ static void WriteMTXPS4x3(const register f32 mtx[3][4], register volatile f32* d
|
|||
}
|
||||
}
|
||||
|
||||
static void WriteMTXPS3x3from3x4(register f32 mtx[3][4], register volatile f32* dest) {
|
||||
register f32 a00_a01;
|
||||
register f32 a02_a03;
|
||||
register f32 a10_a11;
|
||||
register f32 a12_a13;
|
||||
register f32 a20_a21;
|
||||
register f32 a22_a23;
|
||||
static void WriteMTXPS3x3from3x4(__REGISTER f32 mtx[3][4], __REGISTER volatile f32* dest) {
|
||||
__REGISTER f32 a00_a01;
|
||||
__REGISTER f32 a02_a03;
|
||||
__REGISTER f32 a10_a11;
|
||||
__REGISTER f32 a12_a13;
|
||||
__REGISTER f32 a20_a21;
|
||||
__REGISTER f32 a22_a23;
|
||||
|
||||
asm {
|
||||
psq_l a00_a01, 0x00(mtx), 0, qr0
|
||||
|
|
@ -183,12 +185,12 @@ static void WriteMTXPS3x3from3x4(register f32 mtx[3][4], register volatile f32*
|
|||
}
|
||||
}
|
||||
|
||||
static void WriteMTXPS3x3(register f32 mtx[3][3], register volatile f32* dest) {
|
||||
register f32 a00_a01;
|
||||
register f32 a02_a10;
|
||||
register f32 a11_a12;
|
||||
register f32 a20_a21;
|
||||
register f32 a22_nnn;
|
||||
static void WriteMTXPS3x3(__REGISTER f32 mtx[3][3], __REGISTER volatile f32* dest) {
|
||||
__REGISTER f32 a00_a01;
|
||||
__REGISTER f32 a02_a10;
|
||||
__REGISTER f32 a11_a12;
|
||||
__REGISTER f32 a20_a21;
|
||||
__REGISTER f32 a22_nnn;
|
||||
|
||||
asm {
|
||||
psq_l a00_a01, 0x00(mtx), 0, qr0
|
||||
|
|
@ -204,11 +206,11 @@ static void WriteMTXPS3x3(register f32 mtx[3][3], register volatile f32* dest) {
|
|||
}
|
||||
}
|
||||
|
||||
static void WriteMTXPS4x2(const register f32 mtx[2][4], register volatile f32* dest) {
|
||||
register f32 a00_a01;
|
||||
register f32 a02_a03;
|
||||
register f32 a10_a11;
|
||||
register f32 a12_a13;
|
||||
static void WriteMTXPS4x2(const __REGISTER f32 mtx[2][4], __REGISTER volatile f32* dest) {
|
||||
__REGISTER f32 a00_a01;
|
||||
__REGISTER f32 a02_a03;
|
||||
__REGISTER f32 a10_a11;
|
||||
__REGISTER f32 a12_a13;
|
||||
|
||||
asm {
|
||||
psq_l a00_a01, 0x00(mtx), 0, qr0
|
||||
|
|
|
|||
|
|
@ -1205,7 +1205,7 @@ exit:;
|
|||
}
|
||||
|
||||
static int fioPacketResultWrite(void* buffer, u32 dataSize) {
|
||||
register int nResult = 0;
|
||||
__REGISTER int nResult = 0;
|
||||
MCC_CHANNEL nChID;
|
||||
u8 nChannelBlocks = 0;
|
||||
u32 dataBlockSize;
|
||||
|
|
|
|||
|
|
@ -23,11 +23,11 @@ void C_MTXIdentity(Mtx m) {
|
|||
m[2][3] = 0;
|
||||
}
|
||||
|
||||
void PSMTXIdentity(register Mtx m) {
|
||||
register f32 c_zero = 0.0f;
|
||||
register f32 c_one = 1.0f;
|
||||
register f32 c_01;
|
||||
register f32 c_10;
|
||||
void PSMTXIdentity(__REGISTER Mtx m) {
|
||||
__REGISTER f32 c_zero = 0.0f;
|
||||
__REGISTER f32 c_one = 1.0f;
|
||||
__REGISTER f32 c_01;
|
||||
__REGISTER f32 c_10;
|
||||
|
||||
asm {
|
||||
psq_st c_zero, 8(m), 0, 0
|
||||
|
|
@ -60,7 +60,7 @@ void C_MTXCopy(const Mtx src, Mtx dst) {
|
|||
}
|
||||
}
|
||||
|
||||
asm void PSMTXCopy(const register Mtx src, register Mtx dst) {
|
||||
asm void PSMTXCopy(const __REGISTER Mtx src, __REGISTER Mtx dst) {
|
||||
psq_l f0, 0(src), 0, 0
|
||||
psq_st f0, 0(dst), 0, 0
|
||||
psq_l f1, 8(src), 0, 0
|
||||
|
|
@ -109,7 +109,7 @@ void C_MTXConcat(const Mtx a, const Mtx b, Mtx ab) {
|
|||
}
|
||||
}
|
||||
|
||||
asm void PSMTXConcat(const register Mtx a, const register Mtx b, register Mtx ab) {
|
||||
asm void PSMTXConcat(const __REGISTER Mtx a, const __REGISTER Mtx b, __REGISTER Mtx ab) {
|
||||
nofralloc
|
||||
stwu r1, -64(r1)
|
||||
psq_l f0, 0(a), 0, 0
|
||||
|
|
@ -184,12 +184,12 @@ void C_MTXConcatArray(const Mtx a, const Mtx* srcBase, Mtx* dstBase, u32 count)
|
|||
#pragma optimization_level 1
|
||||
// This function will not compile at optimization level 0
|
||||
#endif
|
||||
void PSMTXConcatArray(const register Mtx a, const register Mtx* srcBase, register Mtx* dstBase, register u32 count) {
|
||||
register f32 va0, va1, va2, va3, va4, va5;
|
||||
register f32 vb0, vb1, vb2, vb3, vb4, vb5;
|
||||
register f32 vd0, vd1, vd2, vd3, vd4, vd5;
|
||||
register f32 u01;
|
||||
register f32* u01Ptr = Unit01;
|
||||
void PSMTXConcatArray(const __REGISTER Mtx a, const __REGISTER Mtx* srcBase, __REGISTER Mtx* dstBase, __REGISTER u32 count) {
|
||||
__REGISTER f32 va0, va1, va2, va3, va4, va5;
|
||||
__REGISTER f32 vb0, vb1, vb2, vb3, vb4, vb5;
|
||||
__REGISTER f32 vd0, vd1, vd2, vd3, vd4, vd5;
|
||||
__REGISTER f32 u01;
|
||||
__REGISTER f32* u01Ptr = Unit01;
|
||||
|
||||
asm {
|
||||
psq_l va0, 0(a), 0, 0;
|
||||
|
|
@ -307,15 +307,15 @@ void C_MTXTranspose(const Mtx src, Mtx xPose) {
|
|||
}
|
||||
}
|
||||
|
||||
void PSMTXTranspose(const register Mtx src, register Mtx xPose) {
|
||||
register f32 c_zero = 0;
|
||||
register f32 row0a;
|
||||
register f32 row1a;
|
||||
register f32 row0b;
|
||||
register f32 row1b;
|
||||
register f32 trns0;
|
||||
register f32 trns1;
|
||||
register f32 trns2;
|
||||
void PSMTXTranspose(const __REGISTER Mtx src, __REGISTER Mtx xPose) {
|
||||
__REGISTER f32 c_zero = 0;
|
||||
__REGISTER f32 row0a;
|
||||
__REGISTER f32 row1a;
|
||||
__REGISTER f32 row0b;
|
||||
__REGISTER f32 row1b;
|
||||
__REGISTER f32 trns0;
|
||||
__REGISTER f32 trns1;
|
||||
__REGISTER f32 trns2;
|
||||
|
||||
asm {
|
||||
psq_l row0a, 0(src), 0, 0
|
||||
|
|
@ -388,7 +388,7 @@ u32 C_MTXInverse(const Mtx src, Mtx inv) {
|
|||
return 1;
|
||||
}
|
||||
|
||||
asm u32 PSMTXInverse(const register Mtx src, register Mtx inv) {
|
||||
asm u32 PSMTXInverse(const __REGISTER Mtx src, __REGISTER Mtx inv) {
|
||||
psq_l f0, 0(src), 1, 0
|
||||
psq_l f1, 4(src), 0, 0
|
||||
psq_l f2, 16(src), 1, 0
|
||||
|
|
@ -498,7 +498,7 @@ u32 C_MTXInvXpose(const Mtx src, Mtx invX) {
|
|||
return 1;
|
||||
}
|
||||
|
||||
asm u32 PSMTXInvXpose(const register Mtx src, register Mtx invX) {
|
||||
asm u32 PSMTXInvXpose(const __REGISTER Mtx src, __REGISTER Mtx invX) {
|
||||
psq_l f0, 0(src), 1, 0
|
||||
psq_l f1, 4(src), 0, 0
|
||||
psq_l f2, 16(src), 1, 0
|
||||
|
|
@ -622,9 +622,9 @@ void C_MTXRotTrig(Mtx m, char axis, f32 sinA, f32 cosA) {
|
|||
}
|
||||
}
|
||||
|
||||
void PSMTXRotTrig(register Mtx m, register char axis, register f32 sinA, register f32 cosA) {
|
||||
register f32 fc0, fc1, nsinA;
|
||||
register f32 fw0, fw1, fw2, fw3;
|
||||
void PSMTXRotTrig(__REGISTER Mtx m, __REGISTER char axis, __REGISTER f32 sinA, __REGISTER f32 cosA) {
|
||||
__REGISTER f32 fc0, fc1, nsinA;
|
||||
__REGISTER f32 fw0, fw1, fw2, fw3;
|
||||
|
||||
asm {
|
||||
frsp sinA, sinA
|
||||
|
|
@ -685,10 +685,10 @@ void PSMTXRotTrig(register Mtx m, register char axis, register f32 sinA, registe
|
|||
}
|
||||
}
|
||||
|
||||
static void __PSMTXRotAxisRadInternal(register Mtx m, const register Vec* axis, register f32 sT, register f32 cT) {
|
||||
register f32 tT, fc0;
|
||||
register f32 tmp0, tmp1, tmp2, tmp3, tmp4;
|
||||
register f32 tmp5, tmp6, tmp7, tmp8, tmp9;
|
||||
static void __PSMTXRotAxisRadInternal(__REGISTER Mtx m, const __REGISTER Vec* axis, __REGISTER f32 sT, __REGISTER f32 cT) {
|
||||
__REGISTER f32 tT, fc0;
|
||||
__REGISTER f32 tmp0, tmp1, tmp2, tmp3, tmp4;
|
||||
__REGISTER f32 tmp5, tmp6, tmp7, tmp8, tmp9;
|
||||
tmp9 = 0.5f;
|
||||
tmp8 = 3.0f;
|
||||
|
||||
|
|
@ -801,9 +801,9 @@ void C_MTXTrans(Mtx m, f32 xT, f32 yT, f32 zT) {
|
|||
m[2][3] = zT;
|
||||
}
|
||||
|
||||
void PSMTXTrans(register Mtx m, register f32 xT, register f32 yT, register f32 zT) {
|
||||
register f32 c0 = 0.0f;
|
||||
register f32 c1 = 1.0f;
|
||||
void PSMTXTrans(__REGISTER Mtx m, __REGISTER f32 xT, __REGISTER f32 yT, __REGISTER f32 zT) {
|
||||
__REGISTER f32 c0 = 0.0f;
|
||||
__REGISTER f32 c1 = 1.0f;
|
||||
|
||||
asm {
|
||||
stfs xT, 12(m)
|
||||
|
|
@ -840,7 +840,7 @@ void C_MTXTransApply(const Mtx src, Mtx dst, f32 xT, f32 yT, f32 zT) {
|
|||
dst[2][3] = (src[2][3] + zT);
|
||||
}
|
||||
|
||||
asm void PSMTXTransApply(const register Mtx src, register Mtx dst, register f32 xT, register f32 yT, register f32 zT) {
|
||||
asm void PSMTXTransApply(const __REGISTER Mtx src, __REGISTER Mtx dst, __REGISTER f32 xT, __REGISTER f32 yT, __REGISTER f32 zT) {
|
||||
nofralloc
|
||||
psq_l fp4, 0(src), 0, 0
|
||||
frsp xT, xT
|
||||
|
|
@ -879,8 +879,8 @@ void C_MTXScale(Mtx m, f32 xS, f32 yS, f32 zS) {
|
|||
m[2][3] = 0;
|
||||
}
|
||||
|
||||
void PSMTXScale(register Mtx m, register f32 xS, register f32 yS, register f32 zS) {
|
||||
register f32 c0 = 0.0f;
|
||||
void PSMTXScale(__REGISTER Mtx m, __REGISTER f32 xS, __REGISTER f32 yS, __REGISTER f32 zS) {
|
||||
__REGISTER f32 c0 = 0.0f;
|
||||
|
||||
asm {
|
||||
stfs xS, 0(m)
|
||||
|
|
@ -911,7 +911,7 @@ void C_MTXScaleApply(const Mtx src, Mtx dst, f32 xS, f32 yS, f32 zS) {
|
|||
dst[2][3] = (src[2][3] * zS);
|
||||
}
|
||||
|
||||
asm void PSMTXScaleApply(const register Mtx src, register Mtx dst, register f32 xS, register f32 yS, register f32 zS) {
|
||||
asm void PSMTXScaleApply(const __REGISTER Mtx src, __REGISTER Mtx dst, __REGISTER f32 xS, __REGISTER f32 yS, __REGISTER f32 zS) {
|
||||
nofralloc
|
||||
frsp xS, xS
|
||||
psq_l fp4, 0(src), 0, 0
|
||||
|
|
@ -982,10 +982,10 @@ void C_MTXQuat(Mtx m, const Quaternion* q) {
|
|||
m[2][3] = 0;
|
||||
}
|
||||
|
||||
void PSMTXQuat(register Mtx m, const register Quaternion* q) {
|
||||
register f32 c_zero, c_one, c_two, scale;
|
||||
register f32 tmp0, tmp1, tmp2, tmp3, tmp4;
|
||||
register f32 tmp5, tmp6, tmp7, tmp8, tmp9;
|
||||
void PSMTXQuat(__REGISTER Mtx m, const __REGISTER Quaternion* q) {
|
||||
__REGISTER f32 c_zero, c_one, c_two, scale;
|
||||
__REGISTER f32 tmp0, tmp1, tmp2, tmp3, tmp4;
|
||||
__REGISTER f32 tmp5, tmp6, tmp7, tmp8, tmp9;
|
||||
c_one = 1.0f;
|
||||
|
||||
asm {
|
||||
|
|
@ -1055,13 +1055,13 @@ void C_MTXReflect(Mtx m, const Vec* p, const Vec* n) {
|
|||
m[2][3] = (pdotn * n->z);
|
||||
}
|
||||
|
||||
void PSMTXReflect(register Mtx m, const register Vec* p, const register Vec* n) {
|
||||
register f32 c_one;
|
||||
register f32 vn_xy, vn_z1;
|
||||
register f32 n2vn_xy, n2vn_z1;
|
||||
register f32 pdotn;
|
||||
register f32 tmp0, tmp1, tmp2, tmp3;
|
||||
register f32 tmp4, tmp5, tmp6, tmp7;
|
||||
void PSMTXReflect(__REGISTER Mtx m, const __REGISTER Vec* p, const __REGISTER Vec* n) {
|
||||
__REGISTER f32 c_one;
|
||||
__REGISTER f32 vn_xy, vn_z1;
|
||||
__REGISTER f32 n2vn_xy, n2vn_z1;
|
||||
__REGISTER f32 pdotn;
|
||||
__REGISTER f32 tmp0, tmp1, tmp2, tmp3;
|
||||
__REGISTER f32 tmp4, tmp5, tmp6, tmp7;
|
||||
|
||||
c_one = 1.0f;
|
||||
|
||||
|
|
|
|||
|
|
@ -112,9 +112,9 @@ void C_MTX44Identity(Mtx44 m) {
|
|||
m[3][3] = 1.0f;
|
||||
}
|
||||
|
||||
void PSMTX44Identity(register Mtx44 m) {
|
||||
register f32 c1 = 1.0f;
|
||||
register f32 c0 = 0.0f;
|
||||
void PSMTX44Identity(__REGISTER Mtx44 m) {
|
||||
__REGISTER f32 c1 = 1.0f;
|
||||
__REGISTER f32 c0 = 0.0f;
|
||||
|
||||
asm {
|
||||
stfs c1, 0x0(m)
|
||||
|
|
@ -154,7 +154,7 @@ void C_MTX44Copy(const Mtx44 src, Mtx44 dst) {
|
|||
}
|
||||
}
|
||||
|
||||
asm void PSMTX44Copy(const register Mtx44 src, register Mtx44 dst) {
|
||||
asm void PSMTX44Copy(const __REGISTER Mtx44 src, __REGISTER Mtx44 dst) {
|
||||
nofralloc
|
||||
psq_l f1, 0x0(src), 0, 0
|
||||
psq_st f1, 0x0(dst), 0, 0
|
||||
|
|
@ -214,7 +214,7 @@ void C_MTX44Concat(const Mtx44 a, const Mtx44 b, Mtx44 ab) {
|
|||
}
|
||||
}
|
||||
|
||||
asm void PSMTX44Concat(const register Mtx44 a, const register Mtx44 b, register Mtx44 ab) {
|
||||
asm void PSMTX44Concat(const __REGISTER Mtx44 a, const __REGISTER Mtx44 b, __REGISTER Mtx44 ab) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(a), 0, 0
|
||||
psq_l f2, 0x0(b), 0, 0
|
||||
|
|
@ -318,7 +318,7 @@ void C_MTX44Transpose(const Mtx44 src, Mtx44 xPose) {
|
|||
}
|
||||
}
|
||||
|
||||
asm void PSMTX44Transpose(const register Mtx44 src, register Mtx44 xPose) {
|
||||
asm void PSMTX44Transpose(const __REGISTER Mtx44 src, __REGISTER Mtx44 xPose) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(src), 0, 0
|
||||
psq_l f1, 0x10(src), 0, 0
|
||||
|
|
@ -438,10 +438,10 @@ void C_MTX44Trans(Mtx44 m, f32 xT, f32 yT, f32 zT) {
|
|||
m[3][3] = 1.0f;
|
||||
}
|
||||
|
||||
void PSMTX44Trans(register Mtx44 m, register f32 xT, register f32 yT, register f32 zT) {
|
||||
register f32 c_zero = 0.0f;
|
||||
register f32 c_one = 1.0f;
|
||||
register f32 c_01;
|
||||
void PSMTX44Trans(__REGISTER Mtx44 m, __REGISTER f32 xT, __REGISTER f32 yT, __REGISTER f32 zT) {
|
||||
__REGISTER f32 c_zero = 0.0f;
|
||||
__REGISTER f32 c_one = 1.0f;
|
||||
__REGISTER f32 c_01;
|
||||
|
||||
asm {
|
||||
stfs xT, 0xc(m)
|
||||
|
|
@ -488,7 +488,7 @@ void C_MTX44TransApply(const Mtx44 src, Mtx44 dst, f32 xT, f32 yT, f32 zT) {
|
|||
dst[2][3] = (src[2][3] + zT);
|
||||
}
|
||||
|
||||
asm void PSMTX44TransApply(const register Mtx44 src, register Mtx44 dst, register f32 xT, register f32 yT, register f32 zT) {
|
||||
asm void PSMTX44TransApply(const __REGISTER Mtx44 src, __REGISTER Mtx44 dst, __REGISTER f32 xT, __REGISTER f32 yT, __REGISTER f32 zT) {
|
||||
nofralloc
|
||||
psq_l f4, 0x0(src), 0, 0
|
||||
frsp xT, xT
|
||||
|
|
@ -538,9 +538,9 @@ void C_MTX44Scale(Mtx44 m, f32 xS, f32 yS, f32 zS) {
|
|||
m[3][3] = 1.0f;
|
||||
}
|
||||
|
||||
void PSMTX44Scale(register Mtx44 m, register f32 xS, register f32 yS, register f32 zS) {
|
||||
register f32 c_zero = 0.0f;
|
||||
register f32 c_one = 1.0f;
|
||||
void PSMTX44Scale(__REGISTER Mtx44 m, __REGISTER f32 xS, __REGISTER f32 yS, __REGISTER f32 zS) {
|
||||
__REGISTER f32 c_zero = 0.0f;
|
||||
__REGISTER f32 c_one = 1.0f;
|
||||
|
||||
asm {
|
||||
stfs xS, 0x0(m)
|
||||
|
|
@ -581,7 +581,7 @@ void C_MTX44ScaleApply(const Mtx44 src, Mtx44 dst, f32 xS, f32 yS, f32 zS) {
|
|||
dst[3][3] = src[3][3];
|
||||
}
|
||||
|
||||
asm void PSMTX44ScaleApply(const register Mtx44 src, register Mtx44 dst, register f32 xS, register f32 yS, register f32 zS) {
|
||||
asm void PSMTX44ScaleApply(const __REGISTER Mtx44 src, __REGISTER Mtx44 dst, __REGISTER f32 xS, __REGISTER f32 yS, __REGISTER f32 zS) {
|
||||
nofralloc
|
||||
psq_l f4, 0x0(src), 0, 0
|
||||
frsp xS, xS
|
||||
|
|
@ -695,15 +695,15 @@ void C_MTX44RotTrig(Mtx44 m, char axis, f32 sinA, f32 cosA) {
|
|||
}
|
||||
}
|
||||
|
||||
void PSMTX44RotTrig(register Mtx44 m, register char axis, register f32 sinA, register f32 cosA) {
|
||||
register f32 ftmp0;
|
||||
register f32 ftmp1;
|
||||
register f32 ftmp2;
|
||||
register f32 ftmp3;
|
||||
register f32 ftmp4;
|
||||
void PSMTX44RotTrig(__REGISTER Mtx44 m, __REGISTER char axis, __REGISTER f32 sinA, __REGISTER f32 cosA) {
|
||||
__REGISTER f32 ftmp0;
|
||||
__REGISTER f32 ftmp1;
|
||||
__REGISTER f32 ftmp2;
|
||||
__REGISTER f32 ftmp3;
|
||||
__REGISTER f32 ftmp4;
|
||||
|
||||
register f32 c_zero = 0.0f;
|
||||
register f32 c_one = 1.0f;
|
||||
__REGISTER f32 c_zero = 0.0f;
|
||||
__REGISTER f32 c_one = 1.0f;
|
||||
|
||||
asm {
|
||||
frsp sinA, sinA
|
||||
|
|
@ -813,19 +813,19 @@ void C_MTX44RotAxisRad(Mtx44 m, const Vec* axis, f32 rad) {
|
|||
m[3][3] = 1.0f;
|
||||
}
|
||||
|
||||
static void __PSMTX44RotAxisRadInternal(register Mtx44 m, const register Vec* axis, register f32 sT, register f32 cT) {
|
||||
register f32 tT;
|
||||
register f32 fc0;
|
||||
register f32 tmp0;
|
||||
register f32 tmp1;
|
||||
register f32 tmp2;
|
||||
register f32 tmp3;
|
||||
register f32 tmp4;
|
||||
register f32 tmp5;
|
||||
register f32 tmp6;
|
||||
register f32 tmp7;
|
||||
register f32 tmp8;
|
||||
register f32 tmp9;
|
||||
static void __PSMTX44RotAxisRadInternal(__REGISTER Mtx44 m, const __REGISTER Vec* axis, __REGISTER f32 sT, __REGISTER f32 cT) {
|
||||
__REGISTER f32 tT;
|
||||
__REGISTER f32 fc0;
|
||||
__REGISTER f32 tmp0;
|
||||
__REGISTER f32 tmp1;
|
||||
__REGISTER f32 tmp2;
|
||||
__REGISTER f32 tmp3;
|
||||
__REGISTER f32 tmp4;
|
||||
__REGISTER f32 tmp5;
|
||||
__REGISTER f32 tmp6;
|
||||
__REGISTER f32 tmp7;
|
||||
__REGISTER f32 tmp8;
|
||||
__REGISTER f32 tmp9;
|
||||
|
||||
tmp9 = 0.5f;
|
||||
tmp8 = 3.0f;
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@ void C_MTX44MultVec(const Mtx44 m, const Vec* src, Vec* dst) {
|
|||
dst->z = vTmp.z * w;
|
||||
}
|
||||
|
||||
asm void PSMTX44MultVec(const register Mtx44 m, const register Vec* src, register Vec* dst) {
|
||||
asm void PSMTX44MultVec(const __REGISTER Mtx44 m, const __REGISTER Vec* src, __REGISTER Vec* dst) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(src), 0, 0
|
||||
psq_l f2, 0x30(m), 0, 0
|
||||
|
|
@ -78,7 +78,7 @@ void C_MTX44MultVecArray(const Mtx44 m, const Vec* srcBase, Vec* dstBase, u32 co
|
|||
}
|
||||
}
|
||||
|
||||
asm void PSMTX44MultVecArray(const register Mtx44 m, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTX44MultVecArray(const __REGISTER Mtx44 m, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
stwu r1, -0x10(r1)
|
||||
subi count, count, 0x1
|
||||
|
|
@ -157,7 +157,7 @@ void C_MTX44MultVecSR(const Mtx44 m, const Vec* src, Vec* dst) {
|
|||
dst->z = vTmp.z;
|
||||
}
|
||||
|
||||
asm void PSMTX44MultVecSR(const register Mtx m, const register Vec* src, register Vec* dst) {
|
||||
asm void PSMTX44MultVecSR(const __REGISTER Mtx m, const __REGISTER Vec* src, __REGISTER Vec* dst) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(m), 0, 0
|
||||
psq_l f6, 0x0(src), 0, 0
|
||||
|
|
@ -202,7 +202,7 @@ void C_MTX44MultVecArraySR(const Mtx44 m, const Vec* srcBase, Vec* dstBase, u32
|
|||
}
|
||||
}
|
||||
|
||||
asm void PSMTX44MultVecArraySR(const register Mtx44 m, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTX44MultVecArraySR(const __REGISTER Mtx44 m, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(m), 0, 0
|
||||
subi count, count, 0x1
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ void C_MTXMultVec(const Mtx m, const Vec* src, Vec* dst) {
|
|||
dst->z = vTmp.z;
|
||||
}
|
||||
|
||||
asm void PSMTXMultVec(const register Mtx m, const register Vec* src, register Vec* dst) {
|
||||
asm void PSMTXMultVec(const __REGISTER Mtx m, const __REGISTER Vec* src, __REGISTER Vec* dst) {
|
||||
nofralloc
|
||||
psq_l f0, Vec.x(src), 0, 0
|
||||
psq_l f2, 0(m), 0, 0
|
||||
|
|
@ -63,7 +63,7 @@ void C_MTXMultVecArray(const Mtx m, const Vec* srcBase, Vec* dstBase, u32 count)
|
|||
}
|
||||
}
|
||||
|
||||
asm void PSMTXMultVecArray(const register Mtx m, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXMultVecArray(const __REGISTER Mtx m, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
psq_l f13, 0x0(m), 0, 0
|
||||
psq_l f12, 0x10(m), 0, 0
|
||||
|
|
@ -118,7 +118,7 @@ void C_MTXMultVecSR(const Mtx m, const Vec* src, Vec* dst) {
|
|||
dst->z = vTmp.z;
|
||||
}
|
||||
|
||||
asm void PSMTXMultVecSR(const register Mtx m, const register Vec* src, register Vec* dst) {
|
||||
asm void PSMTXMultVecSR(const __REGISTER Mtx m, const __REGISTER Vec* src, __REGISTER Vec* dst) {
|
||||
nofralloc
|
||||
psq_l f0, 0x0(m), 0, 0
|
||||
psq_l f6, 0x0(src), 0, 0
|
||||
|
|
@ -164,7 +164,7 @@ void C_MTXMultVecArraySR(const Mtx m, const Vec* srcBase, Vec* dstBase, u32 coun
|
|||
}
|
||||
}
|
||||
|
||||
asm void PSMTXMultVecArraySR(const register Mtx m, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXMultVecArraySR(const __REGISTER Mtx m, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
psq_l f13, 0x0(m), 0, 0
|
||||
psq_l f12, 0x10(m), 0, 0
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
#include <dolphin/mtx.h>
|
||||
#include "fake_tgmath.h"
|
||||
|
||||
asm void PSMTXReorder(const register Mtx src, register ROMtx dest) {
|
||||
asm void PSMTXReorder(const __REGISTER Mtx src, __REGISTER ROMtx dest) {
|
||||
psq_l f0, 0(src), 0, 0
|
||||
psq_l f2, 16(src), 0, 0
|
||||
psq_l f4, 32(src), 0, 0
|
||||
|
|
@ -23,7 +23,7 @@ asm void PSMTXReorder(const register Mtx src, register ROMtx dest) {
|
|||
psq_st f10, 40(dest), 0, 0
|
||||
}
|
||||
|
||||
asm void PSMTXROMultVecArray(const register ROMtx m, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXROMultVecArray(const __REGISTER ROMtx m, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
stwu r1, -64(r1)
|
||||
stfd f14, 8(r1)
|
||||
|
|
@ -99,7 +99,7 @@ exit:
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PSMTXROSkin2VecArray(const register ROMtx m0, const register ROMtx m1, const register f32* wtBase, const register Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXROSkin2VecArray(const __REGISTER ROMtx m0, const __REGISTER ROMtx m1, const __REGISTER f32* wtBase, const __REGISTER Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
stwu r1, -160(r1)
|
||||
stfd f14, 8(r1)
|
||||
|
|
@ -210,7 +210,7 @@ loop:
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PSMTXROMultS16VecArray(const register Mtx m, const register S16Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXROMultS16VecArray(const __REGISTER Mtx m, const __REGISTER S16Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
nofralloc
|
||||
stwu r1, -64(r1)
|
||||
stfd f14, 8(r1)
|
||||
|
|
@ -288,7 +288,7 @@ exit:
|
|||
blr
|
||||
}
|
||||
|
||||
asm void PSMTXMultS16VecArray(const register ROMtx* m, const register S16Vec* srcBase, register Vec* dstBase, register u32 count) {
|
||||
asm void PSMTXMultS16VecArray(const __REGISTER ROMtx* m, const __REGISTER S16Vec* srcBase, __REGISTER Vec* dstBase, __REGISTER u32 count) {
|
||||
psq_l f0, 0(m), 0, 0
|
||||
lis r7, 7
|
||||
mtspr GQR6, r7
|
||||
|
|
|
|||
|
|
@ -13,8 +13,8 @@ void C_QUATAdd(const Quaternion* p, const Quaternion* q, Quaternion* r) {
|
|||
r->w = p->w + q->w;
|
||||
}
|
||||
|
||||
void PSQUATAdd(const register Quaternion* p, const register Quaternion* q, register Quaternion* r) {
|
||||
register f32 pxy, qxy, rxy, pzw, qzw, rzw;
|
||||
void PSQUATAdd(const __REGISTER Quaternion* p, const __REGISTER Quaternion* q, __REGISTER Quaternion* r) {
|
||||
__REGISTER f32 pxy, qxy, rxy, pzw, qzw, rzw;
|
||||
|
||||
asm {
|
||||
psq_l pxy, 0(p), 0, 0
|
||||
|
|
@ -39,8 +39,8 @@ void C_QUATSubtract(const Quaternion* p, const Quaternion* q, Quaternion* r) {
|
|||
r->w = p->w - q->w;
|
||||
}
|
||||
|
||||
void PSQUATSubtract(const register Quaternion* p, const register Quaternion* q, register Quaternion* r) {
|
||||
register f32 pxy, qxy, rxy, pzw, qzw, rzw;
|
||||
void PSQUATSubtract(const __REGISTER Quaternion* p, const __REGISTER Quaternion* q, __REGISTER Quaternion* r) {
|
||||
__REGISTER f32 pxy, qxy, rxy, pzw, qzw, rzw;
|
||||
|
||||
asm {
|
||||
psq_l pxy, 0(p), 0, 0
|
||||
|
|
@ -78,12 +78,12 @@ void C_QUATMultiply(const Quaternion* p, const Quaternion* q, Quaternion* pq) {
|
|||
}
|
||||
}
|
||||
|
||||
void PSQUATMultiply(const register Quaternion* p, const register Quaternion* q, register Quaternion* pq) {
|
||||
register f32 pxy, pzw;
|
||||
register f32 qxy, qzw;
|
||||
register f32 pnxy, pnzw, pnxny, pnznw;
|
||||
register f32 rxy, rzw;
|
||||
register f32 sxy, szw;
|
||||
void PSQUATMultiply(const __REGISTER Quaternion* p, const __REGISTER Quaternion* q, __REGISTER Quaternion* pq) {
|
||||
__REGISTER f32 pxy, pzw;
|
||||
__REGISTER f32 qxy, qzw;
|
||||
__REGISTER f32 pnxy, pnzw, pnxny, pnznw;
|
||||
__REGISTER f32 rxy, rzw;
|
||||
__REGISTER f32 sxy, szw;
|
||||
|
||||
asm {
|
||||
psq_l pxy, 0x0(p), 0, 0
|
||||
|
|
@ -121,8 +121,8 @@ void C_QUATScale(const Quaternion* q, Quaternion* r, f32 scale) {
|
|||
r->w = q->w * scale;
|
||||
}
|
||||
|
||||
void PSQUATScale(const register Quaternion* q, register Quaternion* r, register f32 scale) {
|
||||
register f32 rxy, rzw;
|
||||
void PSQUATScale(const __REGISTER Quaternion* q, __REGISTER Quaternion* r, __REGISTER f32 scale) {
|
||||
__REGISTER f32 rxy, rzw;
|
||||
|
||||
asm {
|
||||
psq_l rxy, 0(q), 0, 0
|
||||
|
|
@ -141,8 +141,8 @@ f32 C_QUATDotProduct(const Quaternion* p, const Quaternion* q) {
|
|||
return (q->x * p->x) + (q->y * p->y) + (q->z * p->z) + (q->w * p->w);
|
||||
}
|
||||
|
||||
f32 PSQUATDotProduct(const register Quaternion* p, const register Quaternion* q) {
|
||||
register f32 pxy, pzw, qxy, qzw, dp;
|
||||
f32 PSQUATDotProduct(const __REGISTER Quaternion* p, const __REGISTER Quaternion* q) {
|
||||
__REGISTER f32 pxy, pzw, qxy, qzw, dp;
|
||||
|
||||
asm {
|
||||
psq_l pxy, 0(p), 0, 0
|
||||
|
|
@ -175,16 +175,16 @@ void C_QUATNormalize(const Quaternion* src, Quaternion* unit) {
|
|||
}
|
||||
}
|
||||
|
||||
void PSQUATNormalize(const register Quaternion* src, register Quaternion* unit) {
|
||||
register f32 sxy, szw;
|
||||
register f32 mag, rsqmag;
|
||||
register f32 diff;
|
||||
register f32 c_zero;
|
||||
register f32 nwork0, nwork1;
|
||||
void PSQUATNormalize(const __REGISTER Quaternion* src, __REGISTER Quaternion* unit) {
|
||||
__REGISTER f32 sxy, szw;
|
||||
__REGISTER f32 mag, rsqmag;
|
||||
__REGISTER f32 diff;
|
||||
__REGISTER f32 c_zero;
|
||||
__REGISTER f32 nwork0, nwork1;
|
||||
|
||||
register f32 epsilon = 0.00001f;
|
||||
register f32 c_half = 0.5f;
|
||||
register f32 c_three = 3.0f;
|
||||
__REGISTER f32 epsilon = 0.00001f;
|
||||
__REGISTER f32 c_half = 0.5f;
|
||||
__REGISTER f32 c_three = 3.0f;
|
||||
|
||||
asm {
|
||||
psq_l sxy, 0x0(src), 0, 0
|
||||
|
|
@ -224,15 +224,15 @@ void C_QUATInverse(const Quaternion* src, Quaternion* inv) {
|
|||
inv->w = src->w * norminv;
|
||||
}
|
||||
|
||||
void PSQUATInverse(const register Quaternion* src, register Quaternion* inv) {
|
||||
register f32 sxy, szw;
|
||||
register f32 izz, iww;
|
||||
register f32 mag, nmag;
|
||||
register f32 norminv, nninv;
|
||||
register f32 nwork0;
|
||||
register f32 c_two;
|
||||
register f32 c_zero;
|
||||
register f32 c_one = 1.0f;
|
||||
void PSQUATInverse(const __REGISTER Quaternion* src, __REGISTER Quaternion* inv) {
|
||||
__REGISTER f32 sxy, szw;
|
||||
__REGISTER f32 izz, iww;
|
||||
__REGISTER f32 mag, nmag;
|
||||
__REGISTER f32 norminv, nninv;
|
||||
__REGISTER f32 nwork0;
|
||||
__REGISTER f32 c_two;
|
||||
__REGISTER f32 c_zero;
|
||||
__REGISTER f32 c_one = 1.0f;
|
||||
|
||||
asm {
|
||||
psq_l sxy, 0x0(src), 0, 0
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ void C_VECAdd(const Vec* a, const Vec* b, Vec* ab) {
|
|||
ab->z = a->z + b->z;
|
||||
}
|
||||
|
||||
asm void PSVECAdd(const register Vec* a, const register Vec* b, register Vec* ab) {
|
||||
asm void PSVECAdd(const __REGISTER Vec* a, const __REGISTER Vec* b, __REGISTER Vec* ab) {
|
||||
psq_l f2, Vec.x(a), 0, 0
|
||||
psq_l f4, Vec.x(b), 0, 0
|
||||
ps_add f6, f2, f4
|
||||
|
|
@ -31,7 +31,7 @@ void C_VECSubtract(const Vec* a, const Vec* b, Vec* a_b) {
|
|||
a_b->z = a->z - b->z;
|
||||
}
|
||||
|
||||
asm void PSVECSubtract(const register Vec* a, const register Vec* b, register Vec* a_b) {
|
||||
asm void PSVECSubtract(const __REGISTER Vec* a, const __REGISTER Vec* b, __REGISTER Vec* a_b) {
|
||||
psq_l f2, Vec.x(a), 0, 0
|
||||
psq_l f4, Vec.x(b), 0, 0
|
||||
ps_sub f6, f2, f4
|
||||
|
|
@ -50,8 +50,8 @@ void C_VECScale(const Vec* src, Vec* dst, f32 scale) {
|
|||
dst->z = (src->z * scale);
|
||||
}
|
||||
|
||||
void PSVECScale(const register Vec* src, register Vec* dst, register f32 scale) {
|
||||
register f32 vxy, vz, rxy, rz;
|
||||
void PSVECScale(const __REGISTER Vec* src, __REGISTER Vec* dst, __REGISTER f32 scale) {
|
||||
__REGISTER f32 vxy, vz, rxy, rz;
|
||||
|
||||
asm {
|
||||
psq_l vxy, 0x0(src), 0, 0
|
||||
|
|
@ -78,17 +78,17 @@ void C_VECNormalize(const Vec* src, Vec* unit) {
|
|||
unit->z = src->z * mag;
|
||||
}
|
||||
|
||||
void PSVECNormalize(const register Vec* src, register Vec* unit) {
|
||||
register float c_half = 0.5f;
|
||||
register float c_three = 3.0f;
|
||||
register float v1_xy;
|
||||
register float v1_z;
|
||||
register float xx_zz;
|
||||
register float xx_yy;
|
||||
register float sqsum;
|
||||
register float rsqrt;
|
||||
register float nwork0;
|
||||
register float nwork1;
|
||||
void PSVECNormalize(const __REGISTER Vec* src, __REGISTER Vec* unit) {
|
||||
__REGISTER float c_half = 0.5f;
|
||||
__REGISTER float c_three = 3.0f;
|
||||
__REGISTER float v1_xy;
|
||||
__REGISTER float v1_z;
|
||||
__REGISTER float xx_zz;
|
||||
__REGISTER float xx_yy;
|
||||
__REGISTER float sqsum;
|
||||
__REGISTER float rsqrt;
|
||||
__REGISTER float nwork0;
|
||||
__REGISTER float nwork1;
|
||||
|
||||
asm {
|
||||
psq_l v1_xy, 0x0(src), 0, 0
|
||||
|
|
@ -117,8 +117,8 @@ f32 C_VECSquareMag(const Vec* v) {
|
|||
return sqmag;
|
||||
}
|
||||
|
||||
f32 PSVECSquareMag(const register Vec* v) {
|
||||
register f32 vxy, vzz, sqmag;
|
||||
f32 PSVECSquareMag(const __REGISTER Vec* v) {
|
||||
__REGISTER f32 vxy, vzz, sqmag;
|
||||
|
||||
asm {
|
||||
psq_l vxy, 0x0(v), 0, 0
|
||||
|
|
@ -135,11 +135,11 @@ f32 C_VECMag(const Vec* v) {
|
|||
return sqrtf(C_VECSquareMag(v));
|
||||
}
|
||||
|
||||
f32 PSVECMag(const register Vec* v) {
|
||||
register f32 vxy, vzz;
|
||||
register f32 sqmag, rmag;
|
||||
register f32 nwork0, nwork1;
|
||||
register f32 c_three, c_half, c_zero;
|
||||
f32 PSVECMag(const __REGISTER Vec* v) {
|
||||
__REGISTER f32 vxy, vzz;
|
||||
__REGISTER f32 sqmag, rmag;
|
||||
__REGISTER f32 nwork0, nwork1;
|
||||
__REGISTER f32 c_three, c_half, c_zero;
|
||||
|
||||
c_half = 0.5f;
|
||||
|
||||
|
|
@ -178,7 +178,7 @@ f32 C_VECDotProduct(const Vec* a, const Vec* b) {
|
|||
return dot;
|
||||
}
|
||||
|
||||
asm f32 PSVECDotProduct(const register Vec* a, const register Vec* b) {
|
||||
asm f32 PSVECDotProduct(const __REGISTER Vec* a, const __REGISTER Vec* b) {
|
||||
psq_l f2, Vec.y(a), 0, 0
|
||||
psq_l f3, Vec.y(b), 0, 0
|
||||
ps_mul f2, f2, f3
|
||||
|
|
@ -203,7 +203,7 @@ void C_VECCrossProduct(const Vec* a, const Vec* b, Vec* axb) {
|
|||
axb->z = vTmp.z;
|
||||
}
|
||||
|
||||
asm void PSVECCrossProduct(const register Vec* a, const register Vec* b, register Vec* axb) {
|
||||
asm void PSVECCrossProduct(const __REGISTER Vec* a, const __REGISTER Vec* b, __REGISTER Vec* axb) {
|
||||
psq_l f1, Vec.x(b), 0, 0
|
||||
lfs f2, Vec.z(a)
|
||||
psq_l f0, Vec.x(a), 0, 0
|
||||
|
|
@ -279,9 +279,9 @@ f32 C_VECSquareDistance(const Vec* a, const Vec* b) {
|
|||
return (diff.z * diff.z) + ((diff.x * diff.x) + (diff.y * diff.y));
|
||||
}
|
||||
|
||||
f32 PSVECSquareDistance(const register Vec* a, const register Vec* b) {
|
||||
register f32 v0yz, v1yz, v0xy, v1xy, dyz, dxy;
|
||||
register f32 sqdist;
|
||||
f32 PSVECSquareDistance(const __REGISTER Vec* a, const __REGISTER Vec* b) {
|
||||
__REGISTER f32 v0yz, v1yz, v0xy, v1xy, dyz, dxy;
|
||||
__REGISTER f32 sqdist;
|
||||
|
||||
asm {
|
||||
psq_l v0yz, 0x4(a), 0, 0
|
||||
|
|
@ -302,11 +302,11 @@ f32 C_VECDistance(const Vec* a, const Vec* b) {
|
|||
return sqrtf(C_VECSquareDistance(a, b));
|
||||
}
|
||||
|
||||
f32 PSVECDistance(const register Vec* a, const register Vec* b) {
|
||||
register f32 v0yz, v1yz, v0xy, v1xy, dyz, dxy;
|
||||
register f32 sqdist, rdist;
|
||||
register f32 nwork0, nwork1;
|
||||
register f32 c_half, c_three, c_zero;
|
||||
f32 PSVECDistance(const __REGISTER Vec* a, const __REGISTER Vec* b) {
|
||||
__REGISTER f32 v0yz, v1yz, v0xy, v1xy, dyz, dxy;
|
||||
__REGISTER f32 sqdist, rdist;
|
||||
__REGISTER f32 nwork0, nwork1;
|
||||
__REGISTER f32 c_half, c_three, c_zero;
|
||||
|
||||
asm {
|
||||
psq_l v0yz, 0x4(a), 0, 0
|
||||
|
|
|
|||
|
|
@ -590,7 +590,7 @@ entry __OSEVEnd
|
|||
void __OSUnhandledException(__OSException exception, OSContext* context, u32 dsisr, u32 dar);
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void OSDefaultExceptionHandler(register __OSException exception, register OSContext* context) {
|
||||
asm void OSDefaultExceptionHandler(__REGISTER __OSException exception, __REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
OS_EXCEPTION_SAVE_GPRS(context)
|
||||
mfdsisr r5
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@ typedef struct {
|
|||
// prototypes
|
||||
static void SetTimer(OSAlarm * alarm);
|
||||
static void InsertAlarm(OSAlarm* alarm, OSTime fire, OSAlarmHandler handler);
|
||||
static void DecrementerExceptionCallback(register __OSException exception, register OSContext* context);
|
||||
static void DecrementerExceptionCallback(__REGISTER __OSException exception, __REGISTER OSContext* context);
|
||||
static void DecrementerExceptionHandler(__OSException exception, OSContext* context);
|
||||
static BOOL OnReset(BOOL final);
|
||||
|
||||
|
|
@ -178,8 +178,8 @@ void OSCancelAlarm(OSAlarm* alarm) {
|
|||
OSRestoreInterrupts(enabled);
|
||||
}
|
||||
|
||||
static void DecrementerExceptionCallback(register __OSException exception,
|
||||
register OSContext* context) {
|
||||
static void DecrementerExceptionCallback(__REGISTER __OSException exception,
|
||||
__REGISTER OSContext* context) {
|
||||
OSAlarm* alarm;
|
||||
OSAlarm* next;
|
||||
OSAlarmHandler handler;
|
||||
|
|
@ -230,8 +230,8 @@ static void DecrementerExceptionCallback(register __OSException exception,
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void DecrementerExceptionHandler(register __OSException exception,
|
||||
register OSContext* context) {
|
||||
static asm void DecrementerExceptionHandler(__REGISTER __OSException exception,
|
||||
__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
OS_EXCEPTION_SAVE_GPRS(context)
|
||||
stwu r1, -8(r1)
|
||||
|
|
|
|||
|
|
@ -53,37 +53,37 @@ asm void DCUnfreeze(void) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCTouchLoad(register void* addr) {
|
||||
asm void DCTouchLoad(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbt r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockZero(register void* addr) {
|
||||
asm void DCBlockZero(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbz r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockStore(register void* addr) {
|
||||
asm void DCBlockStore(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbst r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockFlush(register void* addr) {
|
||||
asm void DCBlockFlush(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbf r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockInvalidate(register void* addr) {
|
||||
asm void DCBlockInvalidate(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbi r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCInvalidateRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCInvalidateRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -100,7 +100,7 @@ asm void DCInvalidateRange(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCFlushRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCFlushRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -118,7 +118,7 @@ asm void DCFlushRange(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCStoreRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCStoreRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -137,7 +137,7 @@ asm void DCStoreRange(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCFlushRangeNoSync(register void* addr, register u32 nBytes) {
|
||||
asm void DCFlushRangeNoSync(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -154,7 +154,7 @@ asm void DCFlushRangeNoSync(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCStoreRangeNoSync(register void* addr, register u32 nBytes) {
|
||||
asm void DCStoreRangeNoSync(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -172,7 +172,7 @@ asm void DCStoreRangeNoSync(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCZeroRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCZeroRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -190,7 +190,7 @@ asm void DCZeroRange(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCTouchRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCTouchRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -208,7 +208,7 @@ asm void DCTouchRange(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void ICInvalidateRange(register void* addr, register u32 nBytes) {
|
||||
asm void ICInvalidateRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -271,7 +271,7 @@ asm void ICUnfreeze(void) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void ICBlockInvalidate(register void* addr) {
|
||||
asm void ICBlockInvalidate(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
icbi r0, addr
|
||||
blr
|
||||
|
|
@ -371,7 +371,7 @@ asm void LCDisable(void) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void LCAllocOneTag(register BOOL invalidate, register void* tag) {
|
||||
asm void LCAllocOneTag(__REGISTER BOOL invalidate, __REGISTER void* tag) {
|
||||
nofralloc
|
||||
cmpwi invalidate, 0
|
||||
beq @1
|
||||
|
|
@ -381,7 +381,7 @@ asm void LCAllocOneTag(register BOOL invalidate, register void* tag) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void LCAllocTags(register BOOL invalidate, register void* startTag, register u32 numBlocks) {
|
||||
asm void LCAllocTags(__REGISTER BOOL invalidate, __REGISTER void* startTag, __REGISTER u32 numBlocks) {
|
||||
nofralloc
|
||||
mflr r6
|
||||
cmplwi numBlocks, 0
|
||||
|
|
@ -404,7 +404,7 @@ asm void LCAllocTags(register BOOL invalidate, register void* startTag, register
|
|||
blr
|
||||
}
|
||||
|
||||
asm void LCLoadBlocks(register void* destTag, register void* srcAddr, register u32 numBlocks) {
|
||||
asm void LCLoadBlocks(__REGISTER void* destTag, __REGISTER void* srcAddr, __REGISTER u32 numBlocks) {
|
||||
nofralloc
|
||||
rlwinm r6, numBlocks, 30, 27, 31
|
||||
rlwinm srcAddr, srcAddr, 0, 4, 31
|
||||
|
|
@ -417,7 +417,7 @@ asm void LCLoadBlocks(register void* destTag, register void* srcAddr, register u
|
|||
blr
|
||||
}
|
||||
|
||||
asm void LCStoreBlocks(register void* destAddr, register void* srcTag, register u32 numBlocks) {
|
||||
asm void LCStoreBlocks(__REGISTER void* destAddr, __REGISTER void* srcTag, __REGISTER u32 numBlocks) {
|
||||
nofralloc
|
||||
rlwinm r6, numBlocks, 30, 27, 31
|
||||
rlwinm destAddr, destAddr, 0, 4, 31
|
||||
|
|
@ -509,7 +509,7 @@ asm u32 LCQueueLength(void) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void LCQueueWait(register u32 len) {
|
||||
asm void LCQueueWait(__REGISTER u32 len) {
|
||||
nofralloc
|
||||
@1
|
||||
mfspr r4, HID2
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@ volatile OSContext* __OSCurrentContext AT_ADDRESS(OS_BASE_CACHED | 0x00D4);
|
|||
volatile OSContext* __OSFPUContext AT_ADDRESS(OS_BASE_CACHED | 0x00D8);
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void __OSLoadFPUContext(register u32 dummy, register OSContext* fpucontext) {
|
||||
static asm void __OSLoadFPUContext(__REGISTER u32 dummy, __REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
lhz r5, fpucontext->state;
|
||||
clrlwi. r5, r5, 31
|
||||
|
|
@ -96,7 +96,7 @@ _return:
|
|||
blr
|
||||
}
|
||||
|
||||
static asm void __OSSaveFPUContext(register u32 dummy1, register u32 dummy2, register OSContext* fpucontext) {
|
||||
static asm void __OSSaveFPUContext(__REGISTER u32 dummy1, __REGISTER u32 dummy2, __REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
|
||||
lhz r3, fpucontext->state
|
||||
|
|
@ -182,19 +182,19 @@ _return:
|
|||
blr
|
||||
}
|
||||
|
||||
asm void OSLoadFPUContext(register OSContext* fpucontext) {
|
||||
asm void OSLoadFPUContext(__REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
addi r4, fpucontext, 0
|
||||
b __OSLoadFPUContext
|
||||
}
|
||||
|
||||
asm void OSSaveFPUContext(register OSContext* fpucontext) {
|
||||
asm void OSSaveFPUContext(__REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
addi r5, fpucontext, 0
|
||||
b __OSSaveFPUContext
|
||||
}
|
||||
|
||||
asm void OSSetCurrentContext(register OSContext* context){
|
||||
asm void OSSetCurrentContext(__REGISTER OSContext* context){
|
||||
nofralloc
|
||||
|
||||
addis r4, r0, OS_CACHED_REGION_PREFIX
|
||||
|
|
@ -234,7 +234,7 @@ OSContext* OSGetCurrentContext(void) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm u32 OSSaveContext(register OSContext* context) {
|
||||
asm u32 OSSaveContext(__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
stmw r13, context->gpr[13]
|
||||
mfspr r0, GQR1
|
||||
|
|
@ -270,7 +270,7 @@ asm u32 OSSaveContext(register OSContext* context) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void OSLoadContext(register OSContext* context) {
|
||||
asm void OSLoadContext(__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
|
||||
lis r4,__RAS_OSDisableInterrupts_begin@ha
|
||||
|
|
@ -347,7 +347,7 @@ asm u32 OSGetStackPointer() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm u32 OSSwitchStack(register u32 newsp) {
|
||||
asm u32 OSSwitchStack(__REGISTER u32 newsp) {
|
||||
nofralloc
|
||||
mr r5, r1
|
||||
mr r1, newsp
|
||||
|
|
@ -355,7 +355,7 @@ asm u32 OSSwitchStack(register u32 newsp) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm int OSSwitchFiber(register u32 pc, register u32 newsp) {
|
||||
asm int OSSwitchFiber(__REGISTER u32 pc, __REGISTER u32 newsp) {
|
||||
nofralloc
|
||||
mflr r0
|
||||
mr r5, r1
|
||||
|
|
@ -372,7 +372,7 @@ asm int OSSwitchFiber(register u32 pc, register u32 newsp) {
|
|||
}
|
||||
#endif
|
||||
|
||||
void OSClearContext(register OSContext* context) {
|
||||
void OSClearContext(__REGISTER OSContext* context) {
|
||||
context->mode = 0;
|
||||
context->state = 0;
|
||||
if (context == __OSFPUContext)
|
||||
|
|
@ -380,7 +380,7 @@ void OSClearContext(register OSContext* context) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void OSInitContext(register OSContext* context, register u32 pc, register u32 newsp) {
|
||||
asm void OSInitContext(__REGISTER OSContext* context, __REGISTER u32 pc, __REGISTER u32 newsp) {
|
||||
nofralloc
|
||||
|
||||
stw pc, OS_CONTEXT_SRR0(context)
|
||||
|
|
@ -491,7 +491,7 @@ void OSDumpContext(OSContext* context) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void OSSwitchFPUContext(register __OSException exception, register OSContext* context) {
|
||||
static asm void OSSwitchFPUContext(__REGISTER __OSException exception, __REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
mfmsr r5
|
||||
ori r5, r5, 0x2000
|
||||
|
|
@ -538,7 +538,7 @@ void __OSContextInit(void) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void OSFillFPUContext(register OSContext* context) {
|
||||
asm void OSFillFPUContext(__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
mfmsr r5
|
||||
ori r5, r5, 0x2000
|
||||
|
|
|
|||
|
|
@ -51,7 +51,7 @@ static int PackArgs(void* addr, s32 argc, char** argv) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void Run(register void* entryPoint) {
|
||||
static asm void Run(__REGISTER void* entryPoint) {
|
||||
nofralloc
|
||||
|
||||
mflr r0
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ char* __OSPIErrors[8] = {
|
|||
#endif
|
||||
|
||||
// prototypes
|
||||
static void ExternalInterruptHandler(register __OSException exception, register OSContext* context);
|
||||
static void ExternalInterruptHandler(__REGISTER __OSException exception, __REGISTER OSContext* context);
|
||||
extern void __RAS_OSDisableInterrupts_begin(void);
|
||||
extern void __RAS_OSDisableInterrupts_end(void);
|
||||
|
||||
|
|
@ -103,7 +103,7 @@ asm BOOL OSEnableInterrupts(void) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm BOOL OSRestoreInterrupts(register BOOL level) {
|
||||
asm BOOL OSRestoreInterrupts(__REGISTER BOOL level) {
|
||||
nofralloc
|
||||
|
||||
cmpwi level, 0
|
||||
|
|
@ -497,8 +497,8 @@ void __OSDispatchInterrupt(__OSException exception, OSContext* context) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void ExternalInterruptHandler(register __OSException exception,
|
||||
register OSContext* context) {
|
||||
static asm void ExternalInterruptHandler(__REGISTER __OSException exception,
|
||||
__REGISTER OSContext* context) {
|
||||
#pragma unused(exception)
|
||||
nofralloc
|
||||
OS_EXCEPTION_SAVE_GPRS(context)
|
||||
|
|
|
|||
|
|
@ -179,7 +179,7 @@ static asm void Config48MB(void) {
|
|||
#endif
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void RealMode(register u32 addr) {
|
||||
static asm void RealMode(__REGISTER u32 addr) {
|
||||
nofralloc
|
||||
clrlwi addr, addr, 2
|
||||
mtsrr0 addr
|
||||
|
|
|
|||
|
|
@ -208,7 +208,7 @@ static BOOL __OSIsThreadActive(OSThread* thread) {
|
|||
}
|
||||
|
||||
s32 OSDisableScheduler(void) {
|
||||
register BOOL enabled;
|
||||
__REGISTER BOOL enabled;
|
||||
s32 count;
|
||||
|
||||
enabled = OSDisableInterrupts();
|
||||
|
|
@ -219,7 +219,7 @@ s32 OSDisableScheduler(void) {
|
|||
}
|
||||
|
||||
s32 OSEnableScheduler(void) {
|
||||
register BOOL enabled;
|
||||
__REGISTER BOOL enabled;
|
||||
s32 count;
|
||||
|
||||
enabled = OSDisableInterrupts();
|
||||
|
|
@ -839,9 +839,9 @@ s32 OSCheckActiveThreads(void) {
|
|||
}
|
||||
|
||||
void OSClearStack(u8 val) {
|
||||
register u32 sp;
|
||||
register u32* p;
|
||||
register u32 pattern;
|
||||
__REGISTER u32 sp;
|
||||
__REGISTER u32* p;
|
||||
__REGISTER u32 pattern;
|
||||
|
||||
pattern = (val << 24) | (val << 16) | (val << 8) | val;
|
||||
sp = OSGetStackPointer();
|
||||
|
|
|
|||
|
|
@ -81,7 +81,7 @@ OSTime __OSTimeToSystemTime(OSTime time) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void __OSSetTick(register OSTick newTicks) {
|
||||
asm void __OSSetTick(__REGISTER OSTick newTicks) {
|
||||
nofralloc
|
||||
mttbl newTicks
|
||||
blr
|
||||
|
|
|
|||
|
|
@ -111,7 +111,7 @@ static void DecrementerExceptionCallback(__OSException exception, OSContext* con
|
|||
|
||||
#ifdef __GEKKO__
|
||||
static asm void DecrementerExceptionHandler(__OSException exception,
|
||||
register OSContext* context) {
|
||||
__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
|
||||
stw r0, context->gpr[0]
|
||||
|
|
|
|||
|
|
@ -98,7 +98,7 @@ void __OSReschedule(void);
|
|||
// OSTime
|
||||
void __OSSetTime(OSTime time);
|
||||
OSTime __OSGetSystemTime();
|
||||
void __OSSetTick(register OSTick newTicks);
|
||||
void __OSSetTick(__REGISTER OSTick newTicks);
|
||||
OSTime __OSTimeToSystemTime(OSTime time);
|
||||
|
||||
// ppc_eabi_init
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ u8 __OSReport_System_disable;
|
|||
u8 __OSReport_enable;
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void OSSwitchFiberEx(register u32 param_0, register u32 param_1, register u32 param_2, register u32 param_3, register u32 code, register u32 stack) {
|
||||
asm void OSSwitchFiberEx(__REGISTER u32 param_0, __REGISTER u32 param_1, __REGISTER u32 param_2, __REGISTER u32 param_3, __REGISTER u32 code, __REGISTER u32 stack) {
|
||||
nofralloc
|
||||
|
||||
mflr r0
|
||||
|
|
|
|||
|
|
@ -936,7 +936,7 @@ entry __OSEVEnd
|
|||
void __OSUnhandledException(__OSException exception, OSContext* context, u32 dsisr, u32 dar);
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void OSDefaultExceptionHandler(register __OSException exception, register OSContext* context) {
|
||||
asm void OSDefaultExceptionHandler(__REGISTER __OSException exception, __REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
OS_EXCEPTION_SAVE_GPRS(context)
|
||||
mfdsisr r5
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@ typedef struct {
|
|||
// prototypes
|
||||
static void SetTimer(OSAlarm * alarm);
|
||||
static void InsertAlarm(OSAlarm* alarm, OSTime fire, OSAlarmHandler handler);
|
||||
static void DecrementerExceptionCallback(register __OSException exception, register OSContext* context);
|
||||
static void DecrementerExceptionCallback(__REGISTER __OSException exception, __REGISTER OSContext* context);
|
||||
static void DecrementerExceptionHandler(__OSException exception, OSContext* context);
|
||||
static BOOL OnReset(BOOL final, u32 event);
|
||||
|
||||
|
|
@ -178,8 +178,8 @@ void OSCancelAlarm(OSAlarm* alarm) {
|
|||
OSRestoreInterrupts(enabled);
|
||||
}
|
||||
|
||||
static void DecrementerExceptionCallback(register __OSException exception,
|
||||
register OSContext* context) {
|
||||
static void DecrementerExceptionCallback(__REGISTER __OSException exception,
|
||||
__REGISTER OSContext* context) {
|
||||
OSAlarm* alarm;
|
||||
OSAlarm* next;
|
||||
OSAlarmHandler handler;
|
||||
|
|
@ -230,8 +230,8 @@ static void DecrementerExceptionCallback(register __OSException exception,
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void DecrementerExceptionHandler(register __OSException exception,
|
||||
register OSContext* context) {
|
||||
static asm void DecrementerExceptionHandler(__REGISTER __OSException exception,
|
||||
__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
OS_EXCEPTION_SAVE_GPRS(context)
|
||||
stwu r1, -8(r1)
|
||||
|
|
|
|||
|
|
@ -53,37 +53,37 @@ asm void DCUnfreeze(void) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCTouchLoad(register void* addr) {
|
||||
asm void DCTouchLoad(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbt r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockZero(register void* addr) {
|
||||
asm void DCBlockZero(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbz r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockStore(register void* addr) {
|
||||
asm void DCBlockStore(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbst r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockFlush(register void* addr) {
|
||||
asm void DCBlockFlush(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbf r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCBlockInvalidate(register void* addr) {
|
||||
asm void DCBlockInvalidate(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
dcbi r0, addr
|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCInvalidateRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCInvalidateRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -100,7 +100,7 @@ asm void DCInvalidateRange(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCFlushRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCFlushRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -118,7 +118,7 @@ asm void DCFlushRange(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCStoreRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCStoreRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -137,7 +137,7 @@ asm void DCStoreRange(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCFlushRangeNoSync(register void* addr, register u32 nBytes) {
|
||||
asm void DCFlushRangeNoSync(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -154,7 +154,7 @@ asm void DCFlushRangeNoSync(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCStoreRangeNoSync(register void* addr, register u32 nBytes) {
|
||||
asm void DCStoreRangeNoSync(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -172,7 +172,7 @@ asm void DCStoreRangeNoSync(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCZeroRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCZeroRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -190,7 +190,7 @@ asm void DCZeroRange(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void DCTouchRange(register void* addr, register u32 nBytes) {
|
||||
asm void DCTouchRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -208,7 +208,7 @@ asm void DCTouchRange(register void* addr, register u32 nBytes) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void ICInvalidateRange(register void* addr, register u32 nBytes) {
|
||||
asm void ICInvalidateRange(__REGISTER void* addr, __REGISTER u32 nBytes) {
|
||||
nofralloc
|
||||
cmplwi nBytes, 0
|
||||
blelr
|
||||
|
|
@ -271,7 +271,7 @@ asm void ICUnfreeze(void) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void ICBlockInvalidate(register void* addr) {
|
||||
asm void ICBlockInvalidate(__REGISTER void* addr) {
|
||||
nofralloc
|
||||
icbi r0, addr
|
||||
blr
|
||||
|
|
@ -371,7 +371,7 @@ asm void LCDisable(void) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void LCAllocOneTag(register BOOL invalidate, register void* tag) {
|
||||
asm void LCAllocOneTag(__REGISTER BOOL invalidate, __REGISTER void* tag) {
|
||||
nofralloc
|
||||
cmpwi invalidate, 0
|
||||
beq @1
|
||||
|
|
@ -381,7 +381,7 @@ asm void LCAllocOneTag(register BOOL invalidate, register void* tag) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void LCAllocTags(register BOOL invalidate, register void* startTag, register u32 numBlocks) {
|
||||
asm void LCAllocTags(__REGISTER BOOL invalidate, __REGISTER void* startTag, __REGISTER u32 numBlocks) {
|
||||
nofralloc
|
||||
mflr r6
|
||||
cmplwi numBlocks, 0
|
||||
|
|
@ -404,7 +404,7 @@ asm void LCAllocTags(register BOOL invalidate, register void* startTag, register
|
|||
blr
|
||||
}
|
||||
|
||||
asm void LCLoadBlocks(register void* destTag, register void* srcAddr, register u32 numBlocks) {
|
||||
asm void LCLoadBlocks(__REGISTER void* destTag, __REGISTER void* srcAddr, __REGISTER u32 numBlocks) {
|
||||
nofralloc
|
||||
rlwinm r6, numBlocks, 30, 27, 31
|
||||
rlwinm srcAddr, srcAddr, 0, 4, 31
|
||||
|
|
@ -417,7 +417,7 @@ asm void LCLoadBlocks(register void* destTag, register void* srcAddr, register u
|
|||
blr
|
||||
}
|
||||
|
||||
asm void LCStoreBlocks(register void* destAddr, register void* srcTag, register u32 numBlocks) {
|
||||
asm void LCStoreBlocks(__REGISTER void* destAddr, __REGISTER void* srcTag, __REGISTER u32 numBlocks) {
|
||||
nofralloc
|
||||
rlwinm r6, numBlocks, 30, 27, 31
|
||||
rlwinm destAddr, destAddr, 0, 3, 31
|
||||
|
|
@ -509,7 +509,7 @@ asm u32 LCQueueLength(void) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void LCQueueWait(register u32 len) {
|
||||
asm void LCQueueWait(__REGISTER u32 len) {
|
||||
nofralloc
|
||||
@1
|
||||
mfspr r4, HID2
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@ volatile OSContext* __OSCurrentContext AT_ADDRESS(OS_BASE_CACHED | 0x00D4);
|
|||
volatile OSContext* __OSFPUContext AT_ADDRESS(OS_BASE_CACHED | 0x00D8);
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void __OSLoadFPUContext(register u32 dummy, register OSContext* fpucontext) {
|
||||
static asm void __OSLoadFPUContext(__REGISTER u32 dummy, __REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
lhz r5, fpucontext->state;
|
||||
clrlwi. r5, r5, 31
|
||||
|
|
@ -96,7 +96,7 @@ _return:
|
|||
blr
|
||||
}
|
||||
|
||||
static asm void __OSSaveFPUContext(register u32 dummy1, register u32 dummy2, register OSContext* fpucontext) {
|
||||
static asm void __OSSaveFPUContext(__REGISTER u32 dummy1, __REGISTER u32 dummy2, __REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
|
||||
lhz r3, fpucontext->state
|
||||
|
|
@ -182,19 +182,19 @@ _return:
|
|||
blr
|
||||
}
|
||||
|
||||
asm void OSLoadFPUContext(register OSContext* fpucontext) {
|
||||
asm void OSLoadFPUContext(__REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
addi r4, fpucontext, 0
|
||||
b __OSLoadFPUContext
|
||||
}
|
||||
|
||||
asm void OSSaveFPUContext(register OSContext* fpucontext) {
|
||||
asm void OSSaveFPUContext(__REGISTER OSContext* fpucontext) {
|
||||
nofralloc
|
||||
addi r5, fpucontext, 0
|
||||
b __OSSaveFPUContext
|
||||
}
|
||||
|
||||
asm void OSSetCurrentContext(register OSContext* context){
|
||||
asm void OSSetCurrentContext(__REGISTER OSContext* context){
|
||||
nofralloc
|
||||
|
||||
addis r4, r0, OS_CACHED_REGION_PREFIX
|
||||
|
|
@ -234,7 +234,7 @@ OSContext* OSGetCurrentContext(void) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm u32 OSSaveContext(register OSContext* context) {
|
||||
asm u32 OSSaveContext(__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
stmw r13, context->gpr[13]
|
||||
mfspr r0, GQR1
|
||||
|
|
@ -270,7 +270,7 @@ asm u32 OSSaveContext(register OSContext* context) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm void OSLoadContext(register OSContext* context) {
|
||||
asm void OSLoadContext(__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
|
||||
lis r4,__RAS_OSDisableInterrupts_begin@ha
|
||||
|
|
@ -347,7 +347,7 @@ asm u32 OSGetStackPointer() {
|
|||
blr
|
||||
}
|
||||
|
||||
asm u32 OSSwitchStack(register u32 newsp) {
|
||||
asm u32 OSSwitchStack(__REGISTER u32 newsp) {
|
||||
nofralloc
|
||||
mr r5, r1
|
||||
mr r1, newsp
|
||||
|
|
@ -355,7 +355,7 @@ asm u32 OSSwitchStack(register u32 newsp) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm int OSSwitchFiber(register u32 pc, register u32 newsp) {
|
||||
asm int OSSwitchFiber(__REGISTER u32 pc, __REGISTER u32 newsp) {
|
||||
nofralloc
|
||||
mflr r0
|
||||
mr r5, r1
|
||||
|
|
@ -373,7 +373,7 @@ asm int OSSwitchFiber(register u32 pc, register u32 newsp) {
|
|||
#endif
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void OSSwitchFiberEx(register u32 param_0, register u32 param_1, register u32 param_2, register u32 param_3, register u32 pc, register u32 newsp) {
|
||||
asm void OSSwitchFiberEx(__REGISTER u32 param_0, __REGISTER u32 param_1, __REGISTER u32 param_2, __REGISTER u32 param_3, __REGISTER u32 pc, __REGISTER u32 newsp) {
|
||||
nofralloc
|
||||
|
||||
mflr r0
|
||||
|
|
@ -400,7 +400,7 @@ asm void OSSwitchFiberEx(register u32 param_0, register u32 param_1, register u3
|
|||
}
|
||||
#endif
|
||||
|
||||
void OSClearContext(register OSContext* context) {
|
||||
void OSClearContext(__REGISTER OSContext* context) {
|
||||
context->mode = 0;
|
||||
context->state = 0;
|
||||
if (context == __OSFPUContext)
|
||||
|
|
@ -408,7 +408,7 @@ void OSClearContext(register OSContext* context) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void OSInitContext(register OSContext* context, register u32 pc, register u32 newsp) {
|
||||
asm void OSInitContext(__REGISTER OSContext* context, __REGISTER u32 pc, __REGISTER u32 newsp) {
|
||||
nofralloc
|
||||
|
||||
stw pc, OS_CONTEXT_SRR0(context)
|
||||
|
|
@ -519,7 +519,7 @@ void OSDumpContext(OSContext* context) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void OSSwitchFPUContext(register __OSException exception, register OSContext* context) {
|
||||
static asm void OSSwitchFPUContext(__REGISTER __OSException exception, __REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
mfmsr r5
|
||||
ori r5, r5, 0x2000
|
||||
|
|
@ -569,7 +569,7 @@ void __OSContextInit(void) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void OSFillFPUContext(register OSContext* context) {
|
||||
asm void OSFillFPUContext(__REGISTER OSContext* context) {
|
||||
nofralloc
|
||||
mfmsr r5
|
||||
ori r5, r5, 0x2000
|
||||
|
|
|
|||
|
|
@ -145,7 +145,7 @@ BOOL PackInstallerArgs(void* addr, s32 argc, char* argv[]) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void Run(register void* entryPoint) {
|
||||
static asm void Run(__REGISTER void* entryPoint) {
|
||||
fralloc
|
||||
|
||||
bl ICFlashInvalidate
|
||||
|
|
|
|||
|
|
@ -78,7 +78,7 @@ char* __OSPIErrors[8] = {
|
|||
#endif
|
||||
|
||||
// prototypes
|
||||
static void ExternalInterruptHandler(register __OSException exception, register OSContext* context);
|
||||
static void ExternalInterruptHandler(__REGISTER __OSException exception, __REGISTER OSContext* context);
|
||||
extern void __RAS_OSDisableInterrupts_begin(void);
|
||||
extern void __RAS_OSDisableInterrupts_end(void);
|
||||
|
||||
|
|
@ -104,7 +104,7 @@ asm BOOL OSEnableInterrupts(void) {
|
|||
blr
|
||||
}
|
||||
|
||||
asm BOOL OSRestoreInterrupts(register BOOL level) {
|
||||
asm BOOL OSRestoreInterrupts(__REGISTER BOOL level) {
|
||||
nofralloc
|
||||
|
||||
cmpwi level, 0
|
||||
|
|
@ -507,8 +507,8 @@ void __OSDispatchInterrupt(__OSException exception, OSContext* context) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void ExternalInterruptHandler(register __OSException exception,
|
||||
register OSContext* context) {
|
||||
static asm void ExternalInterruptHandler(__REGISTER __OSException exception,
|
||||
__REGISTER OSContext* context) {
|
||||
#pragma unused(exception)
|
||||
nofralloc
|
||||
OS_EXCEPTION_SAVE_GPRS(context)
|
||||
|
|
|
|||
|
|
@ -591,7 +591,7 @@ static asm void ConfigMEM_ES1_0(void) {
|
|||
#endif
|
||||
|
||||
#ifdef __GEKKO__
|
||||
static asm void RealMode(register u32 addr) {
|
||||
static asm void RealMode(__REGISTER u32 addr) {
|
||||
nofralloc
|
||||
clrlwi addr, addr, 2
|
||||
mtsrr0 addr
|
||||
|
|
|
|||
|
|
@ -836,9 +836,9 @@ s32 OSCheckActiveThreads(void) {
|
|||
}
|
||||
|
||||
void OSClearStack(u8 val) {
|
||||
register u32 sp;
|
||||
register u32* p;
|
||||
register u32 pattern;
|
||||
__REGISTER u32 sp;
|
||||
__REGISTER u32* p;
|
||||
__REGISTER u32 pattern;
|
||||
|
||||
pattern = (val << 24) | (val << 16) | (val << 8) | val;
|
||||
sp = OSGetStackPointer();
|
||||
|
|
|
|||
|
|
@ -82,7 +82,7 @@ OSTime __OSTimeToSystemTime(OSTime time) {
|
|||
}
|
||||
|
||||
#ifdef __GEKKO__
|
||||
asm void __OSSetTick(register OSTick newTicks) {
|
||||
asm void __OSSetTick(__REGISTER OSTick newTicks) {
|
||||
nofralloc
|
||||
mttbl newTicks
|
||||
blr
|
||||
|
|
|
|||
|
|
@ -112,7 +112,7 @@ void __OSReschedule(void);
|
|||
// OSTime
|
||||
void __OSSetTime(OSTime time);
|
||||
OSTime __OSGetSystemTime();
|
||||
void __OSSetTick(register OSTick newTicks);
|
||||
void __OSSetTick(__REGISTER OSTick newTicks);
|
||||
OSTime __OSTimeToSystemTime(OSTime time);
|
||||
|
||||
// ppc_eabi_init
|
||||
|
|
|
|||
Loading…
Reference in New Issue