lbl_8034881C:
/* 8034881C  2C 03 00 00 */	cmpwi r3, 0
/* 80348820  41 80 00 38 */	blt lbl_80348858
/* 80348824  80 0D 91 E4 */	lwz r0, MaxEntryNum(r13)
/* 80348828  7C 03 00 40 */	cmplw r3, r0
/* 8034882C  40 80 00 2C */	bge lbl_80348858
/* 80348830  1C C3 00 0C */	mulli r6, r3, 0xc
/* 80348834  80 6D 91 DC */	lwz r3, FstStart(r13)
/* 80348838  7C 03 30 2E */	lwzx r0, r3, r6
/* 8034883C  54 00 00 0F */	rlwinm. r0, r0, 0, 0, 7
/* 80348840  40 82 00 0C */	bne lbl_8034884C
/* 80348844  38 00 00 00 */	li r0, 0
/* 80348848  48 00 00 08 */	b lbl_80348850
lbl_8034884C:
/* 8034884C  38 00 00 01 */	li r0, 1
lbl_80348850:
/* 80348850  2C 00 00 00 */	cmpwi r0, 0
/* 80348854  41 82 00 0C */	beq lbl_80348860
lbl_80348858:
/* 80348858  38 60 00 00 */	li r3, 0
/* 8034885C  4E 80 00 20 */	blr 
lbl_80348860:
/* 80348860  7C 63 32 14 */	add r3, r3, r6
/* 80348864  80 A3 00 04 */	lwz r5, 4(r3)
/* 80348868  38 00 00 00 */	li r0, 0
/* 8034886C  38 60 00 01 */	li r3, 1
/* 80348870  90 A4 00 30 */	stw r5, 0x30(r4)
/* 80348874  80 AD 91 DC */	lwz r5, FstStart(r13)
/* 80348878  7C A5 32 14 */	add r5, r5, r6
/* 8034887C  80 A5 00 08 */	lwz r5, 8(r5)
/* 80348880  90 A4 00 34 */	stw r5, 0x34(r4)
/* 80348884  90 04 00 38 */	stw r0, 0x38(r4)
/* 80348888  90 04 00 0C */	stw r0, 0xc(r4)
/* 8034888C  4E 80 00 20 */	blr