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https://github.com/zeldaret/tp
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da03a43cef
* add shield assets * add shieldD assets * add GCN US assets * add GCN JP asset enums * add GCN PAL asset enums * add WII asset enums * add WII Rev 2 asset enums * add all other files * change asset include directory to force "res/" prefix * remove wrong duplicate marks * Allow cpp files to reference arc enums * rename all resource files to not begin with "res_" * update res_arc tool to use argparse * remove Stage enums
46 lines
1.7 KiB
C
46 lines
1.7 KiB
C
#ifndef RES_DEMO32_03_H
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#define RES_DEMO32_03_H
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enum dRes_INDEX_DEMO32_03 {
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/* BCK */
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dRes_INDEX_DEMO32_03_BCK_DEMO32_GANON_CUT01_GP_1_O_e=0x8,
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dRes_INDEX_DEMO32_03_BCK_DEMO32_GANON_CUT02_GP_1_O_e=0x9,
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dRes_INDEX_DEMO32_03_BCK_DEMO32_GHORS_CUT01_GP_1_O_e=0xA,
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dRes_INDEX_DEMO32_03_BCK_DEMO32_GHORS_CUT02_GP_1_O_e=0xB,
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/* BMDR */
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dRes_INDEX_DEMO32_03_BMD_DEMO32_GHORS_CUT00_GP_1_e=0xE,
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dRes_INDEX_DEMO32_03_BMD_DEMO32_FIREBG_CUT00_GP_1_e=0xF,
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/* BTK */
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dRes_INDEX_DEMO32_03_BTK_DEMO32_FIREBG_CUT01_GP_1_O_e=0x12,
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dRes_INDEX_DEMO32_03_BTK_DEMO32_FIREBG_CUT02_GP_1_O_e=0x13,
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/* EVT */
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dRes_INDEX_DEMO32_03_STB_DEMO32_03_e=0x16,
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/* BMDV */
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dRes_INDEX_DEMO32_03_BMD_DEMO32_GANON_CUT00_GP_1_e=0x19,
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/* BRK */
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dRes_INDEX_DEMO32_03_BRK_DEMO32_GANON_CUT01_GP_1_O_e=0x1C,
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dRes_INDEX_DEMO32_03_BRK_DEMO32_GANON_CUT02_GP_1_O_e=0x1D,
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};
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enum dRes_ID_DEMO32_03 {
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/* BCK */
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dRes_ID_DEMO32_03_BCK_DEMO32_GANON_CUT01_GP_1_O_e=0x0,
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dRes_ID_DEMO32_03_BCK_DEMO32_GANON_CUT02_GP_1_O_e=0x1,
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dRes_ID_DEMO32_03_BCK_DEMO32_GHORS_CUT01_GP_1_O_e=0x2,
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dRes_ID_DEMO32_03_BCK_DEMO32_GHORS_CUT02_GP_1_O_e=0x3,
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/* BMDR */
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dRes_ID_DEMO32_03_BMD_DEMO32_GHORS_CUT00_GP_1_e=0x5,
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dRes_ID_DEMO32_03_BMD_DEMO32_FIREBG_CUT00_GP_1_e=0x6,
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/* BTK */
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dRes_ID_DEMO32_03_BTK_DEMO32_FIREBG_CUT01_GP_1_O_e=0x7,
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dRes_ID_DEMO32_03_BTK_DEMO32_FIREBG_CUT02_GP_1_O_e=0x8,
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/* EVT */
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dRes_ID_DEMO32_03_STB_DEMO32_03_e=0x9,
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/* BMDV */
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dRes_ID_DEMO32_03_BMD_DEMO32_GANON_CUT00_GP_1_e=0xA,
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/* BRK */
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dRes_ID_DEMO32_03_BRK_DEMO32_GANON_CUT01_GP_1_O_e=0xB,
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dRes_ID_DEMO32_03_BRK_DEMO32_GANON_CUT02_GP_1_O_e=0xC,
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};
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#endif /* !RES_DEMO32_03_H */ |