mirror of
https://github.com/zeldaret/tp
synced 2026-08-10 19:17:28 -04:00
lepelog
0cf65151b3
* split c_math * split c_angle * split c_API_controller_pad * split c_API_graphic * split c_bg_s_chk * c_bg_s_gnd_chk split * more c_bg split * split c_cc_d * delete asm * split c_cc_s * split c_lib * split c_m2d and c_m3d_g_aab * split c_m3d_g_cir * split c_m3d_g_cps * split rest of c_m3d_g * split c_m3d * split c_malloc * split c_request * split c_sxyz * split and partly decompile c_xyz * format * c_angle.h * begin c_angle decomp * c_angle * progress adding stub classes for SComponent * more c_m3d * remove some asm and format * more m3d headers * more c_angle decomp * c_lib headers * add public to classes * fix csXyz member names * c_sxyz partly OK * move Zero csXyz to c_sxyz header * c_API_graphic * delete some unused asm * move math extern data, decompile some functions * delete unused asm * fix duplicated c_angle.h * fix an inlined function name, add more inlined functions for c_angle.h (currently unused) * format Co-authored-by: Pheenoh <pheenoh@gmail.com>
60 lines
2.7 KiB
ArmAsm
60 lines
2.7 KiB
ArmAsm
/* 80264A94 002619D4 7C 65 1B 78 */ mr r5, r3
|
|
/* 80264A98 002619D8 38 80 00 00 */ li r4, 0
|
|
/* 80264A9C 002619DC 38 C3 04 00 */ addi r6, r3, 0x400
|
|
/* 80264AA0 002619E0 38 06 00 03 */ addi r0, r6, 3
|
|
/* 80264AA4 002619E4 7C 05 00 50 */ subf r0, r5, r0
|
|
/* 80264AA8 002619E8 54 00 F0 BE */ srwi r0, r0, 2
|
|
/* 80264AAC 002619EC 7C 09 03 A6 */ mtctr r0
|
|
/* 80264AB0 002619F0 7C 05 30 40 */ cmplw r5, r6
|
|
/* 80264AB4 002619F4 40 80 00 10 */ bge lbl_80264AC4
|
|
lbl_80264AB8:
|
|
/* 80264AB8 002619F8 90 85 00 00 */ stw r4, 0(r5)
|
|
/* 80264ABC 002619FC 38 A5 00 04 */ addi r5, r5, 4
|
|
/* 80264AC0 00261A00 42 00 FF F8 */ bdnz lbl_80264AB8
|
|
lbl_80264AC4:
|
|
/* 80264AC4 00261A04 38 80 00 00 */ li r4, 0
|
|
/* 80264AC8 00261A08 B0 83 28 00 */ sth r4, 0x2800(r3)
|
|
/* 80264ACC 00261A0C 38 A3 10 00 */ addi r5, r3, 0x1000
|
|
/* 80264AD0 00261A10 38 05 00 03 */ addi r0, r5, 3
|
|
/* 80264AD4 00261A14 7C 06 00 50 */ subf r0, r6, r0
|
|
/* 80264AD8 00261A18 54 00 F0 BE */ srwi r0, r0, 2
|
|
/* 80264ADC 00261A1C 7C 09 03 A6 */ mtctr r0
|
|
/* 80264AE0 00261A20 7C 06 28 40 */ cmplw r6, r5
|
|
/* 80264AE4 00261A24 40 80 00 10 */ bge lbl_80264AF4
|
|
lbl_80264AE8:
|
|
/* 80264AE8 00261A28 90 86 00 00 */ stw r4, 0(r6)
|
|
/* 80264AEC 00261A2C 38 C6 00 04 */ addi r6, r6, 4
|
|
/* 80264AF0 00261A30 42 00 FF F8 */ bdnz lbl_80264AE8
|
|
lbl_80264AF4:
|
|
/* 80264AF4 00261A34 38 80 00 00 */ li r4, 0
|
|
/* 80264AF8 00261A38 B0 83 28 02 */ sth r4, 0x2802(r3)
|
|
/* 80264AFC 00261A3C 38 C3 14 00 */ addi r6, r3, 0x1400
|
|
/* 80264B00 00261A40 38 06 00 03 */ addi r0, r6, 3
|
|
/* 80264B04 00261A44 7C 05 00 50 */ subf r0, r5, r0
|
|
/* 80264B08 00261A48 54 00 F0 BE */ srwi r0, r0, 2
|
|
/* 80264B0C 00261A4C 7C 09 03 A6 */ mtctr r0
|
|
/* 80264B10 00261A50 7C 05 30 40 */ cmplw r5, r6
|
|
/* 80264B14 00261A54 40 80 00 10 */ bge lbl_80264B24
|
|
lbl_80264B18:
|
|
/* 80264B18 00261A58 90 85 00 00 */ stw r4, 0(r5)
|
|
/* 80264B1C 00261A5C 38 A5 00 04 */ addi r5, r5, 4
|
|
/* 80264B20 00261A60 42 00 FF F8 */ bdnz lbl_80264B18
|
|
lbl_80264B24:
|
|
/* 80264B24 00261A64 38 A0 00 00 */ li r5, 0
|
|
/* 80264B28 00261A68 B0 A3 28 04 */ sth r5, 0x2804(r3)
|
|
/* 80264B2C 00261A6C 38 83 28 00 */ addi r4, r3, 0x2800
|
|
/* 80264B30 00261A70 38 04 00 03 */ addi r0, r4, 3
|
|
/* 80264B34 00261A74 7C 06 00 50 */ subf r0, r6, r0
|
|
/* 80264B38 00261A78 54 00 F0 BE */ srwi r0, r0, 2
|
|
/* 80264B3C 00261A7C 7C 09 03 A6 */ mtctr r0
|
|
/* 80264B40 00261A80 7C 06 20 40 */ cmplw r6, r4
|
|
/* 80264B44 00261A84 40 80 00 10 */ bge lbl_80264B54
|
|
lbl_80264B48:
|
|
/* 80264B48 00261A88 90 A6 00 00 */ stw r5, 0(r6)
|
|
/* 80264B4C 00261A8C 38 C6 00 04 */ addi r6, r6, 4
|
|
/* 80264B50 00261A90 42 00 FF F8 */ bdnz lbl_80264B48
|
|
lbl_80264B54:
|
|
/* 80264B54 00261A94 38 00 00 00 */ li r0, 0
|
|
/* 80264B58 00261A98 B0 03 28 06 */ sth r0, 0x2806(r3)
|
|
/* 80264B5C 00261A9C 4E 80 00 20 */ blr
|