mirror of
https://github.com/zeldaret/tp
synced 2026-08-04 01:03:47 -04:00
lepelog
0cf65151b3
* split c_math * split c_angle * split c_API_controller_pad * split c_API_graphic * split c_bg_s_chk * c_bg_s_gnd_chk split * more c_bg split * split c_cc_d * delete asm * split c_cc_s * split c_lib * split c_m2d and c_m3d_g_aab * split c_m3d_g_cir * split c_m3d_g_cps * split rest of c_m3d_g * split c_m3d * split c_malloc * split c_request * split c_sxyz * split and partly decompile c_xyz * format * c_angle.h * begin c_angle decomp * c_angle * progress adding stub classes for SComponent * more c_m3d * remove some asm and format * more m3d headers * more c_angle decomp * c_lib headers * add public to classes * fix csXyz member names * c_sxyz partly OK * move Zero csXyz to c_sxyz header * c_API_graphic * delete some unused asm * move math extern data, decompile some functions * delete unused asm * fix duplicated c_angle.h * fix an inlined function name, add more inlined functions for c_angle.h (currently unused) * format Co-authored-by: Pheenoh <pheenoh@gmail.com>
41 lines
1.9 KiB
ArmAsm
41 lines
1.9 KiB
ArmAsm
/* 80264C5C 00261B9C 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 80264C60 00261BA0 7C 08 02 A6 */ mflr r0
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/* 80264C64 00261BA4 90 01 00 14 */ stw r0, 0x14(r1)
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/* 80264C68 00261BA8 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 80264C6C 00261BAC 93 C1 00 08 */ stw r30, 8(r1)
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/* 80264C70 00261BB0 7C 7E 1B 78 */ mr r30, r3
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/* 80264C74 00261BB4 3B FE 10 00 */ addi r31, r30, 0x1000
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/* 80264C78 00261BB8 48 00 00 48 */ b lbl_80264CC0
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lbl_80264C7C:
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/* 80264C7C 00261BBC 80 7F 00 00 */ lwz r3, 0(r31)
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/* 80264C80 00261BC0 28 03 00 00 */ cmplwi r3, 0
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/* 80264C84 00261BC4 41 82 00 38 */ beq lbl_80264CBC
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/* 80264C88 00261BC8 81 83 00 3C */ lwz r12, 0x3c(r3)
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/* 80264C8C 00261BCC 81 8C 00 10 */ lwz r12, 0x10(r12)
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/* 80264C90 00261BD0 7D 89 03 A6 */ mtctr r12
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/* 80264C94 00261BD4 4E 80 04 21 */ bctrl
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/* 80264C98 00261BD8 81 83 00 3C */ lwz r12, 0x3c(r3)
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/* 80264C9C 00261BDC 81 8C 00 28 */ lwz r12, 0x28(r12)
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/* 80264CA0 00261BE0 7D 89 03 A6 */ mtctr r12
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/* 80264CA4 00261BE4 4E 80 04 21 */ bctrl
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/* 80264CA8 00261BE8 80 7F 00 00 */ lwz r3, 0(r31)
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/* 80264CAC 00261BEC 80 63 00 44 */ lwz r3, 0x44(r3)
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/* 80264CB0 00261BF0 28 03 00 00 */ cmplwi r3, 0
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/* 80264CB4 00261BF4 41 82 00 08 */ beq lbl_80264CBC
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/* 80264CB8 00261BF8 4B FF EC A5 */ bl ClrCcMove__9cCcD_SttsFv
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lbl_80264CBC:
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/* 80264CBC 00261BFC 3B FF 00 04 */ addi r31, r31, 4
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lbl_80264CC0:
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/* 80264CC0 00261C00 A0 1E 28 04 */ lhz r0, 0x2804(r30)
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/* 80264CC4 00261C04 54 03 10 3A */ slwi r3, r0, 2
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/* 80264CC8 00261C08 38 03 10 00 */ addi r0, r3, 0x1000
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/* 80264CCC 00261C0C 7C 1E 02 14 */ add r0, r30, r0
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/* 80264CD0 00261C10 7C 1F 00 40 */ cmplw r31, r0
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/* 80264CD4 00261C14 41 80 FF A8 */ blt lbl_80264C7C
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/* 80264CD8 00261C18 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 80264CDC 00261C1C 83 C1 00 08 */ lwz r30, 8(r1)
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/* 80264CE0 00261C20 80 01 00 14 */ lwz r0, 0x14(r1)
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/* 80264CE4 00261C24 7C 08 03 A6 */ mtlr r0
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/* 80264CE8 00261C28 38 21 00 10 */ addi r1, r1, 0x10
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/* 80264CEC 00261C2C 4E 80 00 20 */ blr
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