mirror of
https://github.com/zeldaret/tp
synced 2026-08-14 20:43:32 -04:00
lepelog
0cf65151b3
* split c_math * split c_angle * split c_API_controller_pad * split c_API_graphic * split c_bg_s_chk * c_bg_s_gnd_chk split * more c_bg split * split c_cc_d * delete asm * split c_cc_s * split c_lib * split c_m2d and c_m3d_g_aab * split c_m3d_g_cir * split c_m3d_g_cps * split rest of c_m3d_g * split c_m3d * split c_malloc * split c_request * split c_sxyz * split and partly decompile c_xyz * format * c_angle.h * begin c_angle decomp * c_angle * progress adding stub classes for SComponent * more c_m3d * remove some asm and format * more m3d headers * more c_angle decomp * c_lib headers * add public to classes * fix csXyz member names * c_sxyz partly OK * move Zero csXyz to c_sxyz header * c_API_graphic * delete some unused asm * move math extern data, decompile some functions * delete unused asm * fix duplicated c_angle.h * fix an inlined function name, add more inlined functions for c_angle.h (currently unused) * format Co-authored-by: Pheenoh <pheenoh@gmail.com>
77 lines
3.8 KiB
ArmAsm
77 lines
3.8 KiB
ArmAsm
/* 80265BB4 00262AF4 94 21 FF C0 */ stwu r1, -0x40(r1)
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/* 80265BB8 00262AF8 7C 08 02 A6 */ mflr r0
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/* 80265BBC 00262AFC 90 01 00 44 */ stw r0, 0x44(r1)
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/* 80265BC0 00262B00 39 61 00 40 */ addi r11, r1, 0x40
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/* 80265BC4 00262B04 48 0F C6 19 */ bl _savegpr_29
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/* 80265BC8 00262B08 7C 7F 1B 78 */ mr r31, r3
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/* 80265BCC 00262B0C 3C 60 80 3A */ lis r3, lbl_803A7218@ha
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/* 80265BD0 00262B10 38 03 72 18 */ addi r0, r3, lbl_803A7218@l
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/* 80265BD4 00262B14 90 01 00 20 */ stw r0, 0x20(r1)
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/* 80265BD8 00262B18 38 61 00 08 */ addi r3, r1, 8
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/* 80265BDC 00262B1C 48 00 91 1D */ bl ClearForMinMax__8cM3dGAabFv
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/* 80265BE0 00262B20 3B DF 14 00 */ addi r30, r31, 0x1400
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/* 80265BE4 00262B24 48 00 00 44 */ b lbl_80265C28
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lbl_80265BE8:
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/* 80265BE8 00262B28 80 7E 00 00 */ lwz r3, 0(r30)
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/* 80265BEC 00262B2C 28 03 00 00 */ cmplwi r3, 0
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/* 80265BF0 00262B30 41 82 00 34 */ beq lbl_80265C24
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/* 80265BF4 00262B34 81 83 00 3C */ lwz r12, 0x3c(r3)
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/* 80265BF8 00262B38 81 8C 00 18 */ lwz r12, 0x18(r12)
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/* 80265BFC 00262B3C 7D 89 03 A6 */ mtctr r12
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/* 80265C00 00262B40 4E 80 04 21 */ bctrl
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/* 80265C04 00262B44 7C 7D 1B 78 */ mr r29, r3
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/* 80265C08 00262B48 81 83 00 1C */ lwz r12, 0x1c(r3)
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/* 80265C0C 00262B4C 81 8C 00 4C */ lwz r12, 0x4c(r12)
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/* 80265C10 00262B50 7D 89 03 A6 */ mtctr r12
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/* 80265C14 00262B54 4E 80 04 21 */ bctrl
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/* 80265C18 00262B58 38 61 00 08 */ addi r3, r1, 8
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/* 80265C1C 00262B5C 7F A4 EB 78 */ mr r4, r29
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/* 80265C20 00262B60 48 00 91 41 */ bl SetMinMax__8cM3dGAabFRC8cM3dGAab
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lbl_80265C24:
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/* 80265C24 00262B64 3B DE 00 04 */ addi r30, r30, 4
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lbl_80265C28:
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/* 80265C28 00262B68 A0 1F 28 06 */ lhz r0, 0x2806(r31)
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/* 80265C2C 00262B6C 54 03 10 3A */ slwi r3, r0, 2
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/* 80265C30 00262B70 38 03 14 00 */ addi r0, r3, 0x1400
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/* 80265C34 00262B74 7C 1F 02 14 */ add r0, r31, r0
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/* 80265C38 00262B78 7C 1E 00 40 */ cmplw r30, r0
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/* 80265C3C 00262B7C 41 80 FF AC */ blt lbl_80265BE8
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/* 80265C40 00262B80 38 7F 28 08 */ addi r3, r31, 0x2808
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/* 80265C44 00262B84 38 81 00 08 */ addi r4, r1, 8
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/* 80265C48 00262B88 4B FF D7 61 */ bl SetArea__15cCcD_DivideAreaFRC8cM3dGAab
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/* 80265C4C 00262B8C 3B BF 14 00 */ addi r29, r31, 0x1400
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/* 80265C50 00262B90 48 00 00 40 */ b lbl_80265C90
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lbl_80265C54:
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/* 80265C54 00262B94 80 7D 00 00 */ lwz r3, 0(r29)
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/* 80265C58 00262B98 28 03 00 00 */ cmplwi r3, 0
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/* 80265C5C 00262B9C 41 82 00 30 */ beq lbl_80265C8C
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/* 80265C60 00262BA0 81 83 00 3C */ lwz r12, 0x3c(r3)
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/* 80265C64 00262BA4 81 8C 00 18 */ lwz r12, 0x18(r12)
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/* 80265C68 00262BA8 7D 89 03 A6 */ mtctr r12
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/* 80265C6C 00262BAC 4E 80 04 21 */ bctrl
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/* 80265C70 00262BB0 7C 65 1B 78 */ mr r5, r3
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/* 80265C74 00262BB4 80 7D 00 00 */ lwz r3, 0(r29)
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/* 80265C78 00262BB8 38 83 00 48 */ addi r4, r3, 0x48
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/* 80265C7C 00262BBC 80 03 00 40 */ lwz r0, 0x40(r3)
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/* 80265C80 00262BC0 54 06 07 BC */ rlwinm r6, r0, 0, 0x1e, 0x1e
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/* 80265C84 00262BC4 38 7F 28 08 */ addi r3, r31, 0x2808
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/* 80265C88 00262BC8 4B FF D8 4D */ bl CalcDivideInfo__15cCcD_DivideAreaFP15cCcD_DivideInfoRC8cM3dGAabUl
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lbl_80265C8C:
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/* 80265C8C 00262BCC 3B BD 00 04 */ addi r29, r29, 4
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lbl_80265C90:
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/* 80265C90 00262BD0 A0 1F 28 06 */ lhz r0, 0x2806(r31)
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/* 80265C94 00262BD4 54 03 10 3A */ slwi r3, r0, 2
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/* 80265C98 00262BD8 38 03 14 00 */ addi r0, r3, 0x1400
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/* 80265C9C 00262BDC 7C 1F 02 14 */ add r0, r31, r0
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/* 80265CA0 00262BE0 7C 1D 00 40 */ cmplw r29, r0
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/* 80265CA4 00262BE4 41 80 FF B0 */ blt lbl_80265C54
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/* 80265CA8 00262BE8 3C 60 80 3A */ lis r3, lbl_803A7218@ha
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/* 80265CAC 00262BEC 38 03 72 18 */ addi r0, r3, lbl_803A7218@l
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/* 80265CB0 00262BF0 90 01 00 20 */ stw r0, 0x20(r1)
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/* 80265CB4 00262BF4 39 61 00 40 */ addi r11, r1, 0x40
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/* 80265CB8 00262BF8 48 0F C5 71 */ bl _restgpr_29
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/* 80265CBC 00262BFC 80 01 00 44 */ lwz r0, 0x44(r1)
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/* 80265CC0 00262C00 7C 08 03 A6 */ mtlr r0
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/* 80265CC4 00262C04 38 21 00 40 */ addi r1, r1, 0x40
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/* 80265CC8 00262C08 4E 80 00 20 */ blr
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