mirror of
https://github.com/zeldaret/tp
synced 2026-08-17 05:22:00 -04:00
Julgodis
65 lines
2.4 KiB
ArmAsm
65 lines
2.4 KiB
ArmAsm
lbl_802DC74C:
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/* 802DC74C 94 21 FF E0 */ stwu r1, -0x20(r1)
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/* 802DC750 7C 08 02 A6 */ mflr r0
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/* 802DC754 90 01 00 24 */ stw r0, 0x24(r1)
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/* 802DC758 39 61 00 20 */ addi r11, r1, 0x20
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/* 802DC75C 48 08 5A 81 */ bl _savegpr_29
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/* 802DC760 7C 7D 1B 78 */ mr r29, r3
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/* 802DC764 7C 9E 23 78 */ mr r30, r4
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/* 802DC768 83 E3 00 0C */ lwz r31, 0xc(r3)
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/* 802DC76C 2C 05 00 01 */ cmpwi r5, 1
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/* 802DC770 41 82 00 48 */ beq lbl_802DC7B8
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/* 802DC774 40 80 00 10 */ bge lbl_802DC784
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/* 802DC778 2C 05 00 00 */ cmpwi r5, 0
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/* 802DC77C 40 80 00 14 */ bge lbl_802DC790
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/* 802DC780 48 00 00 40 */ b lbl_802DC7C0
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lbl_802DC784:
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/* 802DC784 2C 05 00 03 */ cmpwi r5, 3
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/* 802DC788 40 80 00 38 */ bge lbl_802DC7C0
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/* 802DC78C 48 00 00 0C */ b lbl_802DC798
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lbl_802DC790:
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/* 802DC790 93 DD 00 0C */ stw r30, 0xc(r29)
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/* 802DC794 48 00 00 2C */ b lbl_802DC7C0
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lbl_802DC798:
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/* 802DC798 80 7D 00 08 */ lwz r3, 8(r29)
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/* 802DC79C 81 83 00 00 */ lwz r12, 0(r3)
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/* 802DC7A0 81 8C 00 1C */ lwz r12, 0x1c(r12)
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/* 802DC7A4 7D 89 03 A6 */ mtctr r12
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/* 802DC7A8 4E 80 04 21 */ bctrl
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/* 802DC7AC 7C 1E 18 50 */ subf r0, r30, r3
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/* 802DC7B0 90 1D 00 0C */ stw r0, 0xc(r29)
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/* 802DC7B4 48 00 00 0C */ b lbl_802DC7C0
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lbl_802DC7B8:
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/* 802DC7B8 7C 1F F2 14 */ add r0, r31, r30
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/* 802DC7BC 90 1D 00 0C */ stw r0, 0xc(r29)
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lbl_802DC7C0:
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/* 802DC7C0 80 1D 00 0C */ lwz r0, 0xc(r29)
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/* 802DC7C4 2C 00 00 00 */ cmpwi r0, 0
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/* 802DC7C8 40 80 00 0C */ bge lbl_802DC7D4
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/* 802DC7CC 38 00 00 00 */ li r0, 0
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/* 802DC7D0 90 1D 00 0C */ stw r0, 0xc(r29)
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lbl_802DC7D4:
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/* 802DC7D4 80 7D 00 08 */ lwz r3, 8(r29)
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/* 802DC7D8 81 83 00 00 */ lwz r12, 0(r3)
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/* 802DC7DC 81 8C 00 1C */ lwz r12, 0x1c(r12)
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/* 802DC7E0 7D 89 03 A6 */ mtctr r12
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/* 802DC7E4 4E 80 04 21 */ bctrl
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/* 802DC7E8 80 1D 00 0C */ lwz r0, 0xc(r29)
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/* 802DC7EC 7C 00 18 00 */ cmpw r0, r3
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/* 802DC7F0 40 81 00 1C */ ble lbl_802DC80C
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/* 802DC7F4 80 7D 00 08 */ lwz r3, 8(r29)
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/* 802DC7F8 81 83 00 00 */ lwz r12, 0(r3)
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/* 802DC7FC 81 8C 00 1C */ lwz r12, 0x1c(r12)
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/* 802DC800 7D 89 03 A6 */ mtctr r12
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/* 802DC804 4E 80 04 21 */ bctrl
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/* 802DC808 90 7D 00 0C */ stw r3, 0xc(r29)
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lbl_802DC80C:
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/* 802DC80C 80 1D 00 0C */ lwz r0, 0xc(r29)
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/* 802DC810 7C 7F 00 50 */ subf r3, r31, r0
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/* 802DC814 39 61 00 20 */ addi r11, r1, 0x20
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/* 802DC818 48 08 5A 11 */ bl _restgpr_29
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/* 802DC81C 80 01 00 24 */ lwz r0, 0x24(r1)
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/* 802DC820 7C 08 03 A6 */ mtlr r0
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/* 802DC824 38 21 00 20 */ addi r1, r1, 0x20
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/* 802DC828 4E 80 00 20 */ blr
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