mirror of
https://github.com/zeldaret/tp
synced 2026-06-17 07:08:04 -04:00
lepelog
0cf65151b3
* split c_math * split c_angle * split c_API_controller_pad * split c_API_graphic * split c_bg_s_chk * c_bg_s_gnd_chk split * more c_bg split * split c_cc_d * delete asm * split c_cc_s * split c_lib * split c_m2d and c_m3d_g_aab * split c_m3d_g_cir * split c_m3d_g_cps * split rest of c_m3d_g * split c_m3d * split c_malloc * split c_request * split c_sxyz * split and partly decompile c_xyz * format * c_angle.h * begin c_angle decomp * c_angle * progress adding stub classes for SComponent * more c_m3d * remove some asm and format * more m3d headers * more c_angle decomp * c_lib headers * add public to classes * fix csXyz member names * c_sxyz partly OK * move Zero csXyz to c_sxyz header * c_API_graphic * delete some unused asm * move math extern data, decompile some functions * delete unused asm * fix duplicated c_angle.h * fix an inlined function name, add more inlined functions for c_angle.h (currently unused) * format Co-authored-by: Pheenoh <pheenoh@gmail.com>
38 lines
2.0 KiB
ArmAsm
38 lines
2.0 KiB
ArmAsm
/* 80263C04 00260B44 94 21 FF C0 */ stwu r1, -0x40(r1)
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/* 80263C08 00260B48 7C 08 02 A6 */ mflr r0
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/* 80263C0C 00260B4C 90 01 00 44 */ stw r0, 0x44(r1)
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/* 80263C10 00260B50 93 E1 00 3C */ stw r31, 0x3c(r1)
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/* 80263C14 00260B54 7C 7F 1B 78 */ mr r31, r3
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/* 80263C18 00260B58 48 00 B0 E1 */ bl ClearForMinMax__8cM3dGAabFv
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/* 80263C1C 00260B5C C0 1F 00 34 */ lfs f0, 0x34(r31)
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/* 80263C20 00260B60 D0 01 00 20 */ stfs f0, 0x20(r1)
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/* 80263C24 00260B64 C0 1F 00 38 */ lfs f0, 0x38(r31)
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/* 80263C28 00260B68 D0 01 00 24 */ stfs f0, 0x24(r1)
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/* 80263C2C 00260B6C C0 1F 00 3C */ lfs f0, 0x3c(r31)
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/* 80263C30 00260B70 D0 01 00 28 */ stfs f0, 0x28(r1)
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/* 80263C34 00260B74 7F E3 FB 78 */ mr r3, r31
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/* 80263C38 00260B78 38 81 00 20 */ addi r4, r1, 0x20
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/* 80263C3C 00260B7C 48 00 B0 E1 */ bl SetMinMax__8cM3dGAabFRC4cXyz
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/* 80263C40 00260B80 C0 1F 00 40 */ lfs f0, 0x40(r31)
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/* 80263C44 00260B84 D0 01 00 14 */ stfs f0, 0x14(r1)
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/* 80263C48 00260B88 C0 1F 00 44 */ lfs f0, 0x44(r31)
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/* 80263C4C 00260B8C D0 01 00 18 */ stfs f0, 0x18(r1)
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/* 80263C50 00260B90 C0 1F 00 48 */ lfs f0, 0x48(r31)
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/* 80263C54 00260B94 D0 01 00 1C */ stfs f0, 0x1c(r1)
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/* 80263C58 00260B98 7F E3 FB 78 */ mr r3, r31
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/* 80263C5C 00260B9C 38 81 00 14 */ addi r4, r1, 0x14
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/* 80263C60 00260BA0 48 00 B0 BD */ bl SetMinMax__8cM3dGAabFRC4cXyz
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/* 80263C64 00260BA4 C0 1F 00 4C */ lfs f0, 0x4c(r31)
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/* 80263C68 00260BA8 D0 01 00 08 */ stfs f0, 8(r1)
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/* 80263C6C 00260BAC C0 1F 00 50 */ lfs f0, 0x50(r31)
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/* 80263C70 00260BB0 D0 01 00 0C */ stfs f0, 0xc(r1)
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/* 80263C74 00260BB4 C0 1F 00 54 */ lfs f0, 0x54(r31)
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/* 80263C78 00260BB8 D0 01 00 10 */ stfs f0, 0x10(r1)
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/* 80263C7C 00260BBC 7F E3 FB 78 */ mr r3, r31
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/* 80263C80 00260BC0 38 81 00 08 */ addi r4, r1, 8
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/* 80263C84 00260BC4 48 00 B0 99 */ bl SetMinMax__8cM3dGAabFRC4cXyz
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/* 80263C88 00260BC8 83 E1 00 3C */ lwz r31, 0x3c(r1)
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/* 80263C8C 00260BCC 80 01 00 44 */ lwz r0, 0x44(r1)
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/* 80263C90 00260BD0 7C 08 03 A6 */ mtlr r0
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/* 80263C94 00260BD4 38 21 00 40 */ addi r1, r1, 0x40
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/* 80263C98 00260BD8 4E 80 00 20 */ blr |