mirror of
https://github.com/zeldaret/tp
synced 2026-08-30 01:20:14 -04:00
Jonathan Wase
86f892c3d3
* JKRDvdArchive.s split * JKRMemArchive.s split * JKRAramArchive.s split * JKRCompArchive.s split * JKRDecomp.s split * JKRDvdRipper.s split * JKRAramBlock.s split * JKRAramHeap.s split * JKRAramPiece.s split * JKRAramStream.s split * removed unused .s files * JKRDvdAramRipper.s split * JKRAram.s split * cleanup and making vtables easier to debug * fixed merge errors * fixed JKRFileLoader::fetchVolumeName Co-authored-by: Pheenoh <pheenoh@gmail.com>
81 lines
3.9 KiB
ArmAsm
81 lines
3.9 KiB
ArmAsm
/* fetchResource__14JKRAramArchiveFPQ210JKRArchive12SDIFileEntryPUl __ct__14JKRAramArchiveFlQ210JKRArchive15EMountDirection::fetchResource(JKRArchive::SDIFileEntry *, unsigned long *) */
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/* missing reference */
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/* 802D75E0 002D4520 94 21 FF E0 */ stwu r1, -0x20(r1)
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/* 802D75E4 002D4524 7C 08 02 A6 */ mflr r0
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/* 802D75E8 002D4528 90 01 00 24 */ stw r0, 0x24(r1)
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/* 802D75EC 002D452C 39 61 00 20 */ addi r11, r1, 0x20
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/* 802D75F0 002D4530 48 08 AB E9 */ bl _savegpr_28
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/* 802D75F4 002D4534 7C 7C 1B 78 */ mr r28, r3
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/* 802D75F8 002D4538 7C 9D 23 78 */ mr r29, r4
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/* 802D75FC 002D453C 7C BE 2B 79 */ or. r30, r5, r5
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/* 802D7600 002D4540 40 82 00 08 */ bne lbl_802D7608
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/* 802D7604 002D4544 3B C1 00 0C */ addi r30, r1, 0xc
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lbl_802D7608:
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/* 802D7608 002D4548 80 1D 00 04 */ lwz r0, 4(r29)
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/* 802D760C 002D454C 54 03 46 3E */ srwi r3, r0, 0x18
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/* 802D7610 002D4550 54 00 47 7B */ rlwinm. r0, r0, 8, 0x1d, 0x1d
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/* 802D7614 002D4554 40 82 00 0C */ bne lbl_802D7620
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/* 802D7618 002D4558 3B E0 00 00 */ li r31, 0
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/* 802D761C 002D455C 48 00 00 18 */ b lbl_802D7634
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lbl_802D7620:
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/* 802D7620 002D4560 54 60 06 31 */ rlwinm. r0, r3, 0, 0x18, 0x18
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/* 802D7624 002D4564 41 82 00 0C */ beq lbl_802D7630
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/* 802D7628 002D4568 3B E0 00 02 */ li r31, 2
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/* 802D762C 002D456C 48 00 00 08 */ b lbl_802D7634
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lbl_802D7630:
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/* 802D7630 002D4570 3B E0 00 01 */ li r31, 1
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lbl_802D7634:
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/* 802D7634 002D4574 80 1D 00 10 */ lwz r0, 0x10(r29)
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/* 802D7638 002D4578 28 00 00 00 */ cmplwi r0, 0
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/* 802D763C 002D457C 40 82 00 6C */ bne lbl_802D76A8
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/* 802D7640 002D4580 80 7C 00 64 */ lwz r3, 0x64(r28)
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/* 802D7644 002D4584 80 63 00 14 */ lwz r3, 0x14(r3)
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/* 802D7648 002D4588 80 1D 00 08 */ lwz r0, 8(r29)
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/* 802D764C 002D458C 7C 60 1A 14 */ add r3, r0, r3
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/* 802D7650 002D4590 80 9D 00 0C */ lwz r4, 0xc(r29)
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/* 802D7654 002D4594 80 BC 00 38 */ lwz r5, 0x38(r28)
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/* 802D7658 002D4598 7F E6 FB 78 */ mr r6, r31
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/* 802D765C 002D459C 38 E1 00 08 */ addi r7, r1, 8
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/* 802D7660 002D45A0 48 00 02 B5 */ bl fetchResource_subroutine__14JKRAramArchiveFUlUlP7JKRHeapiPPUc
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/* 802D7664 002D45A4 90 7E 00 00 */ stw r3, 0(r30)
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/* 802D7668 002D45A8 28 03 00 00 */ cmplwi r3, 0
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/* 802D766C 002D45AC 40 82 00 0C */ bne lbl_802D7678
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/* 802D7670 002D45B0 38 60 00 00 */ li r3, 0
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/* 802D7674 002D45B4 48 00 00 68 */ b lbl_802D76DC
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lbl_802D7678:
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/* 802D7678 002D45B8 80 01 00 08 */ lwz r0, 8(r1)
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/* 802D767C 002D45BC 90 1D 00 10 */ stw r0, 0x10(r29)
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/* 802D7680 002D45C0 2C 1F 00 02 */ cmpwi r31, 2
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/* 802D7684 002D45C4 40 82 00 54 */ bne lbl_802D76D8
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/* 802D7688 002D45C8 7F 83 E3 78 */ mr r3, r28
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/* 802D768C 002D45CC 7F A4 EB 78 */ mr r4, r29
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/* 802D7690 002D45D0 80 BE 00 00 */ lwz r5, 0(r30)
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/* 802D7694 002D45D4 81 9C 00 00 */ lwz r12, 0(r28)
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/* 802D7698 002D45D8 81 8C 00 48 */ lwz r12, 0x48(r12)
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/* 802D769C 002D45DC 7D 89 03 A6 */ mtctr r12
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/* 802D76A0 002D45E0 4E 80 04 21 */ bctrl
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/* 802D76A4 002D45E4 48 00 00 34 */ b lbl_802D76D8
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lbl_802D76A8:
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/* 802D76A8 002D45E8 2C 1F 00 02 */ cmpwi r31, 2
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/* 802D76AC 002D45EC 40 82 00 24 */ bne lbl_802D76D0
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/* 802D76B0 002D45F0 7F 83 E3 78 */ mr r3, r28
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/* 802D76B4 002D45F4 7F A4 EB 78 */ mr r4, r29
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/* 802D76B8 002D45F8 81 9C 00 00 */ lwz r12, 0(r28)
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/* 802D76BC 002D45FC 81 8C 00 4C */ lwz r12, 0x4c(r12)
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/* 802D76C0 002D4600 7D 89 03 A6 */ mtctr r12
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/* 802D76C4 002D4604 4E 80 04 21 */ bctrl
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/* 802D76C8 002D4608 90 7E 00 00 */ stw r3, 0(r30)
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/* 802D76CC 002D460C 48 00 00 0C */ b lbl_802D76D8
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lbl_802D76D0:
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/* 802D76D0 002D4610 80 1D 00 0C */ lwz r0, 0xc(r29)
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/* 802D76D4 002D4614 90 1E 00 00 */ stw r0, 0(r30)
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lbl_802D76D8:
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/* 802D76D8 002D4618 80 7D 00 10 */ lwz r3, 0x10(r29)
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lbl_802D76DC:
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/* 802D76DC 002D461C 39 61 00 20 */ addi r11, r1, 0x20
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/* 802D76E0 002D4620 48 08 AB 45 */ bl _restgpr_28
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/* 802D76E4 002D4624 80 01 00 24 */ lwz r0, 0x24(r1)
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/* 802D76E8 002D4628 7C 08 03 A6 */ mtlr r0
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/* 802D76EC 002D462C 38 21 00 20 */ addi r1, r1, 0x20
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/* 802D76F0 002D4630 4E 80 00 20 */ blr
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