mirror of
https://github.com/zeldaret/tp
synced 2026-08-28 16:52:00 -04:00
Erin Moon
2dddd746a6
* d_attention.cpp: split * clang-format + add back in dropped labels Co-authored-by: Pheenoh <pheenoh@gmail.com>
134 lines
7.0 KiB
ArmAsm
134 lines
7.0 KiB
ArmAsm
/* 80072DD8 0006FD18 94 21 FF D0 */ stwu r1, -0x30(r1)
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/* 80072DDC 0006FD1C 98 83 01 70 */ stb r4, 0x170(r3)
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/* 80072DE0 0006FD20 88 03 01 70 */ lbz r0, 0x170(r3)
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/* 80072DE4 0006FD24 1C 80 00 1C */ mulli r4, r0, 0x1c
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/* 80072DE8 0006FD28 38 A4 00 08 */ addi r5, r4, 8
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/* 80072DEC 0006FD2C 7C A3 2A 14 */ add r5, r3, r5
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/* 80072DF0 0006FD30 A8 05 00 06 */ lha r0, 6(r5)
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/* 80072DF4 0006FD34 C8 62 8C 70 */ lfd f3, lbl_80452670-_SDA2_BASE_(r2)
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/* 80072DF8 0006FD38 6C 00 80 00 */ xoris r0, r0, 0x8000
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/* 80072DFC 0006FD3C 90 01 00 0C */ stw r0, 0xc(r1)
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/* 80072E00 0006FD40 3C 80 43 30 */ lis r4, 0x4330
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/* 80072E04 0006FD44 90 81 00 08 */ stw r4, 8(r1)
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/* 80072E08 0006FD48 C8 01 00 08 */ lfd f0, 8(r1)
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/* 80072E0C 0006FD4C EC 00 18 28 */ fsubs f0, f0, f3
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/* 80072E10 0006FD50 D0 05 00 10 */ stfs f0, 0x10(r5)
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/* 80072E14 0006FD54 C0 42 8C 58 */ lfs f2, lbl_80452658-_SDA2_BASE_(r2)
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/* 80072E18 0006FD58 D0 45 00 0C */ stfs f2, 0xc(r5)
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/* 80072E1C 0006FD5C 38 00 00 00 */ li r0, 0
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/* 80072E20 0006FD60 98 05 00 05 */ stb r0, 5(r5)
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/* 80072E24 0006FD64 88 A3 01 70 */ lbz r5, 0x170(r3)
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/* 80072E28 0006FD68 1C A5 00 1C */ mulli r5, r5, 0x1c
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/* 80072E2C 0006FD6C 38 A5 00 14 */ addi r5, r5, 0x14
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/* 80072E30 0006FD70 7C 23 2D 2E */ stfsx f1, r3, r5
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/* 80072E34 0006FD74 88 A3 01 70 */ lbz r5, 0x170(r3)
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/* 80072E38 0006FD78 1C A5 00 18 */ mulli r5, r5, 0x18
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/* 80072E3C 0006FD7C 38 C5 00 40 */ addi r6, r5, 0x40
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/* 80072E40 0006FD80 7C C3 32 14 */ add r6, r3, r6
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/* 80072E44 0006FD84 A8 A6 00 06 */ lha r5, 6(r6)
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/* 80072E48 0006FD88 6C A5 80 00 */ xoris r5, r5, 0x8000
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/* 80072E4C 0006FD8C 90 A1 00 14 */ stw r5, 0x14(r1)
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/* 80072E50 0006FD90 90 81 00 10 */ stw r4, 0x10(r1)
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/* 80072E54 0006FD94 C8 01 00 10 */ lfd f0, 0x10(r1)
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/* 80072E58 0006FD98 EC 00 18 28 */ fsubs f0, f0, f3
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/* 80072E5C 0006FD9C D0 06 00 10 */ stfs f0, 0x10(r6)
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/* 80072E60 0006FDA0 D0 46 00 0C */ stfs f2, 0xc(r6)
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/* 80072E64 0006FDA4 98 06 00 05 */ stb r0, 5(r6)
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/* 80072E68 0006FDA8 88 A3 01 70 */ lbz r5, 0x170(r3)
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/* 80072E6C 0006FDAC 1C A5 00 18 */ mulli r5, r5, 0x18
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/* 80072E70 0006FDB0 38 A5 00 4C */ addi r5, r5, 0x4c
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/* 80072E74 0006FDB4 7C 23 2D 2E */ stfsx f1, r3, r5
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/* 80072E78 0006FDB8 88 A3 01 70 */ lbz r5, 0x170(r3)
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/* 80072E7C 0006FDBC 1C A5 00 18 */ mulli r5, r5, 0x18
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/* 80072E80 0006FDC0 38 C5 00 70 */ addi r6, r5, 0x70
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/* 80072E84 0006FDC4 7C C3 32 14 */ add r6, r3, r6
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/* 80072E88 0006FDC8 A8 A6 00 06 */ lha r5, 6(r6)
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/* 80072E8C 0006FDCC 6C A5 80 00 */ xoris r5, r5, 0x8000
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/* 80072E90 0006FDD0 90 A1 00 1C */ stw r5, 0x1c(r1)
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/* 80072E94 0006FDD4 90 81 00 18 */ stw r4, 0x18(r1)
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/* 80072E98 0006FDD8 C8 01 00 18 */ lfd f0, 0x18(r1)
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/* 80072E9C 0006FDDC EC 00 18 28 */ fsubs f0, f0, f3
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/* 80072EA0 0006FDE0 D0 06 00 10 */ stfs f0, 0x10(r6)
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/* 80072EA4 0006FDE4 D0 46 00 0C */ stfs f2, 0xc(r6)
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/* 80072EA8 0006FDE8 98 06 00 05 */ stb r0, 5(r6)
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/* 80072EAC 0006FDEC 88 A3 01 70 */ lbz r5, 0x170(r3)
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/* 80072EB0 0006FDF0 1C A5 00 18 */ mulli r5, r5, 0x18
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/* 80072EB4 0006FDF4 38 A5 00 7C */ addi r5, r5, 0x7c
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/* 80072EB8 0006FDF8 7C 23 2D 2E */ stfsx f1, r3, r5
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/* 80072EBC 0006FDFC 88 A3 01 70 */ lbz r5, 0x170(r3)
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/* 80072EC0 0006FE00 1C A5 00 18 */ mulli r5, r5, 0x18
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/* 80072EC4 0006FE04 38 C5 00 A0 */ addi r6, r5, 0xa0
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/* 80072EC8 0006FE08 7C C3 32 14 */ add r6, r3, r6
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/* 80072ECC 0006FE0C A8 A6 00 06 */ lha r5, 6(r6)
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/* 80072ED0 0006FE10 6C A5 80 00 */ xoris r5, r5, 0x8000
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/* 80072ED4 0006FE14 90 A1 00 24 */ stw r5, 0x24(r1)
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/* 80072ED8 0006FE18 90 81 00 20 */ stw r4, 0x20(r1)
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/* 80072EDC 0006FE1C C8 01 00 20 */ lfd f0, 0x20(r1)
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/* 80072EE0 0006FE20 EC 00 18 28 */ fsubs f0, f0, f3
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/* 80072EE4 0006FE24 D0 06 00 10 */ stfs f0, 0x10(r6)
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/* 80072EE8 0006FE28 D0 46 00 0C */ stfs f2, 0xc(r6)
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/* 80072EEC 0006FE2C 98 06 00 05 */ stb r0, 5(r6)
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/* 80072EF0 0006FE30 88 A3 01 70 */ lbz r5, 0x170(r3)
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/* 80072EF4 0006FE34 1C A5 00 18 */ mulli r5, r5, 0x18
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/* 80072EF8 0006FE38 38 A5 00 AC */ addi r5, r5, 0xac
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/* 80072EFC 0006FE3C 7C 23 2D 2E */ stfsx f1, r3, r5
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/* 80072F00 0006FE40 88 A3 01 70 */ lbz r5, 0x170(r3)
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/* 80072F04 0006FE44 1C A5 00 18 */ mulli r5, r5, 0x18
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/* 80072F08 0006FE48 38 C5 00 D0 */ addi r6, r5, 0xd0
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/* 80072F0C 0006FE4C 7C C3 32 14 */ add r6, r3, r6
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/* 80072F10 0006FE50 A8 A6 00 06 */ lha r5, 6(r6)
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/* 80072F14 0006FE54 6C A5 80 00 */ xoris r5, r5, 0x8000
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/* 80072F18 0006FE58 90 A1 00 2C */ stw r5, 0x2c(r1)
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/* 80072F1C 0006FE5C 90 81 00 28 */ stw r4, 0x28(r1)
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/* 80072F20 0006FE60 C8 01 00 28 */ lfd f0, 0x28(r1)
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/* 80072F24 0006FE64 EC 00 18 28 */ fsubs f0, f0, f3
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/* 80072F28 0006FE68 D0 06 00 10 */ stfs f0, 0x10(r6)
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/* 80072F2C 0006FE6C D0 46 00 0C */ stfs f2, 0xc(r6)
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/* 80072F30 0006FE70 98 06 00 05 */ stb r0, 5(r6)
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/* 80072F34 0006FE74 88 A3 01 70 */ lbz r5, 0x170(r3)
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/* 80072F38 0006FE78 1C A5 00 18 */ mulli r5, r5, 0x18
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/* 80072F3C 0006FE7C 38 A5 00 DC */ addi r5, r5, 0xdc
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/* 80072F40 0006FE80 7C 23 2D 2E */ stfsx f1, r3, r5
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/* 80072F44 0006FE84 88 A3 01 70 */ lbz r5, 0x170(r3)
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/* 80072F48 0006FE88 28 05 00 01 */ cmplwi r5, 1
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/* 80072F4C 0006FE8C 40 82 00 94 */ bne lbl_80072FE0
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/* 80072F50 0006FE90 A8 A3 01 06 */ lha r5, 0x106(r3)
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/* 80072F54 0006FE94 6C A5 80 00 */ xoris r5, r5, 0x8000
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/* 80072F58 0006FE98 90 A1 00 2C */ stw r5, 0x2c(r1)
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/* 80072F5C 0006FE9C 90 81 00 28 */ stw r4, 0x28(r1)
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/* 80072F60 0006FEA0 C8 01 00 28 */ lfd f0, 0x28(r1)
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/* 80072F64 0006FEA4 EC 00 18 28 */ fsubs f0, f0, f3
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/* 80072F68 0006FEA8 D0 03 01 10 */ stfs f0, 0x110(r3)
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/* 80072F6C 0006FEAC D0 43 01 0C */ stfs f2, 0x10c(r3)
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/* 80072F70 0006FEB0 98 03 01 05 */ stb r0, 0x105(r3)
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/* 80072F74 0006FEB4 A8 A3 01 22 */ lha r5, 0x122(r3)
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/* 80072F78 0006FEB8 6C A5 80 00 */ xoris r5, r5, 0x8000
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/* 80072F7C 0006FEBC 90 A1 00 24 */ stw r5, 0x24(r1)
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/* 80072F80 0006FEC0 90 81 00 20 */ stw r4, 0x20(r1)
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/* 80072F84 0006FEC4 C8 01 00 20 */ lfd f0, 0x20(r1)
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/* 80072F88 0006FEC8 EC 00 18 28 */ fsubs f0, f0, f3
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/* 80072F8C 0006FECC D0 03 01 2C */ stfs f0, 0x12c(r3)
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/* 80072F90 0006FED0 D0 43 01 28 */ stfs f2, 0x128(r3)
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/* 80072F94 0006FED4 98 03 01 21 */ stb r0, 0x121(r3)
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/* 80072F98 0006FED8 A8 A3 01 3A */ lha r5, 0x13a(r3)
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/* 80072F9C 0006FEDC 6C A5 80 00 */ xoris r5, r5, 0x8000
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/* 80072FA0 0006FEE0 90 A1 00 1C */ stw r5, 0x1c(r1)
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/* 80072FA4 0006FEE4 90 81 00 18 */ stw r4, 0x18(r1)
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/* 80072FA8 0006FEE8 C8 01 00 18 */ lfd f0, 0x18(r1)
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/* 80072FAC 0006FEEC EC 00 18 28 */ fsubs f0, f0, f3
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/* 80072FB0 0006FEF0 D0 03 01 44 */ stfs f0, 0x144(r3)
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/* 80072FB4 0006FEF4 D0 43 01 40 */ stfs f2, 0x140(r3)
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/* 80072FB8 0006FEF8 98 03 01 39 */ stb r0, 0x139(r3)
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/* 80072FBC 0006FEFC A8 A3 01 52 */ lha r5, 0x152(r3)
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/* 80072FC0 0006FF00 6C A5 80 00 */ xoris r5, r5, 0x8000
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/* 80072FC4 0006FF04 90 A1 00 14 */ stw r5, 0x14(r1)
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/* 80072FC8 0006FF08 90 81 00 10 */ stw r4, 0x10(r1)
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/* 80072FCC 0006FF0C C8 01 00 10 */ lfd f0, 0x10(r1)
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/* 80072FD0 0006FF10 EC 00 18 28 */ fsubs f0, f0, f3
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/* 80072FD4 0006FF14 D0 03 01 5C */ stfs f0, 0x15c(r3)
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/* 80072FD8 0006FF18 D0 43 01 58 */ stfs f2, 0x158(r3)
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/* 80072FDC 0006FF1C 98 03 01 51 */ stb r0, 0x151(r3)
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lbl_80072FE0:
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/* 80072FE0 0006FF20 38 21 00 30 */ addi r1, r1, 0x30
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/* 80072FE4 0006FF24 4E 80 00 20 */ blr
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