mirror of
https://github.com/zeldaret/tp
synced 2026-09-07 03:10:11 -04:00
Julgodis
76 lines
3.1 KiB
ArmAsm
76 lines
3.1 KiB
ArmAsm
lbl_80353414:
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/* 80353414 7C 08 02 A6 */ mflr r0
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/* 80353418 2C 04 00 00 */ cmpwi r4, 0
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/* 8035341C 90 01 00 04 */ stw r0, 4(r1)
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/* 80353420 94 21 FF E8 */ stwu r1, -0x18(r1)
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/* 80353424 93 E1 00 14 */ stw r31, 0x14(r1)
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/* 80353428 3B E3 00 00 */ addi r31, r3, 0
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/* 8035342C 1C BF 01 10 */ mulli r5, r31, 0x110
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/* 80353430 93 C1 00 10 */ stw r30, 0x10(r1)
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/* 80353434 3C 60 80 45 */ lis r3, __CARDBlock@ha /* 0x8044CBC0@ha */
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/* 80353438 38 03 CB C0 */ addi r0, r3, __CARDBlock@l /* 0x8044CBC0@l */
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/* 8035343C 7F C0 2A 14 */ add r30, r0, r5
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/* 80353440 41 80 00 48 */ blt lbl_80353488
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/* 80353444 3C 60 80 35 */ lis r3, UnlockedCallback@ha /* 0x80353414@ha */
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/* 80353448 38 03 34 14 */ addi r0, r3, UnlockedCallback@l /* 0x80353414@l */
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/* 8035344C 3C 60 80 35 */ lis r3, __CARDUnlockedHandler@ha /* 0x80352D00@ha */
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/* 80353450 90 1E 00 DC */ stw r0, 0xdc(r30)
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/* 80353454 38 A3 2D 00 */ addi r5, r3, __CARDUnlockedHandler@l /* 0x80352D00@l */
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/* 80353458 38 7F 00 00 */ addi r3, r31, 0
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/* 8035345C 38 80 00 00 */ li r4, 0
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/* 80353460 4B FF 0B C9 */ bl EXILock
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/* 80353464 2C 03 00 00 */ cmpwi r3, 0
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/* 80353468 40 82 00 0C */ bne lbl_80353474
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/* 8035346C 38 80 00 00 */ li r4, 0
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/* 80353470 48 00 00 18 */ b lbl_80353488
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lbl_80353474:
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/* 80353474 38 00 00 00 */ li r0, 0
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/* 80353478 90 1E 00 DC */ stw r0, 0xdc(r30)
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/* 8035347C 7F E3 FB 78 */ mr r3, r31
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/* 80353480 4B FF FC F5 */ bl Retry
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/* 80353484 7C 64 1B 78 */ mr r4, r3
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lbl_80353488:
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/* 80353488 2C 04 00 00 */ cmpwi r4, 0
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/* 8035348C 40 80 00 80 */ bge lbl_8035350C
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/* 80353490 88 1E 00 94 */ lbz r0, 0x94(r30)
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/* 80353494 2C 00 00 F3 */ cmpwi r0, 0xf3
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/* 80353498 41 82 00 74 */ beq lbl_8035350C
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/* 8035349C 40 80 00 1C */ bge lbl_803534B8
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/* 803534A0 2C 00 00 52 */ cmpwi r0, 0x52
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/* 803534A4 41 82 00 20 */ beq lbl_803534C4
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/* 803534A8 41 80 00 64 */ blt lbl_8035350C
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/* 803534AC 2C 00 00 F1 */ cmpwi r0, 0xf1
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/* 803534B0 40 80 00 3C */ bge lbl_803534EC
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/* 803534B4 48 00 00 58 */ b lbl_8035350C
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lbl_803534B8:
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/* 803534B8 2C 00 00 F5 */ cmpwi r0, 0xf5
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/* 803534BC 40 80 00 50 */ bge lbl_8035350C
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/* 803534C0 48 00 00 2C */ b lbl_803534EC
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lbl_803534C4:
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/* 803534C4 80 1E 00 C8 */ lwz r0, 0xc8(r30)
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/* 803534C8 28 00 00 00 */ cmplwi r0, 0
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/* 803534CC 7C 0C 03 78 */ mr r12, r0
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/* 803534D0 41 82 00 3C */ beq lbl_8035350C
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/* 803534D4 38 00 00 00 */ li r0, 0
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/* 803534D8 7D 88 03 A6 */ mtlr r12
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/* 803534DC 90 1E 00 C8 */ stw r0, 0xc8(r30)
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/* 803534E0 7F E3 FB 78 */ mr r3, r31
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/* 803534E4 4E 80 00 21 */ blrl
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/* 803534E8 48 00 00 24 */ b lbl_8035350C
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lbl_803534EC:
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/* 803534EC 81 9E 00 CC */ lwz r12, 0xcc(r30)
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/* 803534F0 28 0C 00 00 */ cmplwi r12, 0
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/* 803534F4 41 82 00 18 */ beq lbl_8035350C
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/* 803534F8 38 00 00 00 */ li r0, 0
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/* 803534FC 7D 88 03 A6 */ mtlr r12
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/* 80353500 90 1E 00 CC */ stw r0, 0xcc(r30)
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/* 80353504 7F E3 FB 78 */ mr r3, r31
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/* 80353508 4E 80 00 21 */ blrl
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lbl_8035350C:
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/* 8035350C 80 01 00 1C */ lwz r0, 0x1c(r1)
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/* 80353510 83 E1 00 14 */ lwz r31, 0x14(r1)
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/* 80353514 83 C1 00 10 */ lwz r30, 0x10(r1)
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/* 80353518 38 21 00 18 */ addi r1, r1, 0x18
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/* 8035351C 7C 08 03 A6 */ mtlr r0
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/* 80353520 4E 80 00 20 */ blr
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