From 7ac14b85a1965a8fa713a14d7a56fa42e8ba23b3 Mon Sep 17 00:00:00 2001 From: LagoLunatic Date: Fri, 16 May 2025 14:34:46 -0400 Subject: [PATCH] GXFifo OK --- configure.py | 2 +- include/dolphin/gx/GXFifo.h | 6 +-- include/dolphin/os/OSThread.h | 1 - include/f_pc/f_pc_priority.h | 2 - src/dolphin/gx/GXFifo.c | 72 ++++++++++++++++++----------------- src/dolphin/os/OSThread.c | 3 -- 6 files changed, 42 insertions(+), 44 deletions(-) diff --git a/configure.py b/configure.py index ce84020f4..5f91627f4 100755 --- a/configure.py +++ b/configure.py @@ -1150,7 +1150,7 @@ config.libs = [ "gx", [ Object(NonMatching, "dolphin/gx/GXInit.c", extra_cflags=["-opt nopeephole"]), - Object(NonMatching, "dolphin/gx/GXFifo.c"), + Object(Matching, "dolphin/gx/GXFifo.c"), Object(NonMatching, "dolphin/gx/GXAttr.c"), Object(NonMatching, "dolphin/gx/GXMisc.c"), Object(NonMatching, "dolphin/gx/GXGeometry.c"), diff --git a/include/dolphin/gx/GXFifo.h b/include/dolphin/gx/GXFifo.h index c234c51fe..94ab66e2f 100644 --- a/include/dolphin/gx/GXFifo.h +++ b/include/dolphin/gx/GXFifo.h @@ -24,9 +24,9 @@ GXBreakPtCallback GXSetBreakPtCallback(GXBreakPtCallback cb); void __GXFifoInit(void); void __GXFifoReadEnable(void); void __GXFifoReadDisable(void); -void __GXFifoLink(u8); -void __GXWriteFifoIntEnable(u32 p1, u32 p2); -void __GXWriteFifoIntReset(u32 p1, u32 p2); +void __GXFifoLink(u8 en); +void __GXWriteFifoIntEnable(u8 hiWatermarkEn, u8 loWatermarkEn); +void __GXWriteFifoIntReset(u8 hiWatermarkClr, u8 loWatermarkClr); void __GXCleanGPFifo(void); OSThread* GXSetCurrentGXThread(void); OSThread* GXGetCurrentGXThread(void); diff --git a/include/dolphin/os/OSThread.h b/include/dolphin/os/OSThread.h index af9ac6b23..4109ae184 100644 --- a/include/dolphin/os/OSThread.h +++ b/include/dolphin/os/OSThread.h @@ -109,7 +109,6 @@ s32 OSGetThreadPriority(OSThread* thread); static s32 CheckThreadQueue(OSThreadQueue* thread); s32 OSCheckActiveThreads(void); static void OSClearStack(u8 value); -extern u8 data_804516D0[8]; #ifdef __cplusplus }; diff --git a/include/f_pc/f_pc_priority.h b/include/f_pc/f_pc_priority.h index 0436996dc..4646db688 100644 --- a/include/f_pc/f_pc_priority.h +++ b/include/f_pc/f_pc_priority.h @@ -34,6 +34,4 @@ s32 fpcPi_Handler(void); s32 fpcPi_Init(process_priority_class* i_procPriority, void* pUserData, uint i_layer, u16 i_listID, u16 i_priority); -extern s8 data_804505F0; // roomReadId - #endif diff --git a/src/dolphin/gx/GXFifo.c b/src/dolphin/gx/GXFifo.c index 13e33336d..23c28f6d5 100644 --- a/src/dolphin/gx/GXFifo.c +++ b/src/dolphin/gx/GXFifo.c @@ -11,7 +11,7 @@ static GXFifoObj* GPFifo; static OSThread* __GXCurrentThread; -static GXBool data_80451954; +static GXBool CPGPLinked; static u32 GXOverflowSuspendInProgress; @@ -37,7 +37,7 @@ static void GXUnderflowHandler() { static void GXBreakPointHandler(OSContext* context) { OSContext bpContext; - SET_REG_FIELD(gx->cpEnable, 1, 5, 2); + SET_REG_FIELD(gx->cpEnable, 1, 5, 0); GX_SET_CP_REG(1, gx->cpEnable); if (BreakPointCB) { @@ -101,27 +101,27 @@ void GXSetCPUFifo(GXFifoObj* fifo) { GX_SET_PI_REG(3, (u32)fifo->base & 0x3FFFFFFF); GX_SET_PI_REG(4, (u32)fifo->end & 0x3FFFFFFF); reg = 0; - GX_BITFIELD_SET(reg, 6, 21, (u32)fifo->write_ptr >> 5); + GX_BITFIELD_SET(reg, 6, 21, ((u32)fifo->write_ptr & 0x3FFFFFFF) >> 5); GX_BITFIELD_SET(reg, 5, 1, 0); GX_SET_PI_REG(5, reg); - data_80451954 = GX_TRUE; + CPGPLinked = GX_TRUE; __GXWriteFifoIntReset(1, 1); __GXWriteFifoIntEnable(1, 0); __GXFifoLink(1); } else { u32 reg; - if (data_80451954) { + if (CPGPLinked) { __GXFifoLink(0); - data_80451954 = GX_FALSE; + CPGPLinked = GX_FALSE; } __GXWriteFifoIntEnable(0, 0); GX_SET_PI_REG(3, (u32)fifo->base & 0x3FFFFFFF); GX_SET_PI_REG(4, (u32)fifo->end & 0x3FFFFFFF); reg = 0; - GX_BITFIELD_SET(reg, 6, 21, (u32)fifo->write_ptr >> 5); + GX_BITFIELD_SET(reg, 6, 21, ((u32)fifo->write_ptr & 0x3FFFFFFF) >> 5); GX_BITFIELD_SET(reg, 5, 1, 0); GX_SET_PI_REG(5, reg); } @@ -156,38 +156,48 @@ void GXSetGPFifo(GXFifoObj* fifo) { PPCSync(); if (CPUFifo == GPFifo) { - data_80451954 = 1; + CPGPLinked = 1; __GXWriteFifoIntEnable(1, 0); __GXFifoLink(1); } else { - data_80451954 = 0; + CPGPLinked = 0; __GXWriteFifoIntEnable(0, 0); __GXFifoLink(0); } reg = gx->cpEnable; - GX_BITFIELD_SET(reg, 0x1e, 1, 0); - GX_BITFIELD_SET(reg, 0x1a, 1, 0); - GX_SET_CP_REG(1, reg); - GX_SET_CP_REG(1, gx->cpEnable); __GXWriteFifoIntReset(1, 1); __GXFifoReadEnable(); OSRestoreInterrupts(interrupts); } void GXSaveCPUFifo(GXFifoObj* fifo) { - GXFlush(); __GXSaveCPUFifoAux(fifo); } +#define SOME_MACRO1(fifo) \ +do { \ + u32 temp = GX_GET_CP_REG(29) << 16; \ + temp |= GX_GET_CP_REG(28); \ + fifo->read_ptr = OSPhysicalToCached(temp); \ +} while (0) + +#define SOME_MACRO2(fifo) \ +do { \ + u32 temp = GX_GET_CP_REG(25) << 16; \ + temp |= GX_GET_CP_REG(24); \ + fifo->rw_dst = temp; \ +} while (0) + void __GXSaveCPUFifoAux(GXFifoObj* fifo) { int interrupts = OSDisableInterrupts(); + + GXFlush(); fifo->base = OSPhysicalToCached(GX_GET_PI_REG(3)); fifo->end = OSPhysicalToCached(GX_GET_PI_REG(4)); fifo->write_ptr = OSPhysicalToCached(GX_GET_PI_REG(5) & ~0x4000000); - if (data_80451954 != 0) { - u32 reg2 = GX_GET_CP_REG(28) | (GX_GET_CP_REG(29) << 16); - fifo->read_ptr = (void*)(reg2 + -0x80000000); - fifo->rw_dst = (((u32)GX_GET_CP_REG(24) | (GX_GET_CP_REG(25) << 16))); + if (CPGPLinked != 0) { + SOME_MACRO1(fifo); + SOME_MACRO2(fifo); } else { fifo->rw_dst = (u32)fifo->write_ptr - (u32)fifo->read_ptr; if (fifo->rw_dst < 0) { @@ -233,35 +243,29 @@ void __GXFifoInit(void) { } void __GXFifoReadEnable(void) { - SET_REG_FIELD(gx->cpEnable, 1, 0, 2); + SET_REG_FIELD(gx->cpEnable, 1, 0, 1); GX_SET_CP_REG(1, gx->cpEnable); } void __GXFifoReadDisable(void) { - SET_REG_FIELD(gx->cpEnable, 1, 0, 2); + SET_REG_FIELD(gx->cpEnable, 1, 0, 0); GX_SET_CP_REG(1, gx->cpEnable); } -void __GXFifoLink(u8 link) { - u32 b; - if (link) { - b = 1; - } else { - b = 0; - } - SET_REG_FIELD(gx->cpEnable, 1, 4, 2); +void __GXFifoLink(u8 en) { + SET_REG_FIELD(gx->cpEnable, 1, 4, (en != 0) ? 1 : 0); GX_SET_CP_REG(1, gx->cpEnable); } -void __GXWriteFifoIntEnable(u32 p1, u32 p2) { - SET_REG_FIELD(gx->cpEnable, 1, 2, 2); - SET_REG_FIELD(gx->cpEnable, 1, 3, 2); +void __GXWriteFifoIntEnable(u8 hiWatermarkEn, u8 loWatermarkEn) { + SET_REG_FIELD(gx->cpEnable, 1, 2, hiWatermarkEn); + SET_REG_FIELD(gx->cpEnable, 1, 3, loWatermarkEn); GX_SET_CP_REG(1, gx->cpEnable); } -void __GXWriteFifoIntReset(u32 p1, u32 p2) { - SET_REG_FIELD(gx->cpClr, 1, 0, 2); - SET_REG_FIELD(gx->cpClr, 1, 1, 2); +void __GXWriteFifoIntReset(u8 hiWatermarkClr, u8 loWatermarkClr) { + SET_REG_FIELD(gx->cpClr, 1, 0, hiWatermarkClr); + SET_REG_FIELD(gx->cpClr, 1, 1, loWatermarkClr); GX_SET_CP_REG(2, gx->cpClr); } diff --git a/src/dolphin/os/OSThread.c b/src/dolphin/os/OSThread.c index 4ac9aa657..b156818f9 100644 --- a/src/dolphin/os/OSThread.c +++ b/src/dolphin/os/OSThread.c @@ -932,6 +932,3 @@ void OSClearStack(u8 val) { *p = pattern; } } - -extern u8 data_804516D0[8]; -u8 data_804516D0[8] ALIGN_DECL(8);