mirror of
https://github.com/zeldaret/tww.git
synced 2026-05-23 06:54:16 -04:00
Jasper St. Pierre
196 lines
5.4 KiB
C
196 lines
5.4 KiB
C
#ifndef J3DTRANSFORM_H
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#define J3DTRANSFORM_H
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#include "JSystem/JGeometry.h"
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#include "dolphin/mtx/mtxvec.h"
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struct J3DTransformInfo {
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/* 0x00 */ JGeometry::TVec3<f32> mScale;
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/* 0x0C */ JGeometry::TVec3<s16> mRotation;
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/* 0x14 */ JGeometry::TVec3<f32> mTranslate;
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}; // Size: 0x20
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extern J3DTransformInfo const j3dDefaultTransformInfo;
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extern Vec const j3dDefaultScale;
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extern Mtx const j3dDefaultMtx;
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extern f32 PSMulUnit01[2];
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void J3DGetTranslateRotateMtx(J3DTransformInfo const&, Mtx);
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void J3DGetTranslateRotateMtx(s16, s16, s16, f32, f32, f32, Mtx);
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void J3DPSCalcInverseTranspose(f32 (*param_0)[4], f32 (*param_1)[3]);
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void J3DGQRSetup7(u32 param_0, u32 param_1, u32 param_2, u32 param_3);
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void J3DPSMtx33Copy(register Mtx3P src, register Mtx3P dst);
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void J3DPSMtx33CopyFrom34(register MtxP src, register Mtx3P dst);
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// regalloc issues
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inline void J3DPSMulMtxVec(register MtxP mtx, register Vec* vec, register Vec* dst) {
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register f32 fr12;
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register f32 fr11;
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register f32 fr10;
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register f32 fr9;
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register f32 fr8;
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register f32 fr6;
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register f32 fra6;
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register f32 fr5;
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register f32 fra5;
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register f32 fra4;
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register f32 fr4;
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register f32 fr3;
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register f32 fr2;
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register f32 fra2;
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register f32 fr01;
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register f32 fr00;
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asm {
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psq_l fr00, 0(vec), 0, 0
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psq_l fr2, 0(mtx), 0, 0
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psq_l fr01, 8(vec), 1, 0
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ps_mul fr4, fr2, fr00
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psq_l fr3, 8(mtx), 0, 0
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ps_madd fr5, fr3, fr01, fr4
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psq_l fr8, 16(mtx), 0, 0
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ps_sum0 fr6, fr5, fr6, fr5
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psq_l fr9, 24(mtx), 0, 0
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ps_mul fr10, fr8, fr00
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psq_st fr6, 0(dst), 1, 0
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ps_madd fr11, fr9, fr01, fr10
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psq_l fra2, 32(mtx), 0, 0
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ps_sum0 fr12, fr11, fr12, fr11
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psq_l fr3, 40(mtx), 0, 0
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ps_mul fra4, fra2, fr00
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psq_st fr12, 4(dst), 1, 0
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ps_madd fra5, fr3, fr01, fra4
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ps_sum0 fra6, fra5, fra6, fra5
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psq_st fra6, 8(dst), 1, 0
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}
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}
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// regalloc issues
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inline void J3DPSMulMtxVec(register MtxP mtx, register SVec* vec, register SVec* dst) {
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register f32 fr12;
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register f32 fr11;
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register f32 fr10;
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register f32 fr9;
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register f32 fr8;
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register f32 fr6;
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register f32 fra6;
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register f32 fr5;
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register f32 fra5;
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register f32 fra4;
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register f32 fr4;
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register f32 fr3;
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register f32 fr2;
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register f32 fra2;
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register f32 fr01;
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register f32 fr00;
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asm {
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psq_l fr00, 0(vec), 0, 7
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psq_l fr2, 0(mtx), 0, 0
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psq_l fr01, 4(vec), 1, 7
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ps_mul fr4, fr2, fr00
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psq_l fr3, 8(mtx), 0, 0
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ps_madd fr5, fr3, fr01, fr4
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psq_l fr8, 16(mtx), 0, 0
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ps_sum0 fr6, fr5, fr6, fr5
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psq_l fr9, 24(mtx), 0, 0
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ps_mul fr10, fr8, fr00
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psq_st fr6, 0(dst), 1, 7
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ps_madd fr11, fr9, fr01, fr10
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psq_l fra2, 32(mtx), 0, 0
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ps_sum0 fr12, fr11, fr12, fr11
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psq_l fr3, 40(mtx), 0, 0
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ps_mul fra4, fra2, fr00
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psq_st fr12, 2(dst), 1, 7
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ps_madd fra5, fr3, fr01, fra4
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ps_sum0 fra6, fra5, fra6, fra5
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psq_st fra6, 4(dst), 1, 7
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}
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}
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// regalloc issues
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inline void J3DPSMulMtxVec(register Mtx3P mtx, register Vec* vec, register Vec* dst) {
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register f32* punit;
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register f32 unit;
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register f32 fr12;
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register f32 fr11;
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register f32 fr10;
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register f32 fr9;
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register f32 fr8;
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register f32 fr6;
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register f32 fr5;
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register f32 fr4;
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register f32 fr3;
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register f32 fr2;
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register f32 fr01;
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register f32 fr00;
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asm {
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lis punit, PSMulUnit01@ha
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psq_l fr00, 0(vec), 0, 0
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addi punit, punit, PSMulUnit01@l
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psq_l fr2, 0(mtx), 0, 0
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psq_l unit, 0(punit), 0, 0
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psq_l fr01, 8(vec), 1, 0
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ps_add fr01, unit, fr01
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psq_l fr3, 8(mtx), 1, 0
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ps_mul fr4, fr2, fr00
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psq_l fr8, 12(mtx), 0, 0
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ps_madd fr5, fr3, fr01, fr4
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ps_sum0 fr6, fr5, fr6, fr5
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psq_l fr9, 20(mtx), 1, 0
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ps_mul fr10, fr8, fr00
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psq_st fr6, 0(dst), 1, 0
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ps_madd fr11, fr9, fr01, fr10
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psq_l fr2, 24(mtx), 0, 0
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ps_sum0 fr12, fr11, fr12, fr11
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psq_l fr3, 32(mtx), 1, 0
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ps_mul fr4, fr2, fr00
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psq_st fr12, 4(dst), 1, 0
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ps_madd fr5, fr3, fr01, fr4
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ps_sum0 fr6, fr5, fr6, fr5
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psq_st fr6, 8(dst), 1, 0
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}
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}
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// regalloc issues
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inline void J3DPSMulMtxVec(register Mtx3P mtx, register SVec* vec, register SVec* dst) {
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register f32* punit;
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register f32 unit;
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register f32 fr6;
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register f32 fr5;
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register f32 fr4;
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register f32 fr3;
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register f32 fr2;
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register f32 fr01;
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register f32 fr00;
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asm {
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lis punit, PSMulUnit01@ha
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psq_l fr00, 0(vec), 0, 7
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addi punit, punit, PSMulUnit01@l
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psq_l fr2, 0(mtx), 0, 0
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psq_l unit, 0(punit), 0, 0
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psq_l fr01, 4(vec), 1, 7
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ps_add fr01, unit, fr01
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psq_l fr3, 8(mtx), 1, 0
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ps_mul fr4, fr2, fr00
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psq_l fr2, 12(mtx), 0, 0
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ps_madd fr5, fr3, fr01, fr4
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ps_sum0 fr6, fr5, fr6, fr5
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psq_l fr3, 20(mtx), 1, 0
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ps_mul fr4, fr2, fr00
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psq_st fr6, 0(dst), 1, 7
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ps_madd fr5, fr3, fr01, fr4
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psq_l fr2, 24(mtx), 0, 0
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ps_sum0 fr6, fr5, fr6, fr5
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psq_l fr3, 32(mtx), 1, 0
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ps_mul fr4, fr2, fr00
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psq_st fr6, 2(dst), 1, 7
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ps_madd fr5, fr3, fr01, fr4
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ps_sum0 fr6, fr5, fr6, fr5
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psq_st fr6, 4(dst), 1, 7
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}
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}
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f32 J3DCalcZValue(register MtxP m, register Vec v);
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#endif /* J3DTRANSFORM_H */
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